Merge branch 'master' of https://github.com/RT-Thread/rt-thread into develop_one

author: liuxianliang <[email protected]> 2021-04-06 10:42:58 +0800
committer: liuxianliang <[email protected]> 2021-04-06 10:42:58 +0800
commit: 233e1cd8bc7cbdc38006dfc18adde8bc2595620f (patch)
tree: cec4669f56b09734b7dcc2682d854fef325722b8 /bsp
parent: 4431c4796fb3e26fb66c012feb8bf47f3292b473 (diff)
parent: c5a0df2254bd6fadc941a33d9066ce6b972c4274 (diff)
232 files changed, 7370 insertions, 5565 deletions
diff --git a/bsp/amebaz/applications/main.c b/bsp/amebaz/applications/main.c
index 381b026867..5cbf749d76 100644
--- a/bsp/amebaz/applications/main.c
+++ b/bsp/amebaz/applications/main.c
@@ -1,11 +1,7 @@
 /*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/amebaz/applications/smartconfig_app.c b/bsp/amebaz/applications/smartconfig_app.c
index 582bbf5d98..e91f940f1b 100644
--- a/bsp/amebaz/applications/smartconfig_app.c
+++ b/bsp/amebaz/applications/smartconfig_app.c
@@ -1,21 +1,7 @@
 /*
- * File      : smartconfig_demo.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/amebaz/drivers/board.c b/bsp/amebaz/drivers/board.c
index ffdc9fc680..7631bd13d6 100644
--- a/bsp/amebaz/drivers/board.c
+++ b/bsp/amebaz/drivers/board.c
@@ -1,11 +1,7 @@
 /*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -44,7 +40,7 @@ void __wrap_rtl_printf(const char *fmt, ...)
      * length. */
     length = rt_vsnprintf(rt_log_buf, sizeof(rt_log_buf) - 1, fmt, args);
     if (length > RT_CONSOLEBUF_SIZE - 1)
-        length = RT_CONSOLEBUF_SIZE - 1;    
+        length = RT_CONSOLEBUF_SIZE - 1;
     rt_kprintf("%s", rt_log_buf);
     va_end(args);
 }
@@ -89,11 +85,11 @@ void rt_hw_board_init(void)
 #ifdef RT_USING_HEAP
         rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
 #endif
-    
+
 #ifdef RT_USING_COMPONENTS_INIT
     rt_components_board_init();
 #endif
-    
+
 #ifdef RT_USING_CONSOLE
     rt_hw_uart_init();
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
diff --git a/bsp/amebaz/drivers/board.h b/bsp/amebaz/drivers/board.h
index 3baf67a4d5..5c6b8104ed 100644
--- a/bsp/amebaz/drivers/board.h
+++ b/bsp/amebaz/drivers/board.h
@@ -1,11 +1,7 @@
 /*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/amebaz/drivers/drv_uart.c b/bsp/amebaz/drivers/drv_uart.c
index 1bf659e79f..008fa3bda5 100644
--- a/bsp/amebaz/drivers/drv_uart.c
+++ b/bsp/amebaz/drivers/drv_uart.c
@@ -1,21 +1,7 @@
 /*
- * File      : drv_uart.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -125,7 +111,7 @@ static int ameba_uart_getc (struct rt_serial_device *serial)
 {
     struct device_uart* uart = serial->parent.user_data;
 
-	if(!serial_readable(&uart->serial))
+    if(!serial_readable(&uart->serial))
         return -1;
 
     /* Receive Data Available */
@@ -140,13 +126,13 @@ static rt_size_t ameba_uart_dma_transmit (struct rt_serial_device *serial, rt_ui
 static void ameba_uart_irq(uint32_t id, SerialIrq event)
 {
     struct rt_serial_device *serial = (struct rt_serial_device *)id;
-	if(event == RxIrq)
+    if(event == RxIrq)
     {
         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
-	}
-	else if(event == TxIrq)
+    }
+    else if(event == TxIrq)
     {
-	}
+    }
 }
 
 static rt_err_t dbg_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
@@ -155,7 +141,7 @@ static int dbg_putc(struct rt_serial_device *serial, char c);
 static int dbg_getc(struct rt_serial_device *serial);
 
 static struct rt_serial_device ameba_dbg_serial;
-const struct rt_uart_ops _ambed_dbg_ops = 
+const struct rt_uart_ops _ambed_dbg_ops =
 {
     dbg_configure,
     dbg_control,
@@ -177,7 +163,7 @@ void dbg_uart_irq_handler(void * data)
     DiagSetIsrEnReg(0);
 
     rt_hw_serial_isr(&ameba_dbg_serial, RT_SERIAL_EVENT_RX_IND);
-    
+
     DiagSetIsrEnReg(IrqEn);
 }
 
@@ -192,9 +178,9 @@ static rt_err_t dbg_control(struct rt_serial_device *serial, int cmd, void *arg)
 
     case RT_DEVICE_CTRL_SET_INT:
         /* install interrupt */
-    	DIAG_UartReInit((IRQ_FUN) dbg_uart_irq_handler);
+        DIAG_UartReInit((IRQ_FUN) dbg_uart_irq_handler);
         /* Enable the UART Interrupt */
-    	NVIC_SetPriority(UART_LOG_IRQ, 10); /* this is rom_code_patch */
+        NVIC_SetPriority(UART_LOG_IRQ, 10); /* this is rom_code_patch */
         break;
     }
 
@@ -214,12 +200,12 @@ static int dbg_getc(struct rt_serial_device *serial)
 
     if(!UART_Readable(UART2_DEV))
         return -1;
-    
+
     c = DiagGetChar(_FALSE);
 
     return c;
 }
- 
+
 /*
  * UART Initiation
  */
@@ -231,7 +217,7 @@ int rt_hw_uart_init(void)
 #ifdef BSP_USING_UART0
     {
         struct device_uart      *uart;
-        
+
         serial  = &serial0;
         uart    = &uart0;
 
@@ -256,7 +242,7 @@ int rt_hw_uart_init(void)
 
         serial->ops = &_ambed_dbg_ops;
         serial->config = config;
-        
+
         rt_hw_serial_register(serial,
                               RT_CONSOLE_DEVICE_NAME,
                               RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
diff --git a/bsp/amebaz/drivers/drv_uart.h b/bsp/amebaz/drivers/drv_uart.h
index a4d326da58..e91cc568b0 100644
--- a/bsp/amebaz/drivers/drv_uart.h
+++ b/bsp/amebaz/drivers/drv_uart.h
@@ -1,21 +1,7 @@
 /*
- * File      : drv_uart.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/amebaz/drivers/wlan/drv_wifi.c b/bsp/amebaz/drivers/wlan/drv_wifi.c
index 12865bfc3b..7d8cade15e 100644
--- a/bsp/amebaz/drivers/wlan/drv_wifi.c
+++ b/bsp/amebaz/drivers/wlan/drv_wifi.c
@@ -1,21 +1,7 @@
 /*
- * File      : drv_wifi.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -115,7 +101,7 @@ void netif_pre_sleep_processing(void)
 }
 
 unsigned char *rltk_wlan_get_ip(int idx)
-{   
+{
     struct ameba_wifi *wifi;
 
     wifi = rthw_wifi_get_dev(idx);
@@ -130,7 +116,7 @@ unsigned char *rltk_wlan_get_ip(int idx)
 
 int netif_is_valid_IP(int idx, unsigned char *ip_dest)
 {
-    LOG_D("F:%s L:%d is run ip: %d:%d:%d:%d", __FUNCTION__, __LINE__, 
+    LOG_D("F:%s L:%d is run ip: %d:%d:%d:%d", __FUNCTION__, __LINE__,
         ip_dest[0], ip_dest[1], ip_dest[2], ip_dest[3]);
     return 1;
 }
@@ -376,9 +362,9 @@ static rt_err_t rthw_wlan_join                 (struct rt_wlan_device *wlan, str
             ssid = &sta_info->ssid.val[0];
         if (sta_info->key.len > 0)
             key = &sta_info->key.val[0];
-            LOG_D("bssid connect bssid: %02x:%02x:%02x:%02x:%02x:%02x ssid:%s ssid_len:%d key:%s key_len%d", 
+            LOG_D("bssid connect bssid: %02x:%02x:%02x:%02x:%02x:%02x ssid:%s ssid_len:%d key:%s key_len%d",
             sta_info->bssid[0],sta_info->bssid[1],sta_info->bssid[2],sta_info->bssid[3],sta_info->bssid[4],sta_info->bssid[5],
-            ssid, 
+            ssid,
             sta_info->ssid.len,
             key,
             sta_info->key.len
@@ -608,7 +594,7 @@ exit:
     return RT_EOK;
 }
 
-static const struct rt_wlan_dev_ops ops = 
+static const struct rt_wlan_dev_ops ops =
 {
     .wlan_init             =     rthw_wlan_init           ,
     .wlan_mode             =     rthw_wlan_mode           ,
diff --git a/bsp/amebaz/drivers/wlan/drv_wifi.h b/bsp/amebaz/drivers/wlan/drv_wifi.h
index b92658d470..2ca7c799c8 100644
--- a/bsp/amebaz/drivers/wlan/drv_wifi.h
+++ b/bsp/amebaz/drivers/wlan/drv_wifi.h
@@ -1,27 +1,13 @@
 /*
- * File      : drv_wifi.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2017-5-30      Bernard      the first version
  */
- 
+
 #ifndef __DRV_WIFI_H__
 #define __DRV_WIFI_H__
 
diff --git a/bsp/amebaz/drivers/wlan/drv_wlan.c b/bsp/amebaz/drivers/wlan/drv_wlan.c
index c414470633..1eedea54c0 100644
--- a/bsp/amebaz/drivers/wlan/drv_wlan.c
+++ b/bsp/amebaz/drivers/wlan/drv_wlan.c
@@ -1,21 +1,7 @@
 /*
- * File      : drv_wlan.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -151,20 +137,20 @@ int rthw_wifi_ap_start(char *ssid, char *password, int channel)
         return -1;
     }
 
-    while(1) 
+    while(1)
     {
         char essid[33];
         if(wext_get_ssid(name, (unsigned char *) essid) > 0)
         {
-            if(strcmp((const char *) essid, (const char *)ssid) == 0) 
+            if(strcmp((const char *) essid, (const char *)ssid) == 0)
             {
                 rt_kprintf("%s started\n", ssid);
                 break;
             }
         }
-        if(timeout == 0) 
+        if(timeout == 0)
         {
-            rt_kprintf("Start AP timeout\n");   
+            rt_kprintf("Start AP timeout\n");
             return -1;
         }
         rt_thread_delay(1 * RT_TICK_PER_SECOND);
@@ -183,7 +169,7 @@ static int rthw_wifi_disconnect(char *name)
     if (name == RT_NULL)
         return -1;
 
-    if (wext_get_ssid(name, (unsigned char *) essid) < 0) 
+    if (wext_get_ssid(name, (unsigned char *) essid) < 0)
     {
         rt_kprintf("\nWIFI disconnected!\n");
         return -1;
@@ -203,7 +189,7 @@ static int rthw_wifi_disconnect(char *name)
             break;
         }
 
-        if(timeout == 0) 
+        if(timeout == 0)
         {
             rt_kprintf("ERROR: Deassoc timeout!\n");
             return -1;
@@ -259,7 +245,7 @@ int rthw_wifi_ap_disconnect(void)
 
 int rthw_wifi_rssi_get(void)
 {
-    int rssi = 0;   
+    int rssi = 0;
     wifi_get_rssi(&rssi);
     return rssi;
 }
diff --git a/bsp/amebaz/drivers/wlan/drv_wlan.h b/bsp/amebaz/drivers/wlan/drv_wlan.h
index 03a8db01e8..ad300b18eb 100644
--- a/bsp/amebaz/drivers/wlan/drv_wlan.h
+++ b/bsp/amebaz/drivers/wlan/drv_wlan.h
@@ -1,21 +1,7 @@
 /*
- * File      : drv_wlan.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2017, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -25,14 +11,14 @@
 #ifndef __DRV_WLAN_H__
 #define __DRV_WLAN_H__
 
-typedef enum 
+typedef enum
 {
-	RTHW_MODE_NONE = 0,
-	RTHW_MODE_STA,
-	RTHW_MODE_AP,
-	RTHW_MODE_STA_AP,
-	RTHW_MODE_PROMISC,
-	RTHW_MODE_P2P
+    RTHW_MODE_NONE = 0,
+    RTHW_MODE_STA,
+    RTHW_MODE_AP,
+    RTHW_MODE_STA_AP,
+    RTHW_MODE_PROMISC,
+    RTHW_MODE_P2P
 }rthw_mode_t;
 
 #define SHARED_ENABLED  0x00008000
@@ -66,7 +52,7 @@ typedef enum {
 typedef enum {
     RTHW_WIFI_EVENT_CONNECT = 0,
     RTHW_WIFI_EVENT_DISCONNECT = 1,
-    RTHW_WIFI_EVENT_FOURWAY_HANDSHAKE_DONE = 2,	
+    RTHW_WIFI_EVENT_FOURWAY_HANDSHAKE_DONE = 2,
     RTHW_WIFI_EVENT_SCAN_RESULT_REPORT = 3,
     RTHW_WIFI_EVENT_SCAN_DONE = 4,
     RTHW_WIFI_EVENT_RECONNECTION_FAIL = 5,
diff --git a/bsp/at32/Libraries/rt_drivers/drv_adc.c b/bsp/at32/Libraries/rt_drivers/drv_adc.c
index 02e7b602af..25760e512b 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_adc.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_adc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
 #include <drv_log.h>
 
 struct at32_adc
-{  
+{
     struct rt_adc_device at32_adc_device;
     ADC_Type *ADC_Handler;
     char *name;
@@ -109,9 +109,9 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
     ADC_InitType ADC_InitStructure;
     RT_ASSERT(device != RT_NULL);
     at32_adc_handler = device->parent.user_data;
-  
+
     at32_msp_adc_init(at32_adc_handler);
-  
+
     /* ADCx configuration ------------------------------------------------------*/
     ADC_StructInit(&ADC_InitStructure);
     ADC_InitStructure.ADC_Mode              = ADC_Mode_Independent;
@@ -121,14 +121,14 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
     ADC_InitStructure.ADC_DataAlign         = ADC_DataAlign_Right;
     ADC_InitStructure.ADC_NumOfChannel      = 1;
     ADC_Init(at32_adc_handler, &ADC_InitStructure);
-  
-    /* ADCx regular channels configuration */ 
-    ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5); 
-    
+
+    /* ADCx regular channels configuration */
+    ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5);
+
     /* Enable ADCx */
     ADC_Ctrl(at32_adc_handler, ENABLE);
-  
-    /* Enable ADCx reset calibration register */   
+
+    /* Enable ADCx reset calibration register */
     ADC_RstCalibration(at32_adc_handler);
     /* Check the end of ADCx reset calibration register */
     while(ADC_GetResetCalibrationStatus(at32_adc_handler));
@@ -161,7 +161,7 @@ static rt_err_t at32_get_adc_value(struct rt_adc_device *device, rt_uint32_t cha
 
     at32_adc_handler = device->parent.user_data;
 
-    /* Start ADCx Software Conversion */ 
+    /* Start ADCx Software Conversion */
     ADC_SoftwareStartConvCtrl(at32_adc_handler, ENABLE);
 
     /* Wait for the ADC to convert */
diff --git a/bsp/at32/Libraries/rt_drivers/drv_adc.h b/bsp/at32/Libraries/rt_drivers/drv_adc.h
index d113d1338a..0991b0fe80 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_adc.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_adc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -19,32 +19,32 @@ extern "C" {
 #endif
 
 #if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
-  
+
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                 \
     {                              \
        .ADC_Handler = ADC1,        \
        .name        = "adc1",      \
-    }  
+    }
 #endif /* ADC1_CONFIG */
-    
+
 #ifndef ADC2_CONFIG
 #define ADC2_CONFIG                \
     {                              \
        .ADC_Handler = ADC2,        \
        .name        = "adc2",      \
-    }  
+    }
 #endif /* ADC2_CONFIG */
-    
+
 #ifndef ADC3_CONFIG
 #define ADC3_CONFIG                \
     {                              \
        .ADC_Handler = ADC3,        \
        .name        = "adc3",      \
-    }  
-#endif /* ADC3_CONFIG */    
-    
-#endif  
+    }
+#endif /* ADC3_CONFIG */
+
+#endif
 
 
 #ifdef __cplusplus
diff --git a/bsp/at32/Libraries/rt_drivers/drv_can.c b/bsp/at32/Libraries/rt_drivers/drv_can.c
index 43f5a287e3..47a4bb3667 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_can.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_can.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -311,8 +311,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
             {
                 can_instance->CanConfig.FilterConfig.CAN_FilterNumber = filter_cfg->items[i].hdr & (0x1fU);
                 can_instance->CanConfig.FilterConfig.CAN_FilterIdHigh = (filter_cfg->items[i].id >> 13) & 0xFFFF;
-                can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) | 
-                                                    (filter_cfg->items[i].ide << 2) | 
+                can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) |
+                                                    (filter_cfg->items[i].ide << 2) |
                                                     (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
                 can_instance->CanConfig.FilterConfig.CAN_FilterMskIdHigh = (filter_cfg->items[i].mask >> 16) & 0xFFFF;
                 can_instance->CanConfig.FilterConfig.CAN_FilterMskIdLow = filter_cfg->items[i].mask & 0xFFFF;
@@ -499,7 +499,7 @@ static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo)
     else
         pmsg->ide = RxMessage.ExtId;
     pmsg->rtr = RxMessage.RTR;
-    
+
     return RT_EOK;
 }
 
diff --git a/bsp/at32/Libraries/rt_drivers/drv_can.h b/bsp/at32/Libraries/rt_drivers/drv_can.h
index d89bacda26..19afb93040 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_can.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_can.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -22,7 +22,7 @@ extern "C" {
 #define CAN_TX_MAILBOX0             (0x00000001U)  /*!< Tx Mailbox 0  */
 #define CAN_TX_MAILBOX1             (0x00000002U)  /*!< Tx Mailbox 1  */
 #define CAN_TX_MAILBOX2             (0x00000004U)  /*!< Tx Mailbox 2  */
-  
+
 struct at32_baud_rate_tab
 {
     rt_uint32_t baud_rate;
diff --git a/bsp/at32/Libraries/rt_drivers/drv_eth.c b/bsp/at32/Libraries/rt_drivers/drv_eth.c
index 3a14d9b918..e44429e0ea 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_eth.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_eth.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,8 +28,8 @@
 //#define DRV_DEBUG
 #define LOG_TAG             "drv.emac"
 
-#define ETH_RXBUFNB        	4
-#define ETH_TXBUFNB        	2
+#define ETH_RXBUFNB         4
+#define ETH_TXBUFNB         2
 
 #define LINK_THREAD_STACK_SIZE   256
 #define LINK_THREAD_PREORITY     21
@@ -131,14 +131,14 @@ void NVIC_Configuration(void)
     NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
 
     /* 2 bit for pre-emption priority, 2 bits for subpriority */
-    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); 
+    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
 
     /* Enable the Ethernet global Interrupt */
     NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
     NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-    NVIC_Init(&NVIC_InitStructure);  
+    NVIC_Init(&NVIC_InitStructure);
 }
 
 /**
@@ -173,7 +173,7 @@ void GPIO_Configuration(void)
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
     GPIO_Init(GPIOC, &GPIO_InitStructure);
 
-	/*MII Mode GPIO configuration*/
+    /*MII Mode GPIO configuration*/
 #ifdef MII_MODE
 /**********************MII Tx Pin Define****************************/
     /*
@@ -193,7 +193,7 @@ void GPIO_Configuration(void)
     GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
     GPIO_Init(GPIOC, &GPIO_InitStructure);
-	/**********************MII Rx Pin Define****************************/
+    /**********************MII Rx Pin Define****************************/
 #if MII_RX_REMAP  /*IO PIN remaped*/
     /*
     ETH_MII_RX_DV-->PD8
@@ -208,7 +208,7 @@ void GPIO_Configuration(void)
     */
     GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-    GPIO_Init(GPIOD, &GPIO_InitStructure); 
+    GPIO_Init(GPIOD, &GPIO_InitStructure);
 
     GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -233,11 +233,11 @@ void GPIO_Configuration(void)
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
     GPIO_Init(GPIOA, &GPIO_InitStructure);
 
-    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;   
+    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
     GPIO_Init(GPIOC, &GPIO_InitStructure);
 
-    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;  
+    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
     GPIO_Init(GPIOB, &GPIO_InitStructure);
 
@@ -255,8 +255,8 @@ void GPIO_Configuration(void)
     GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
     GPIO_Init(GPIOB, &GPIO_InitStructure);
-	
-	/**********************RMII Rx Pin Define****************************/
+
+    /**********************RMII Rx Pin Define****************************/
 #if MII_RX_REMAP  /*IO PIN remaped*/
     /*
     ETH_RMII_RX_DV-->PD8
@@ -266,7 +266,7 @@ void GPIO_Configuration(void)
     */
     GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-    GPIO_Init(GPIOD, &GPIO_InitStructure); 
+    GPIO_Init(GPIOD, &GPIO_InitStructure);
 
     GPIO_InitStructure.GPIO_Pins =  GPIO_Pins_1;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -282,7 +282,7 @@ void GPIO_Configuration(void)
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
     GPIO_Init(GPIOA, &GPIO_InitStructure);
 
-    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;   
+    GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
     GPIO_Init(GPIOC, &GPIO_InitStructure);
 
@@ -314,7 +314,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
 
     RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_ETHMAC | RCC_AHBPERIPH_ETHMACTX |
                           RCC_AHBPERIPH_ETHMACRX, ENABLE);
-    
+
     /* MII/RMII Media interface selection ------------------------------------------*/
 #ifdef MII_MODE /* Mode MII with AT32F407-EVAL  */
     GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII);
@@ -361,31 +361,31 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
     ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
 #endif
 
-    /*------------------------   DMA   -----------------------------------*/  
+    /*------------------------   DMA   -----------------------------------*/
 
-    /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: 
-    the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, 
+    /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
+    the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
     if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
-    ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable; 
-    ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;         
-    ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;     
+    ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable;
+    ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
+    ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
 
-    ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;       
-    ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;   
-    ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;                                                          
-    ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;      
-    ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;                
-    ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;          
-    ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;                                                                 
+    ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+    ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
+    ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
+    ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
+    ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
+    ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
+    ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
     ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
 
     /* Configure Ethernet, check error */
     if(ETH_Init(&ETH_InitStructure, PHY_ADDRESS) == ((uint32_t)0)) {
         return RT_ERROR;
-    }    
+    }
 
     /* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
-    ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);  
+    ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);
 
     /* Initialize Tx Descriptors list: Chain Mode */
     ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
@@ -396,7 +396,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
     ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&at32_eth_device.dev_addr[0]);
 
     /* Enable ETH transmition and recetion */
-    ETH_Start();    
+    ETH_Start();
 
     return RT_EOK;
 }
@@ -581,7 +581,7 @@ struct pbuf *rt_at32_eth_rx(rt_device_t dev)
             {
                 rt_uint32_t i;
                 rt_uint8_t *ptr = (rt_uint8_t*)(DMARxDescToGet->Buffer1Addr);
-                
+
                 AT32_ETH_PRINTF("rx_dump, len:%d\r\n", p->tot_len);
                 for(i=0; i<p->tot_len; i++)
                 {
diff --git a/bsp/at32/Libraries/rt_drivers/drv_eth.h b/bsp/at32/Libraries/rt_drivers/drv_eth.h
index 398b4bdc0c..d5a5a05cc5 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_eth.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_eth.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_flash.c b/bsp/at32/Libraries/rt_drivers/drv_flash.c
index 8104f9b612..a1b381beaa 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_flash.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_flash.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -160,14 +160,14 @@ int at32_flash_erase(rt_uint32_t addr, size_t size)
         addr += FLASH_PAGE_SIZE;
     }
 
-		FLASH_Lock();
-		
-__exit:    
+        FLASH_Lock();
+
+__exit:
     if(result != RT_EOK)
     {
         return result;
     }
-    
+
     return size;
 }
 
@@ -177,7 +177,7 @@ static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
 static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
 static int fal_flash_erase(long offset, size_t size);
 
-const struct fal_flash_dev at32_onchip_flash = 
+const struct fal_flash_dev at32_onchip_flash =
 {
     "onchip_flash",
     AT32_FLASH_START_ADRESS,
diff --git a/bsp/at32/Libraries/rt_drivers/drv_flash.h b/bsp/at32/Libraries/rt_drivers/drv_flash.h
index 9392ff4303..7ec0a18632 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_flash.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_flash.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_gpio.c b/bsp/at32/Libraries/rt_drivers/drv_gpio.c
index d6fd0594dc..bc9f6b87bb 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_gpio.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_gpio.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -13,7 +13,7 @@
 
 #ifdef RT_USING_PIN
 
-static const struct pin_index pins[] = 
+static const struct pin_index pins[] =
 {
 #if defined(GPIOA)
     __AT32_PIN(0 ,  A, 0 ),
@@ -414,7 +414,7 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
         /* Configure GPIO_InitStructure */
         GPIO_StructInit(&GPIO_InitStruct);
         EXTI_StructInit(&EXTI_InitStruct);
-        GPIO_InitStruct.GPIO_Pins = irqmap->pinbit;        
+        GPIO_InitStruct.GPIO_Pins = irqmap->pinbit;
         GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
         EXTI_InitStruct.EXTI_Line = irqmap->pinbit;
         EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
@@ -462,24 +462,24 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
         if (( irqmap->pinbit>=GPIO_Pins_5 )&&( irqmap->pinbit<=GPIO_Pins_9 ))
         {
             if(!(pin_irq_enable_mask&(GPIO_Pins_5|GPIO_Pins_6|GPIO_Pins_7|GPIO_Pins_8|GPIO_Pins_9)))
-            {    
+            {
                 NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
             }
         }
         else if (( irqmap->pinbit>=GPIO_Pins_10 )&&( irqmap->pinbit<=GPIO_Pins_15 ))
         {
             if(!(pin_irq_enable_mask&(GPIO_Pins_10|GPIO_Pins_11|GPIO_Pins_12|GPIO_Pins_13|GPIO_Pins_14|GPIO_Pins_15)))
-            {    
+            {
                 NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
             }
         }
         else
         {
             NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
-        }        
+        }
 
         NVIC_Init(&NVIC_InitStruct);
-        rt_hw_interrupt_enable(level);  
+        rt_hw_interrupt_enable(level);
     }
     else
     {
diff --git a/bsp/at32/Libraries/rt_drivers/drv_gpio.h b/bsp/at32/Libraries/rt_drivers/drv_gpio.h
index 63870611f5..a8f5b7474e 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_gpio.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_gpio.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c
index 97788d22c9..dede483e54 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2020-03-16     Leo          first version
  */
- 
+
 #include <board.h>
 #include "drv_hwtimer.h"
 
@@ -20,35 +20,35 @@ enum
 {
 #ifdef BSP_USING_HWTMR1
     TMR1_INDEX,
-#endif 
-  
+#endif
+
 #ifdef BSP_USING_HWTMR2
     TMR2_INDEX,
-#endif 
-  
+#endif
+
 #ifdef BSP_USING_HWTMR3
     TMR3_INDEX,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR4
     TMR4_INDEX,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR5
     TMR5_INDEX,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR6
     TMR6_INDEX,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR7
     TMR7_INDEX,
-#endif 
+#endif
 
 #ifdef BSP_USING_HW_TMR8
     TMR8_INDEX,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR9
     TMR9_INDEX,
@@ -56,11 +56,11 @@ enum
 
 #ifdef BSP_USING_HWTMR10
     TMR10_INDEX,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR11
     TMR11_INDEX,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR12
     TMR12_INDEX,
@@ -68,11 +68,11 @@ enum
 
 #ifdef BSP_USING_HWTMR13
     TMR13_INDEX,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR14
     TMR14_INDEX,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR15
     TMR15_INDEX,
@@ -91,48 +91,48 @@ static struct at32_hwtimer at32_hwtimer_obj[] =
 {
 #ifdef BSP_USING_HWTMR1
     TMR1_CONFIG,
-#endif  
+#endif
 
 #ifdef BSP_USING_HWTMR2
     TMR2_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR3
     TMR3_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR4
     TMR4_CONFIG,
 #endif
 
 #ifdef BSP_USING_HWTMR5
     TMR5_CONFIG,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR6
     TMR6_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR7
     TMR7_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR8
     TMR8_CONFIG,
 #endif
 
 #ifdef BSP_USING_HWTMR9
     TMR9_CONFIG,
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR10
     TMR10_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR11
     TMR11_CONFIG,
 #endif
-  
+
 #ifdef BSP_USING_HWTMR12
     TMR12_CONFIG,
 #endif
@@ -164,20 +164,20 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
     {
         tim = (TMR_Type *)timer->parent.user_data;
         tim_device = (struct at32_hwtimer *)timer;
-        
+
         /* timer clock enable */
         at32_msp_hwtmr_init(tim);
-        
+
         /* timer init */
         RCC_GetClocksFreq(&RCC_ClockStruct);
         /* Set timer clock is 1Mhz */
         prescaler_value = (uint32_t)(RCC_ClockStruct.SYSCLK_Freq / 10000) - 1;
-        
+
         TMR_TMReBaseStructure.TMR_Period = 10000 - 1;
         TMR_TMReBaseStructure.TMR_DIV = prescaler_value;
         TMR_TMReBaseStructure.TMR_ClockDivision = TMR_CKD_DIV1;
         TMR_TMReBaseStructure.TMR_RepetitionCounter = 0;
-        
+
         if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
         {
             TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up;
@@ -186,21 +186,21 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
         {
             TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Down;
         }
-        
+
         TMR_TimeBaseInit(tim, &TMR_TMReBaseStructure);
-        
+
         /* Enable the TMRx global Interrupt */
         NVIC_InitStructure.NVIC_IRQChannel = tim_device->tim_irqn;
         NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
         NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
         NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
         NVIC_Init(&NVIC_InitStructure);
-        
+
         TMR_INTConfig(tim, TMR_INT_Overflow ,ENABLE);
         TMR_ClearITPendingBit(tim, TMR_INT_Overflow);
-        
+
         LOG_D("%s init success", tim_device->name);
-    }      
+    }
 }
 
 static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
@@ -211,7 +211,7 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_
     RT_ASSERT(timer != RT_NULL);
 
     tim = (TMR_Type *)timer->parent.user_data;
-    
+
     /* set tim cnt */
     TMR_SetCounter(tim, 0);
     /* set tim arr */
@@ -225,10 +225,10 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_
     {
         TMR_SelectOnePulseMode(tim, TMR_OPMode_Repetitive);
     }
-    
+
     /* start timer */
     TMR_Cmd(tim, ENABLE);
-    
+
     return result;
 }
 
@@ -239,7 +239,7 @@ static void at32_timer_stop(rt_hwtimer_t *timer)
     RT_ASSERT(timer != RT_NULL);
 
     tim = (TMR_Type *)timer->parent.user_data;
-    
+
     /* stop timer */
     TMR_Cmd(tim, ENABLE);
     /* set tim cnt */
@@ -253,7 +253,7 @@ static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer)
     RT_ASSERT(timer != RT_NULL);
 
     tim = (TMR_Type *)timer->parent.user_data;
-    
+
     return tim->CNT;
 }
 
@@ -267,22 +267,22 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
     RT_ASSERT(arg != RT_NULL);
 
     tim = (TMR_Type *)timer->parent.user_data;
-    
+
     switch(cmd)
     {
         case HWTIMER_CTRL_FREQ_SET:
         {
             rt_uint32_t freq;
             rt_uint16_t val;
-            
+
             /* set timer frequence */
             freq = *((rt_uint32_t *)arg);
-            
+
             /* time init */
             RCC_GetClocksFreq(&RCC_ClockStruct);
-            
+
             val = RCC_ClockStruct.SYSCLK_Freq / freq;
-            
+
             TMR_DIVConfig(tim, val - 1, TMR_DIVReloadMode_Immediate);
         }
         break;
@@ -292,7 +292,7 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
         }
         break;
     }
-    
+
     return result;
 }
 
@@ -311,13 +311,13 @@ void TMR2_GLOBAL_IRQHandler(void)
 {
     /* enter interrupt */
     rt_interrupt_enter();
-    
+
     if(TMR_GetINTStatus(TMR2, TMR_INT_Overflow) == SET)
     {
-    
+
         rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].time_device);
         TMR_ClearITPendingBit(TMR2, TMR_INT_Overflow);
-    
+
     }
     /* leave interrupt */
     rt_interrupt_leave();
@@ -329,13 +329,13 @@ void TMR3_GLOBAL_IRQHandler(void)
 {
     /* enter interrupt */
     rt_interrupt_enter();
-    
+
     if(TMR_GetINTStatus(TMR3, TMR_INT_Overflow) == SET)
     {
-    
+
         rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].time_device);
         TMR_ClearITPendingBit(TMR3, TMR_INT_Overflow);
-    
+
     }
     /* leave interrupt */
     rt_interrupt_leave();
@@ -347,13 +347,13 @@ void TMR4_GLOBAL_IRQHandler(void)
 {
     /* enter interrupt */
     rt_interrupt_enter();
-    
+
     if(TMR_GetINTStatus(TMR4, TMR_INT_Overflow) == SET)
     {
-    
+
         rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].time_device);
         TMR_ClearITPendingBit(TMR4, TMR_INT_Overflow);
-    
+
     }
     /* leave interrupt */
     rt_interrupt_leave();
@@ -365,13 +365,13 @@ void TMR5_GLOBAL_IRQHandler(void)
 {
     /* enter interrupt */
     rt_interrupt_enter();
-    
+
     if(TMR_GetINTStatus(TMR5, TMR_INT_Overflow) == SET)
     {
-    
+
         rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].time_device);
         TMR_ClearITPendingBit(TMR5, TMR_INT_Overflow);
-    
+
     }
     /* leave interrupt */
     rt_interrupt_leave();
diff --git a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h
index 9ae4981e3f..9acfb8d468 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_hwtimer.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -26,7 +26,7 @@ extern "C" {
         .maxcnt  = 0xFFFF,                      \
         .cntmode = HWTIMER_CNTMODE_UP,          \
     }
-#endif /* TIM_DEV_INFO_CONFIG */  
+#endif /* TIM_DEV_INFO_CONFIG */
 
 #ifdef BSP_USING_HWTMR2
 #ifndef TMR2_CONFIG
@@ -36,9 +36,9 @@ extern "C" {
        .tim_irqn      = TMR2_GLOBAL_IRQn, \
        .name          = "timer2",     \
     }
-#endif /* TMR2_CONFIG */  
-#endif /* BSP_USING_HWTMR2 */ 
-  
+#endif /* TMR2_CONFIG */
+#endif /* BSP_USING_HWTMR2 */
+
 #ifdef BSP_USING_HWTMR3
 #ifndef TMR3_CONFIG
 #define TMR3_CONFIG                   \
@@ -47,8 +47,8 @@ extern "C" {
        .tim_irqn      = TMR3_GLOBAL_IRQn, \
        .name          = "timer3",     \
     }
-#endif /* TMR3_CONFIG */  
-#endif /* BSP_USING_HWTMR3 */  
+#endif /* TMR3_CONFIG */
+#endif /* BSP_USING_HWTMR3 */
 
 #ifdef BSP_USING_HWTMR4
 #ifndef TMR4_CONFIG
@@ -58,9 +58,9 @@ extern "C" {
        .tim_irqn      = TMR4_GLOBAL_IRQn, \
        .name          = "timer4",     \
     }
-#endif /* TMR4_CONFIG */  
+#endif /* TMR4_CONFIG */
 #endif /* BSP_USING_HWTMR4 */
-    
+
 #ifdef BSP_USING_HWTMR5
 #ifndef TMR5_CONFIG
 #define TMR5_CONFIG                   \
@@ -69,9 +69,9 @@ extern "C" {
        .tim_irqn      = TMR5_GLOBAL_IRQn, \
        .name          = "timer5",     \
     }
-#endif /* TMR5_CONFIG */  
-#endif /* BSP_USING_HWTMR5 */    
-    
+#endif /* TMR5_CONFIG */
+#endif /* BSP_USING_HWTMR5 */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/bsp/at32/Libraries/rt_drivers/drv_log.h b/bsp/at32/Libraries/rt_drivers/drv_log.h
index a813acb0cb..d91f70d37c 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_log.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_log.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_pwm.c b/bsp/at32/Libraries/rt_drivers/drv_pwm.c
index 78b1b2d7a9..9a188681ed 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_pwm.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_pwm.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -37,52 +37,52 @@ struct at32_pwm
     char *name;
 };
 
-static struct at32_pwm at32_pwm_obj[] = 
+static struct at32_pwm at32_pwm_obj[] =
 {
   #ifdef BSP_USING_TMR1_CH1
     PWM1_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR1_CH2
     PWM2_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR1_CH3
     PWM3_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR1_CH4
     PWM4_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR2_CH1
     PWM5_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR2_CH2
     PWM6_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR2_CH3
     PWM7_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR2_CH4
     PWM8_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR3_CH1
     PWM9_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR3_CH2
     PWM10_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR3_CH3
     PWM11_CONFIG,
   #endif
-  
+
   #ifdef BSP_USING_TMR3_CH4
     PWM12_CONFIG,
   #endif
@@ -97,7 +97,7 @@ static struct rt_pwm_ops drv_ops =
 static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *configuration, rt_bool_t enable)
 {
     /* Get the value of channel */
-    rt_uint32_t channel = configuration->channel;   
+    rt_uint32_t channel = configuration->channel;
 
     if (!enable)
     {
@@ -137,7 +137,7 @@ static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *conf
           TMR_CCxCmd(TMRx, TMR_Channel_1, TMR_CCx_Enable);
         }
     }
-    
+
     /* TMRx enable counter */
     TMR_Cmd(TMRx, ENABLE);
 
@@ -173,7 +173,7 @@ static rt_err_t drv_pwm_get(TMR_Type* TMRx, struct rt_pwm_configuration *configu
       configuration->pulse = (cc3 + 1) * (div + 1) * 1000UL / tim_clock;
     if(channel == 4)
       configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock;
-       
+
     return RT_EOK;
 }
 
@@ -185,15 +185,15 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
     rt_uint64_t psc;
     /* Get the channel number */
     rt_uint32_t channel = configuration->channel;
-    
+
     /* Init timer pin and enable clock */
     at32_msp_tmr_init(TMRx);
-  
+
     /* Convert nanosecond to frequency and duty cycle. */
     period = (unsigned long long)configuration->period ;
     psc = period / MAX_PERIOD + 1;
     period = period / psc;
-  
+
     /* TMRe base configuration */
     TMR_TimeBaseStructInit(&TMR_TMReBaseStructure);
     TMR_TMReBaseStructure.TMR_Period = period;
@@ -204,14 +204,14 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
     TMR_TimeBaseInit(TMRx, &TMR_TMReBaseStructure);
 
     pulse = (unsigned long long)configuration->pulse;
-    
+
     /* PWM1 Mode configuration: Channel1 */
     TMR_OCStructInit(&TMR_OCInitStructure);
     TMR_OCInitStructure.TMR_OCMode = TMR_OCMode_PWM1;
     TMR_OCInitStructure.TMR_OutputState = TMR_OutputState_Enable;
     TMR_OCInitStructure.TMR_Pulse = pulse;
     TMR_OCInitStructure.TMR_OCPolarity = TMR_OCPolarity_High;
-    
+
     if(channel == 1)
     {
       TMR_OC1Init(TMRx, &TMR_OCInitStructure);
@@ -232,7 +232,7 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
       TMR_OC4Init(TMRx, &TMR_OCInitStructure);
       TMR_OC4PreloadConfig(TMRx, TMR_OCPreload_Enable);
     }
-    
+
     TMR_ARPreloadConfig(TMRx, ENABLE);
 
 #if defined (SOC_SERIES_AT32F415)
@@ -271,7 +271,7 @@ static int rt_hw_pwm_init(void)
 {
     int i = 0;
     int result = RT_EOK;
- 
+
     for(i = 0; i < sizeof(at32_pwm_obj) / sizeof(at32_pwm_obj[0]); i++)
     {
         if(rt_device_pwm_register(&at32_pwm_obj[i].pwm_device, at32_pwm_obj[i].name, &drv_ops, at32_pwm_obj[i].tim_handle) == RT_EOK)
@@ -280,9 +280,9 @@ static int rt_hw_pwm_init(void)
         }
         else
         {
-          LOG_D("%s register failed", at32_pwm_obj[i].name); 
-          result = -RT_ERROR; 
-        }            
+          LOG_D("%s register failed", at32_pwm_obj[i].name);
+          result = -RT_ERROR;
+        }
     }
 
     return result;
diff --git a/bsp/at32/Libraries/rt_drivers/drv_pwm.h b/bsp/at32/Libraries/rt_drivers/drv_pwm.h
index 6cdcfc6415..720a810f79 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_pwm.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_pwm.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,7 +28,7 @@ extern "C" {
   }
 #endif /* PWM1_CONFIG */
 #endif /* BSP_USING_TMR1_CH1 */
-  
+
 #ifdef BSP_USING_TMR1_CH2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG              \
@@ -72,7 +72,7 @@ extern "C" {
   }
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_TMR2_CH1 */
-  
+
 #ifdef BSP_USING_TMR2_CH2
 #ifndef PWM6_CONFIG
 #define PWM6_CONFIG              \
@@ -82,8 +82,8 @@ extern "C" {
     .channel      = 2            \
   }
 #endif /* PWM6_CONFIG */
-#endif /* BSP_USING_TMR2_CH2 */  
-  
+#endif /* BSP_USING_TMR2_CH2 */
+
 #ifdef BSP_USING_TMR2_CH3
 #ifndef PWM7_CONFIG
 #define PWM7_CONFIG              \
@@ -93,7 +93,7 @@ extern "C" {
     .channel      = 3            \
   }
 #endif /* PWM7_CONFIG */
-#endif /* BSP_USING_TMR2_CH3 */  
+#endif /* BSP_USING_TMR2_CH3 */
 
 #ifdef BSP_USING_TMR2_CH4
 #ifndef PWM8_CONFIG
@@ -115,7 +115,7 @@ extern "C" {
     .channel      = 1            \
   }
 #endif /* PWM9_CONFIG */
-#endif /* BSP_USING_TMR3_CH1 */   
+#endif /* BSP_USING_TMR3_CH1 */
 
 #ifdef BSP_USING_TMR3_CH2
 #ifndef PWM10_CONFIG
@@ -149,7 +149,7 @@ extern "C" {
   }
 #endif /* PWM12_CONFIG */
 #endif /* BSP_USING_TMR3_CH4 */
-  
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/bsp/at32/Libraries/rt_drivers/drv_rtc.c b/bsp/at32/Libraries/rt_drivers/drv_rtc.c
index bd4d89a9ed..d943123e88 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_rtc.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_rtc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -79,10 +79,10 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
         return -RT_ERROR;
     }
 #else
-	/* Set the RTC counter value */
-	RTC_SetCounter(time_stamp);
-	/* Wait until last write operation on RTC registers has finished */
-	RTC_WaitForLastTask();
+    /* Set the RTC counter value */
+    RTC_SetCounter(time_stamp);
+    /* Wait until last write operation on RTC registers has finished */
+    RTC_WaitForLastTask();
 #endif /* SOC_SERIES_AT32F415 */
     LOG_D("set rtc time.");
 #ifdef SOC_SERIES_AT32F415
@@ -117,7 +117,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev)
     ERTC_InitType ERTC_InitStructure;
 #endif
     /* Allow access to BKP Domain */
-    PWR_BackupAccessCtrl(ENABLE); 
+    PWR_BackupAccessCtrl(ENABLE);
 
 #ifdef SOC_SERIES_AT32F415
   #ifdef BSP_RTC_USING_LSI
@@ -148,7 +148,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev)
 #else
     if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA)
 #endif
-  	{
+    {
         LOG_I("RTC hasn't been configured, please use <date> command to config.");
 #ifdef SOC_SERIES_AT32F415
         /* Configure the ERTC data register and ERTC prescaler */
diff --git a/bsp/at32/Libraries/rt_drivers/drv_sdio.c b/bsp/at32/Libraries/rt_drivers/drv_sdio.c
index eb721033b5..9bbfa910c2 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_sdio.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_sdio.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_sdio.h b/bsp/at32/Libraries/rt_drivers/drv_sdio.h
index cd0f05b9fb..de993881c9 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_sdio.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_sdio.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c
index 266209c245..3112da34f8 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -205,10 +205,10 @@ int rt_hw_i2c_init(void)
         result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name);
         RT_ASSERT(result == RT_EOK);
         at32_i2c_bus_unlock(&soft_i2c_config[i]);
-        
+
         LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
-        soft_i2c_config[i].bus_name, 
-        soft_i2c_config[i].scl, 
+        soft_i2c_config[i].bus_name,
+        soft_i2c_config[i].scl,
         soft_i2c_config[i].sda);
     }
 
diff --git a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h
index 2743259ef6..193c8cd4aa 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -37,7 +37,7 @@ struct at32_i2c
         .bus_name = "i2c1",                              \
     }
 #endif
-    
+
 #ifdef BSP_USING_I2C2
 #define i2c_bus_CONFIG                                   \
     {                                                    \
@@ -46,7 +46,7 @@ struct at32_i2c
         .bus_name = "i2c2",                              \
     }
 #endif
-    
+
 #ifdef BSP_USING_I2C3
 #define I2C3_BUS_CONFIG                                  \
     {                                                    \
@@ -55,7 +55,7 @@ struct at32_i2c
         .bus_name = "i2c3",                              \
     }
 #endif
-		
+
 #ifdef BSP_USING_I2C4
 #define I2C4_BUS_CONFIG                                  \
     {                                                    \
diff --git a/bsp/at32/Libraries/rt_drivers/drv_spi.c b/bsp/at32/Libraries/rt_drivers/drv_spi.c
index c7821d4053..161845702f 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_spi.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_spi.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2020-01-09     shelton      first version
  */
- 
+
 #include <board.h>
 #include "drv_spi.h"
 
@@ -24,7 +24,7 @@
 #ifdef DEBUG
 #define DEBUG_PRINTF(...)   rt_kprintf(__VA_ARGS__)
 #else
-#define DEBUG_PRINTF(...)   
+#define DEBUG_PRINTF(...)
 #endif
 
 /* private rt-thread spi ops function */
@@ -81,13 +81,13 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
 static rt_err_t configure(struct rt_spi_device* device,
                           struct rt_spi_configuration* configuration)
 {
-    struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;	
+    struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
     struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data;
-    
+
     SPI_InitType SPI_InitStruct;
 
-	  RT_ASSERT(device != RT_NULL);
-	  RT_ASSERT(configuration != RT_NULL);
+      RT_ASSERT(device != RT_NULL);
+      RT_ASSERT(configuration != RT_NULL);
 
     at32_msp_spi_init(spi_instance->config->spix);
 
@@ -162,7 +162,7 @@ static rt_err_t configure(struct rt_spi_device* device,
             SPI_InitStruct.SPI_MCLKP = SPI_MCLKP_256;
         }
     } /* baudrate */
-    
+
     switch(configuration->mode & RT_SPI_MODE_3)
     {
     case RT_SPI_MODE_0:
@@ -172,11 +172,11 @@ static rt_err_t configure(struct rt_spi_device* device,
     case RT_SPI_MODE_1:
         SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE;
         SPI_InitStruct.SPI_CPOL = SPI_CPOL_LOW;
-        break;        
+        break;
     case RT_SPI_MODE_2:
         SPI_InitStruct.SPI_CPHA = SPI_CPHA_1EDGE;
         SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH;
-        break;    
+        break;
     case RT_SPI_MODE_3:
         SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE;
         SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH;
@@ -200,7 +200,7 @@ static rt_err_t configure(struct rt_spi_device* device,
     /* init SPI */
     SPI_Init(spi_instance->config->spix, &SPI_InitStruct);
     /* Enable SPI_MASTER */
-	  SPI_Enable(spi_instance->config->spix, ENABLE);
+      SPI_Enable(spi_instance->config->spix, ENABLE);
     SPI_CRCEN(spi_instance->config->spix, DISABLE);
 
     return RT_EOK;
@@ -213,9 +213,9 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
     struct rt_spi_configuration * config = &device->config;
     struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
 
-	  RT_ASSERT(device != NULL);
-	  RT_ASSERT(message != NULL);
-	
+      RT_ASSERT(device != NULL);
+      RT_ASSERT(message != NULL);
+
     /* take CS */
     if(message->cs_take)
     {
@@ -229,7 +229,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
             const rt_uint8_t * send_ptr = message->send_buf;
             rt_uint8_t * recv_ptr = message->recv_buf;
             rt_uint32_t size = message->length;
-            
+
             DEBUG_PRINTF("spi poll transfer start: %d\n", size);
 
             while(size--)
@@ -240,12 +240,12 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
                 {
                     data = *send_ptr++;
                 }
-                
+
                 // Todo: replace register read/write by at32 lib
                 //Wait until the transmit buffer is empty
                 while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
                 // Send the byte
-				        SPI_I2S_TxData(spi_instance->config->spix, data);
+                        SPI_I2S_TxData(spi_instance->config->spix, data);
 
                 //Wait until a data is received
                 while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@@ -277,7 +277,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
                 //Wait until the transmit buffer is empty
                 while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
                 // Send the byte
-				        SPI_I2S_TxData(spi_instance->config->spix, data);
+                        SPI_I2S_TxData(spi_instance->config->spix, data);
 
                 //Wait until a data is received
                 while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@@ -295,7 +295,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
     /* release CS */
     if(message->cs_release)
     {
-		    GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
+            GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
         DEBUG_PRINTF("spi release cs\n");
     }
 
@@ -306,7 +306,7 @@ static struct at32_spi_config configs[] = {
 #ifdef BSP_USING_SPI1
     {SPI1, "spi1"},
 #endif
-    
+
 #ifdef BSP_USING_SPI2
     {SPI2, "spi2"},
 #endif
diff --git a/bsp/at32/Libraries/rt_drivers/drv_spi.h b/bsp/at32/Libraries/rt_drivers/drv_spi.h
index d3134b00f0..cd90c9b2b0 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_spi.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_spi.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_sram.c b/bsp/at32/Libraries/rt_drivers/drv_sram.c
index e601b0e1a5..d77b900728 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_sram.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_sram.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -38,7 +38,7 @@ static int rt_hw_sram_Init(void)
 
     /* Init XMC pin */
     at32_msp_xmc_init(XMC);
-    
+
     /*-- FSMC Configuration ------------------------------------------------------*/
     p.XMC_AdrOpTime         = 0x04;
     p.XMC_AdrHoldTime       = 0x04;
@@ -53,7 +53,7 @@ static int rt_hw_sram_Init(void)
     XMC_NORSRAMInitStructure.XMC_Dev                    = XMC_Dev_SRAM;
     XMC_NORSRAMInitStructure.XMC_BusType                = XMC_BusType_16b;
     XMC_NORSRAMInitStructure.XMC_EnableBurstMode        = XMC_BurstMode_Disable;
-    XMC_NORSRAMInitStructure.XMC_EnableAsynWait         = XMC_AsynWait_Disable;  
+    XMC_NORSRAMInitStructure.XMC_EnableAsynWait         = XMC_AsynWait_Disable;
     XMC_NORSRAMInitStructure.XMC_WaitSignalLv           = XMC_WaitSignalLv_Low;
     XMC_NORSRAMInitStructure.XMC_EnableBurstModeSplit   = XMC_BurstModeSplit_Disable;
     XMC_NORSRAMInitStructure.XMC_WaitSignalConfig       = XMC_WaitSignalConfig_BeforeWaitState;
@@ -63,9 +63,9 @@ static int rt_hw_sram_Init(void)
     XMC_NORSRAMInitStructure.XMC_WriteBurstSyn          = XMC_WriteBurstSyn_Disable;
     XMC_NORSRAMInitStructure.XMC_RWTimingStruct         = &p;
     XMC_NORSRAMInitStructure.XMC_WTimingStruct          = &p;
-    
-    XMC_NORSRAMInit(&XMC_NORSRAMInitStructure); 
-    
+
+    XMC_NORSRAMInit(&XMC_NORSRAMInitStructure);
+
     /*!< Enable FSMC Bank1_SRAM Bank */
     XMC_NORSRAMCmd(XMC_Bank1_NORSRAM3, ENABLE);
 
@@ -73,7 +73,7 @@ static int rt_hw_sram_Init(void)
         /* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */
         rt_memheap_init(&system_heap, "sram", (void *)EXT_SRAM_BEGIN, SRAM_LENGTH);
 #endif
-    
+
     return result;
 }
 INIT_BOARD_EXPORT(rt_hw_sram_Init);
@@ -81,11 +81,11 @@ INIT_BOARD_EXPORT(rt_hw_sram_Init);
 #ifdef DRV_DEBUG
 #ifdef FINSH_USING_MSH
 /**
-  * @brief  Writes a Half-word buffer to the FSMC SRAM memory. 
-  * @param  pBuffer : pointer to buffer. 
-  * @param  WriteAddr : SRAM memory internal address from which the data will be 
+  * @brief  Writes a Half-word buffer to the FSMC SRAM memory.
+  * @param  pBuffer : pointer to buffer.
+  * @param  WriteAddr : SRAM memory internal address from which the data will be
   *         written.
-  * @param  NumHalfwordToWrite : number of half-words to write. 
+  * @param  NumHalfwordToWrite : number of half-words to write.
   * @retval None
   */
 static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
@@ -94,15 +94,15 @@ static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t Num
   {
     /*!< Transfer data to the memory */
     *(uint16_t *) (EXT_SRAM_BEGIN + WriteAddr) = *pBuffer++;
-    
-    /*!< Increment the address*/  
+
+    /*!< Increment the address*/
     WriteAddr += 2;
-  }   
+  }
 }
 
 /**
   * @brief  Reads a block of data from the FSMC SRAM memory.
-  * @param  pBuffer : pointer to the buffer that receives the data read from the 
+  * @param  pBuffer : pointer to the buffer that receives the data read from the
   *         SRAM memory.
   * @param  ReadAddr : SRAM memory internal address to read from.
   * @param  NumHalfwordToRead : number of half-words to read.
@@ -115,9 +115,9 @@ static void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHa
     /*!< Read a half-word from the memory */
     *pBuffer++ = *(__IO uint16_t*) (EXT_SRAM_BEGIN + ReadAddr);
 
-    /*!< Increment the address*/  
+    /*!< Increment the address*/
     ReadAddr += 2;
-  }  
+  }
 }
 
 /**
@@ -146,9 +146,9 @@ int sram_test(void)
 
 
     /* Read data from XMC SRAM memory */
-    SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE);  
+    SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE);
 
-    /* Read back SRAM memory and check content correctness */   
+    /* Read back SRAM memory and check content correctness */
     for (Index = 0x00; (Index < RT_BUFFER_SIZE) && (WriteReadStatus == 0); Index++)
     {
         if (RT_RxBuffer[Index] != RT_TxBuffer[Index])
@@ -156,7 +156,7 @@ int sram_test(void)
             WriteReadStatus = Index + 1;
         }
     }
-    
+
     if(WriteReadStatus == 0)
     {
         LOG_D("SRAM test success!");
@@ -165,7 +165,7 @@ int sram_test(void)
     {
         LOG_E("SRAM test failed!");
     }
-    
+
     return RT_EOK;
 }
 MSH_CMD_EXPORT(sram_test, sram test)
diff --git a/bsp/at32/Libraries/rt_drivers/drv_sram.h b/bsp/at32/Libraries/rt_drivers/drv_sram.h
index 05b07e4155..0f83c429d8 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_sram.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_sram.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_usart.c b/bsp/at32/Libraries/rt_drivers/drv_usart.c
index 226d9afeda..04838bf2ac 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_usart.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_usart.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -15,7 +15,7 @@
 #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
     !defined(BSP_USING_UART3)
     #error "Please define at least one BSP_USING_UARTx"
-    /* this driver can be disabled at menuconfig �� RT-Thread Components �� Device Drivers */
+    /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
 #endif
 
 struct at32_usart {
diff --git a/bsp/at32/Libraries/rt_drivers/drv_usart.h b/bsp/at32/Libraries/rt_drivers/drv_usart.h
index 1002a6fd51..fc493d42da 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_usart.h
+++ b/bsp/at32/Libraries/rt_drivers/drv_usart.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/Libraries/rt_drivers/drv_wdt.c b/bsp/at32/Libraries/rt_drivers/drv_wdt.c
index 8ab3de703d..0b304ad1ff 100644
--- a/bsp/at32/Libraries/rt_drivers/drv_wdt.c
+++ b/bsp/at32/Libraries/rt_drivers/drv_wdt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/at32f403a-start/applications/main.c b/bsp/at32/at32f403a-start/applications/main.c
index cb63824e27..0234d32b04 100644
--- a/bsp/at32/at32f403a-start/applications/main.c
+++ b/bsp/at32/at32f403a-start/applications/main.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/at32f403a-start/board/board.c b/bsp/at32/at32f403a-start/board/board.c
index 4ce5bb3909..27b672b4da 100644
--- a/bsp/at32/at32f403a-start/board/board.c
+++ b/bsp/at32/at32f403a-start/board/board.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     balanceTWK   first version
  */
- 
+
 #include <stdint.h>
 #include <rthw.h>
 #include <rtthread.h>
diff --git a/bsp/at32/at32f403a-start/board/board.h b/bsp/at32/at32f403a-start/board/board.h
index 976863d3eb..1f2a4f3f3c 100644
--- a/bsp/at32/at32f403a-start/board/board.h
+++ b/bsp/at32/at32f403a-start/board/board.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/at32f403a-start/board/msp/at32_msp.c b/bsp/at32/at32f403a-start/board/msp/at32_msp.c
index 1392b0e0cf..5d159850cc 100644
--- a/bsp/at32/at32f403a-start/board/msp/at32_msp.c
+++ b/bsp/at32/at32f403a-start/board/msp/at32_msp.c
@@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance)
     GPIO_InitType GPIO_InitStruct;
     ADC_Type *ADCx = (ADC_Type *)Instance;
 
-#ifdef BSP_USING_ADC1  
+#ifdef BSP_USING_ADC1
     if(ADCx == ADC1)
-    {   
+    {
         /* ADC1 & GPIO clock enable */
         RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
-		
-        /* Configure ADC Channel as analog input */      
+
+        /* Configure ADC Channel as analog input */
         GPIO_StructInit(&GPIO_InitStruct);
         GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
         GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
         GPIO_Init(GPIOC, &GPIO_InitStruct);
-        
+
     }
 #endif
 
-#ifdef BSP_USING_ADC2  
+#ifdef BSP_USING_ADC2
     if(ADCx == ADC2)
     {
         /* ADC2 & GPIO clock enable */
         RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
-      
-        /* Configure ADC Channel as analog input */      
+
+        /* Configure ADC Channel as analog input */
         GPIO_StructInit(&GPIO_InitStruct);
         GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
         GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
         GPIO_Init(GPIOC, &GPIO_InitStruct);
     }
-#endif     
+#endif
 }
 #endif /* BSP_USING_ADC */
 
@@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance)
         /* TMR3 clock enable */
         RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
     }
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR4
     if(TMRx == TMR4)
diff --git a/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c b/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
index ce151e2d4a..edd9b8d1d6 100644
--- a/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
+++ b/bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
@@ -17,7 +17,7 @@
   *
   * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
   ******************************************************************************
-  */ 
+  */
 
 /** @addtogroup CMSIS
   * @{
@@ -68,23 +68,23 @@
 
       Clock (MHz)
           PLL from HSE or HSI
-          SYSCLK	    HCLK	PCLK2	PCLK1
-          24	        24	    24	    24
-          36	        36	    36	    36
-          48	        48	    48	    24
-          56	        56	    56	    28
-          72	        72	    72	    36
-          96	        96	    48	    48
-          108	        108	    54	    54
-          120	        120	    60	    60
-          144	        144	    72	    72
-          150	        150	    75	    75
-          168	        168	    84	    84
-          176	        176	    88	    88
-          192	        192	    96	    96
-          200	        200	    100	    100
-          224	        224	    112	    112
-          240	        240	    120	    120
+          SYSCLK        HCLK    PCLK2   PCLK1
+          24            24      24      24
+          36            36      36      36
+          48            48      48      24
+          56            56      56      28
+          72            72      72      36
+          96            96      48      48
+          108           108     54      54
+          120           120     60      60
+          144           144     72      72
+          150           150     75      75
+          168           168     84      84
+          176           176     88      88
+          192           192     96      96
+          200           200     100     100
+          224           224     112     112
+          240           240     120     120
     */
 
 #if defined (AT32F403xx) || defined (AT32F413xx) || \
@@ -143,7 +143,7 @@
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */
 /* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
+#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field.
 This value must be a multiple of 0x200. */
 
 
@@ -573,7 +573,7 @@ static void SetSysClock(void)
 /**
   * @brief  Setup the external memory controller.
   *         Called in startup_at32f4xx_xx.s/.c before jump to main.
-  * 	      This function configures the external SRAM mounted
+  *           This function configures the external SRAM mounted
   *         (AT32 High density devices). This SRAM will be used as program
   *         data memory (including heap and stack).
   * @param  None
@@ -654,7 +654,7 @@ static void SetSysClockToHSE(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -674,7 +674,7 @@ static void SetSysClockToHSE(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -725,7 +725,7 @@ static void SetSysClockTo24M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -745,7 +745,7 @@ static void SetSysClockTo24M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -811,7 +811,7 @@ static void SetSysClockTo36M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -831,7 +831,7 @@ static void SetSysClockTo36M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -897,7 +897,7 @@ static void SetSysClockTo48M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -917,7 +917,7 @@ static void SetSysClockTo48M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -984,7 +984,7 @@ static void SetSysClockTo56M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1004,7 +1004,7 @@ static void SetSysClockTo56M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1071,7 +1071,7 @@ static void SetSysClockTo72M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1091,7 +1091,7 @@ static void SetSysClockTo72M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1158,7 +1158,7 @@ static void SetSysClockTo96M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1178,7 +1178,7 @@ static void SetSysClockTo96M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1249,7 +1249,7 @@ static void SetSysClockTo108M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1269,7 +1269,7 @@ static void SetSysClockTo108M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1341,7 +1341,7 @@ static void SetSysClockTo120M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1361,7 +1361,7 @@ static void SetSysClockTo120M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1440,7 +1440,7 @@ static void SetSysClockTo144M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1460,7 +1460,7 @@ static void SetSysClockTo144M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1475,7 +1475,7 @@ static void SetSysClockTo144M(void)
 
     /*  PLL configuration: PLLCLK = HSE * 18 = 144 MHz */
     RCC->CFG &= RCC_CFG_PLLCFG_MASK;
-    
+
 #if defined (AT32F415xx)
     RCC->CFG |= (uint32_t)(RCC_CFG_PLLRC_HSE | RCC_CFG_PLLMULT18);
 #else
@@ -1539,7 +1539,7 @@ static void SetSysClockTo150M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1559,7 +1559,7 @@ static void SetSysClockTo150M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1634,7 +1634,7 @@ static void SetSysClockTo168M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1720,7 +1720,7 @@ static void SetSysClockTo176M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1806,7 +1806,7 @@ static void SetSysClockTo192M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1892,7 +1892,7 @@ static void SetSysClockTo200M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1978,7 +1978,7 @@ static void SetSysClockTo224M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -2064,7 +2064,7 @@ static void SetSysClockTo240M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -2168,7 +2168,7 @@ static void SetSysClockTo24MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2248,7 +2248,7 @@ static void SetSysClockTo36MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2328,7 +2328,7 @@ static void SetSysClockTo48MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2408,7 +2408,7 @@ static void SetSysClockTo56MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2488,7 +2488,7 @@ static void SetSysClockTo72MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2568,7 +2568,7 @@ static void SetSysClockTo96MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2653,7 +2653,7 @@ static void SetSysClockTo108MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2738,7 +2738,7 @@ static void SetSysClockTo120MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2830,7 +2830,7 @@ static void SetSysClockTo144MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2922,7 +2922,7 @@ static void SetSysClockTo150MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -3454,4 +3454,4 @@ static void SetSysClockTo240MHSI(void)
   * @}
   */
 
-/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ 
+/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/
diff --git a/bsp/at32/at32f407-start/applications/main.c b/bsp/at32/at32f407-start/applications/main.c
index cb63824e27..0234d32b04 100644
--- a/bsp/at32/at32f407-start/applications/main.c
+++ b/bsp/at32/at32f407-start/applications/main.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/at32f407-start/board/board.c b/bsp/at32/at32f407-start/board/board.c
index 4ce5bb3909..27b672b4da 100644
--- a/bsp/at32/at32f407-start/board/board.c
+++ b/bsp/at32/at32f407-start/board/board.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-11-06     balanceTWK   first version
  */
- 
+
 #include <stdint.h>
 #include <rthw.h>
 #include <rtthread.h>
diff --git a/bsp/at32/at32f407-start/board/board.h b/bsp/at32/at32f407-start/board/board.h
index 976863d3eb..1f2a4f3f3c 100644
--- a/bsp/at32/at32f407-start/board/board.h
+++ b/bsp/at32/at32f407-start/board/board.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/at32/at32f407-start/board/msp/at32_msp.c b/bsp/at32/at32f407-start/board/msp/at32_msp.c
index 1392b0e0cf..5d159850cc 100644
--- a/bsp/at32/at32f407-start/board/msp/at32_msp.c
+++ b/bsp/at32/at32f407-start/board/msp/at32_msp.c
@@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance)
     GPIO_InitType GPIO_InitStruct;
     ADC_Type *ADCx = (ADC_Type *)Instance;
 
-#ifdef BSP_USING_ADC1  
+#ifdef BSP_USING_ADC1
     if(ADCx == ADC1)
-    {   
+    {
         /* ADC1 & GPIO clock enable */
         RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
-		
-        /* Configure ADC Channel as analog input */      
+
+        /* Configure ADC Channel as analog input */
         GPIO_StructInit(&GPIO_InitStruct);
         GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
         GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
         GPIO_Init(GPIOC, &GPIO_InitStruct);
-        
+
     }
 #endif
 
-#ifdef BSP_USING_ADC2  
+#ifdef BSP_USING_ADC2
     if(ADCx == ADC2)
     {
         /* ADC2 & GPIO clock enable */
         RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
-      
-        /* Configure ADC Channel as analog input */      
+
+        /* Configure ADC Channel as analog input */
         GPIO_StructInit(&GPIO_InitStruct);
         GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
         GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
         GPIO_Init(GPIOC, &GPIO_InitStruct);
     }
-#endif     
+#endif
 }
 #endif /* BSP_USING_ADC */
 
@@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance)
         /* TMR3 clock enable */
         RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
     }
-#endif 
+#endif
 
 #ifdef BSP_USING_HWTMR4
     if(TMRx == TMR4)
diff --git a/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c b/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
index efda1bc90b..3205197d67 100644
--- a/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
+++ b/bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
@@ -17,7 +17,7 @@
   *
   * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
   ******************************************************************************
-  */ 
+  */
 
 /** @addtogroup CMSIS
   * @{
@@ -68,23 +68,23 @@
 
       Clock (MHz)
           PLL from HSE or HSI
-          SYSCLK	    HCLK	PCLK2	PCLK1
-          24	        24	    24	    24
-          36	        36	    36	    36
-          48	        48	    48	    24
-          56	        56	    56	    28
-          72	        72	    72	    36
-          96	        96	    48	    48
-          108	        108	    54	    54
-          120	        120	    60	    60
-          144	        144	    72	    72
-          150	        150	    75	    75
-          168	        168	    84	    84
-          176	        176	    88	    88
-          192	        192	    96	    96
-          200	        200	    100	    100
-          224	        224	    112	    112
-          240	        240	    120	    120
+          SYSCLK        HCLK    PCLK2   PCLK1
+          24            24      24      24
+          36            36      36      36
+          48            48      48      24
+          56            56      56      28
+          72            72      72      36
+          96            96      48      48
+          108           108     54      54
+          120           120     60      60
+          144           144     72      72
+          150           150     75      75
+          168           168     84      84
+          176           176     88      88
+          192           192     96      96
+          200           200     100     100
+          224           224     112     112
+          240           240     120     120
     */
 
 #if defined (AT32F403xx) || defined (AT32F413xx) || \
@@ -143,7 +143,7 @@
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */
 /* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
+#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field.
 This value must be a multiple of 0x200. */
 
 
@@ -573,7 +573,7 @@ static void SetSysClock(void)
 /**
   * @brief  Setup the external memory controller.
   *         Called in startup_at32f4xx_xx.s/.c before jump to main.
-  * 	      This function configures the external SRAM mounted
+  *           This function configures the external SRAM mounted
   *         (AT32 High density devices). This SRAM will be used as program
   *         data memory (including heap and stack).
   * @param  None
@@ -654,7 +654,7 @@ static void SetSysClockToHSE(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -674,7 +674,7 @@ static void SetSysClockToHSE(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -725,7 +725,7 @@ static void SetSysClockTo24M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -745,7 +745,7 @@ static void SetSysClockTo24M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -811,7 +811,7 @@ static void SetSysClockTo36M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -831,7 +831,7 @@ static void SetSysClockTo36M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -897,7 +897,7 @@ static void SetSysClockTo48M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -917,7 +917,7 @@ static void SetSysClockTo48M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -984,7 +984,7 @@ static void SetSysClockTo56M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1004,7 +1004,7 @@ static void SetSysClockTo56M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1071,7 +1071,7 @@ static void SetSysClockTo72M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1091,7 +1091,7 @@ static void SetSysClockTo72M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1158,7 +1158,7 @@ static void SetSysClockTo96M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1178,7 +1178,7 @@ static void SetSysClockTo96M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1249,7 +1249,7 @@ static void SetSysClockTo108M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1269,7 +1269,7 @@ static void SetSysClockTo108M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1341,7 +1341,7 @@ static void SetSysClockTo120M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1361,7 +1361,7 @@ static void SetSysClockTo120M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1440,7 +1440,7 @@ static void SetSysClockTo144M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1460,7 +1460,7 @@ static void SetSysClockTo144M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1475,7 +1475,7 @@ static void SetSysClockTo144M(void)
 
     /*  PLL configuration: PLLCLK = HSE * 18 = 144 MHz */
     RCC->CFG &= RCC_CFG_PLLCFG_MASK;
-    
+
 #if defined (AT32F415xx)
     RCC->CFG |= (uint32_t)(RCC_CFG_PLLRC_HSE | RCC_CFG_PLLMULT18);
 #else
@@ -1539,7 +1539,7 @@ static void SetSysClockTo150M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1559,7 +1559,7 @@ static void SetSysClockTo150M(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -1634,7 +1634,7 @@ static void SetSysClockTo168M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1720,7 +1720,7 @@ static void SetSysClockTo176M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1806,7 +1806,7 @@ static void SetSysClockTo192M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1892,7 +1892,7 @@ static void SetSysClockTo200M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -1978,7 +1978,7 @@ static void SetSysClockTo224M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -2064,7 +2064,7 @@ static void SetSysClockTo240M(void)
     StartUpCounter++;
   }
   while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-#ifdef AT32F403xx 
+#ifdef AT32F403xx
   WaitHseStbl(HSE_STABLE_DELAY);
 #endif
   if ((RCC->CTRL & RCC_CTRL_HSESTBL) != RESET)
@@ -2168,7 +2168,7 @@ static void SetSysClockTo24MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2248,7 +2248,7 @@ static void SetSysClockTo36MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2328,7 +2328,7 @@ static void SetSysClockTo48MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2408,7 +2408,7 @@ static void SetSysClockTo56MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2488,7 +2488,7 @@ static void SetSysClockTo72MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2568,7 +2568,7 @@ static void SetSysClockTo96MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2653,7 +2653,7 @@ static void SetSysClockTo108MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2738,7 +2738,7 @@ static void SetSysClockTo120MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_3;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2830,7 +2830,7 @@ static void SetSysClockTo144MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -2922,7 +2922,7 @@ static void SetSysClockTo150MHSI(void)
 
     /* Flash 1 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_4;
 #endif
     /* HCLK = SYSCLK */
     RCC->CFG |= (uint32_t)RCC_CFG_AHBPSC_DIV1;
@@ -3454,4 +3454,4 @@ static void SetSysClockTo240MHSI(void)
   * @}
   */
 
-/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/ 
+/******************* (C) COPYRIGHT 2018 ArteryTek *****END OF FILE****/
diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
index 4749ba51ef..9b4eb0a15f 100644
--- a/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
@@ -182,7 +182,7 @@ static void rt_rtc_init(void)
     hal_rtc_init();
 }
 
-static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
+static rt_err_t ab32_rtc_control(rt_device_t dev, int cmd, void *args)
 {
     rt_err_t result = RT_EOK;
     RT_ASSERT(dev != RT_NULL);
@@ -224,7 +224,7 @@ const static struct rt_device_ops rtc_ops =
     RT_NULL,
     RT_NULL,
     RT_NULL,
-    rt_rtc_control
+    ab32_rtc_control
 };
 #endif
 
@@ -241,7 +241,7 @@ static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint
     device->close       = RT_NULL;
     device->read        = RT_NULL;
     device->write       = RT_NULL;
-    device->control     = rt_rtc_control;
+    device->control     = ab32_rtc_control;
 #endif
     device->type        = RT_Device_Class_RTC;
     device->rx_indicate = RT_NULL;
diff --git a/bsp/efm32/EFM32GG_DK3750/dvk.h b/bsp/efm32/EFM32GG_DK3750/dvk.h
index 41af36b264..870c8b4121 100644
--- a/bsp/efm32/EFM32GG_DK3750/dvk.h
+++ b/bsp/efm32/EFM32GG_DK3750/dvk.h
@@ -164,7 +164,7 @@ int  DVK_BRD3600A_usbVBUSGetOCFlagState(void);
 
 /* For "backward compatibility" with DVK */
 /** DVK_enablePeripheral() backward compatibility */
-#define DVK_enablePeripheral(X)     DVK_peripheralAccess(X, true) 
+#define DVK_enablePeripheral(X)     DVK_peripheralAccess(X, true)
 /** DVK_disablePeripheral() backward compatibility */
 #define DVK_disablePeripheral(X)    DVK_peripheralAccess(X, false)
 
@@ -193,7 +193,7 @@ __STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
 /**************************************************************************//**
  * @brief Read data from 16-bit board control register
  * @param addr Register to read
- * @return Value of board controller register 
+ * @return Value of board controller register
  *****************************************************************************/
 __STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
 {
diff --git a/bsp/efm32/EFM32GG_DK3750/trace.c b/bsp/efm32/EFM32GG_DK3750/trace.c
index 5450de0270..2d5ffd71a5 100644
--- a/bsp/efm32/EFM32GG_DK3750/trace.c
+++ b/bsp/efm32/EFM32GG_DK3750/trace.c
@@ -125,7 +125,7 @@ void TRACE_SWOSetup(void)
 /**************************************************************************//**
  * @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750
  * @return true if energyAware Profiler/SWO is enabled, false if not
- * @note If first word of the user page is zero, this will not 
+ * @note If first word of the user page is zero, this will not
  *       enable SWO profiler output
  *****************************************************************************/
 bool TRACE_ProfilerSetup(void)
@@ -141,7 +141,7 @@ bool TRACE_ProfilerSetup(void)
   {
     TRACE_SWOSetup();
     return true;
-  }  
+  }
 }
 
 /** @} (end group BSP) */
diff --git a/bsp/efm32/EFM32GG_DK3750/trace.h b/bsp/efm32/EFM32GG_DK3750/trace.h
index c45e35846c..0a812381ef 100644
--- a/bsp/efm32/EFM32GG_DK3750/trace.h
+++ b/bsp/efm32/EFM32GG_DK3750/trace.h
@@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void);
  *        for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
  *        no example project will enable SWO trace.
  * @param[in] enable
- * @note Add "em_msc.c" to build to use this function. 
+ * @note Add "em_msc.c" to build to use this function.
  *****************************************************************************/
 __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
 {
@@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
   data = *userpage;
   if(enable)
   {
-    if(data == 0xFFFFFFFF) 
+    if(data == 0xFFFFFFFF)
     {
       return;
     }
diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk.c b/bsp/efm32/EFM32_Gxxx_DK/dvk.c
index 38569358e5..b1489c6c79 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/dvk.c
+++ b/bsp/efm32/EFM32_Gxxx_DK/dvk.c
@@ -52,7 +52,7 @@ bool DVK_init(void)
 #endif
 #ifdef DVK_SPI_CONTROL
   ret = DVK_SPI_init();
-#endif  
+#endif
   if ( ret == false )
   {
     /* Board is configured in wrong mode, please restart KIT! */
diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h b/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h
index 813d22e545..70b427d7ff 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h
+++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h
@@ -73,7 +73,7 @@
 #define BC_HW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14)) /**< HW version */
 #define BC_FW_BUILDNO        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15)) /**< FW build number */
 #define BC_FW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16)) /**< FW version */
-#define BC_SCRATCH_COMMON    ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */ 
+#define BC_SCRATCH_COMMON    ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */
 #define BC_SCRATCH_EFM0      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18)) /**< Scratch EFM0 */
 #define BC_SCRATCH_EFM1      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19)) /**< Scratch EFM1 */
 #define BC_SCRATCH_EFM2      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A)) /**< Scratch EFM2 */
diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c
index 72855106fc..a309df8204 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c
+++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c
@@ -155,7 +155,7 @@ uint16_t DVK_getPushButtons(void)
   /* Check state */
   aemState = DVK_readRegister(BC_AEMSTATE);
   /* Read pushbutton status */
-  if ( aemState == BC_AEMSTATE_EFM ) 
+  if ( aemState == BC_AEMSTATE_EFM )
   {
     pb = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f;
   }
@@ -174,7 +174,7 @@ uint16_t DVK_getJoystick(void)
   /* Check state */
   aemState = DVK_readRegister(BC_AEMSTATE);
   /* Read pushbutton status */
-  if ( aemState == BC_AEMSTATE_EFM ) 
+  if ( aemState == BC_AEMSTATE_EFM )
   {
     joyStick = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f;
   }
diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c
index 02f6c0b303..0fed351767 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c
+++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c
@@ -163,7 +163,7 @@ bool DVK_EBI_init(void)
    * be configured for EBI access */
   ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
   while ((ebiMagic != BC_MAGIC_VALUE) && retry)
-  {    
+  {
     DVK_EBI_disable();
     /* Enable SPI interface */
     DVK_SPI_init();
@@ -172,13 +172,13 @@ bool DVK_EBI_init(void)
     DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI);
     /* Disable SPI */
     DVK_SPI_disable();
- 
+
     /* Now setup EBI again */
     DVK_EBI_configure();
     /* Wait until ready */
     ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
     if (ebiMagic == BC_MAGIC_VALUE) break;
-    
+
     retry--;
   }
   if ( ! retry ) return false;
diff --git a/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c b/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c
index 358b62bc9a..d4c536e21b 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c
+++ b/bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c
@@ -106,7 +106,7 @@ static void spiInit(void)
   /* Configure SPI bus connect pins, DOUT set to 0, disable EBI */
   GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0);
   GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1);
-  
+
   /* Configure SPI pins */
   GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
   GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0);
@@ -164,11 +164,11 @@ static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata)
   /* Just ignore data read back */
   USART_Rx(USART_USED);
 
-  /* SPI data LSB */ 
+  /* SPI data LSB */
   USART_Tx(USART_USED, spidata & 0xFF);
   tmp = (uint16_t)USART_Rx(USART_USED);
 
-  /* SPI data MSB */ 
+  /* SPI data MSB */
   USART_Tx(USART_USED, spidata >> 8);
   tmp |= (uint16_t)USART_Rx(USART_USED) << 8;
 
@@ -213,7 +213,7 @@ bool DVK_SPI_init(void)
   if(spiMagic != BC_MAGIC_VALUE)
   {
     return false;
-  } 
+  }
   else
   {
     return true;
diff --git a/bsp/efm32/EFM32_Gxxx_DK/trace.c b/bsp/efm32/EFM32_Gxxx_DK/trace.c
index 0ef4438a29..ef1617cc1f 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/trace.c
+++ b/bsp/efm32/EFM32_Gxxx_DK/trace.c
@@ -89,7 +89,7 @@ void TRACE_SWOSetup(void)
 /**************************************************************************//**
  * @brief Profiler configuration
  * @return true if energyAware Profiler/SWO is enabled, false if not
- * @note If first word of the user page is zero, this will not 
+ * @note If first word of the user page is zero, this will not
  *       enable SWO profiler output, see trace.h
  *****************************************************************************/
 bool TRACE_ProfilerSetup(void)
@@ -105,7 +105,7 @@ bool TRACE_ProfilerSetup(void)
   {
     TRACE_SWOSetup();
     return true;
-  }  
+  }
 }
 
 /** @} (end group BSP) */
diff --git a/bsp/efm32/EFM32_Gxxx_DK/trace.h b/bsp/efm32/EFM32_Gxxx_DK/trace.h
index 311e7ed357..1abb391a6c 100644
--- a/bsp/efm32/EFM32_Gxxx_DK/trace.h
+++ b/bsp/efm32/EFM32_Gxxx_DK/trace.h
@@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void);
  *        in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
  *        no example project will enable SWO trace.
  * @param[in] enable
- * @note Add "em_msc.c" to build to use this function. 
+ * @note Add "em_msc.c" to build to use this function.
  *****************************************************************************/
 __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
 {
@@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
   data = *userpage;
   if(enable)
   {
-    if(data == 0xFFFFFFFF) 
+    if(data == 0xFFFFFFFF)
     {
       return;
     }
@@ -81,7 +81,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
       return;
     }
   }
- 
+
   /* Initialize MSC */
   MSC_Init();
 
diff --git a/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h b/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
index 8c35ef2bd5..ee55e5dc79 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/arm_common_tables.h
@@ -1,24 +1,24 @@
-/* ---------------------------------------------------------------------- 
-* Copyright (C) 2010 ARM Limited. All rights reserved. 
-* 
-* $Date:        11. November 2010  
-* $Revision: 	V1.0.2  
-* 
-* Project: 	    CMSIS DSP Library 
-* Title:	    arm_common_tables.h 
-* 
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 
-* 
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010 ARM Limited. All rights reserved.
+*
+* $Date:        11. November 2010
+* $Revision:    V1.0.2
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
+*
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
 * Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.0.2 2010/11/11 
-*    Documentation updated.  
-* 
-* Version 1.0.1 2010/10/05  
-*    Production release and review comments incorporated. 
-* 
-* Version 1.0.0 2010/09/20  
-*    Production release and review comments incorporated. 
+*
+* Version 1.0.2 2010/11/11
+*    Documentation updated.
+*
+* Version 1.0.1 2010/10/05
+*    Production release and review comments incorporated.
+*
+* Version 1.0.0 2010/09/20
+*    Production release and review comments incorporated.
 * -------------------------------------------------------------------- */
 
 #ifndef _ARM_COMMON_TABLES_H
diff --git a/bsp/efm32/Libraries/CMSIS/Include/arm_math.h b/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
index 7266c3efb3..96e0b65a01 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/arm_math.h
@@ -1,33 +1,33 @@
-/* ----------------------------------------------------------------------   
- * Copyright (C) 2010-2011 ARM Limited. All rights reserved.   
- *   
- * $Date:        15. February 2012  
- * $Revision: 	V1.1.0  
- *   
- * Project: 	    CMSIS DSP Library   
- * Title:	     	arm_math.h
- *   
- * Description:	 Public header file for CMSIS DSP Library
- *   
+/* ----------------------------------------------------------------------
+ * Copyright (C) 2010-2011 ARM Limited. All rights reserved.
+ *
+ * $Date:        15. February 2012
+ * $Revision:   V1.1.0
+ *
+ * Project:         CMSIS DSP Library
+ * Title:           arm_math.h
+ *
+ * Description:  Public header file for CMSIS DSP Library
+ *
  * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
- *  
- * Version 1.1.0 2012/02/15 
- *    Updated with more optimizations, bug fixes and minor API changes.  
- *  
- * Version 1.0.10 2011/7/15 
- *    Big Endian support added and Merged M0 and M3/M4 Source code.  
- *   
- * Version 1.0.3 2010/11/29  
- *    Re-organized the CMSIS folders and updated documentation.   
- *    
- * Version 1.0.2 2010/11/11   
- *    Documentation updated.    
- *   
- * Version 1.0.1 2010/10/05    
- *    Production release and review comments incorporated.   
- *   
- * Version 1.0.0 2010/09/20    
- *    Production release and review comments incorporated.   
+ *
+ * Version 1.1.0 2012/02/15
+ *    Updated with more optimizations, bug fixes and minor API changes.
+ *
+ * Version 1.0.10 2011/7/15
+ *    Big Endian support added and Merged M0 and M3/M4 Source code.
+ *
+ * Version 1.0.3 2010/11/29
+ *    Re-organized the CMSIS folders and updated documentation.
+ *
+ * Version 1.0.2 2010/11/11
+ *    Documentation updated.
+ *
+ * Version 1.0.1 2010/10/05
+ *    Production release and review comments incorporated.
+ *
+ * Version 1.0.0 2010/09/20
+ *    Production release and review comments incorporated.
  * -------------------------------------------------------------------- */
 
 /**
@@ -35,10 +35,10 @@
    *
    * <b>Introduction</b>
    *
-   * This user manual describes the CMSIS DSP software library, 
+   * This user manual describes the CMSIS DSP software library,
    * a suite of common signal processing functions for use on Cortex-M processor based devices.
    *
-   * The library is divided into a number of functions each covering a specific category:  
+   * The library is divided into a number of functions each covering a specific category:
    * - Basic math functions
    * - Fast math functions
    * - Complex math functions
@@ -51,40 +51,40 @@
    * - Interpolation functions
    *
    * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values. 
+   * 32-bit integer and 32-bit floating-point values.
+   *
+   * <b>Pre-processor Macros</b>
+   *
+   * Each library project have differant pre-processor macros.
+   *
+   * - UNALIGNED_SUPPORT_DISABLE:
+   *
+   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
    *
-   * <b>Pre-processor Macros</b> 
-   * 
-   * Each library project have differant pre-processor macros. 
-   * 
-   * - UNALIGNED_SUPPORT_DISABLE: 
-   * 
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access    
-   * 
-   * - ARM_MATH_BIG_ENDIAN: 
-   * 
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. 
-   * 
-   * - ARM_MATH_MATRIX_CHECK: 
-   * 
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices 
-   * 
-   * - ARM_MATH_ROUNDING: 
-   * 
    * Define macro ARM_MATH_ROUNDING for rounding on support functions
    *
    * - ARM_MATH_CMx:
    *
    * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
    * and ARM_MATH_CM0 for building library on cortex-M0 target.
-   * 
+   *
    * - __FPU_PRESENT:
    *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries 
+   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
    *
    * <b>Toolchain Support</b>
    *
-   * The library has been developed and tested with MDK-ARM version 4.23. 
+   * The library has been developed and tested with MDK-ARM version 4.23.
    * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
    *
    * <b>Using the Library</b>
@@ -100,9 +100,9 @@
    * - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
    *
    * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single 
-   * public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. 
-   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or 
+   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+   * public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or
    * ARM_MATH_CM0 depending on the target processor in the application.
    *
    * <b>Examples</b>
@@ -115,7 +115,7 @@
    * - arm_cortexM0b_math.uvproj
    * - arm_cortexM0l_math.uvproj
    * - arm_cortexM3b_math.uvproj
-   * - arm_cortexM3l_math.uvproj  
+   * - arm_cortexM3l_math.uvproj
    * - arm_cortexM4b_math.uvproj
    * - arm_cortexM4l_math.uvproj
    * - arm_cortexM4bf_math.uvproj
@@ -272,7 +272,7 @@
 #undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
 #include "string.h"
 #include "math.h"
-#ifdef	__cplusplus
+#ifdef  __cplusplus
 extern "C"
 {
 #endif
@@ -282,27 +282,27 @@ extern "C"
    * @brief Macros required for reciprocal calculation in Normalized LMS
    */
 
-#define DELTA_Q31 			(0x100)
-#define DELTA_Q15 			0x5
-#define INDEX_MASK 			0x0000003F
+#define DELTA_Q31           (0x100)
+#define DELTA_Q15           0x5
+#define INDEX_MASK          0x0000003F
 #ifndef PI
-#define PI					3.14159265358979f
+#define PI                  3.14159265358979f
 #endif
 
   /**
    * @brief Macros required for SINE and COSINE Fast math approximations
    */
 
-#define TABLE_SIZE			256
-#define TABLE_SPACING_Q31	0x800000
-#define TABLE_SPACING_Q15	0x80
+#define TABLE_SIZE          256
+#define TABLE_SPACING_Q31   0x800000
+#define TABLE_SPACING_Q15   0x80
 
   /**
    * @brief Macros required for SINE and COSINE Controller functions
    */
   /* 1.31(q31) Fixed value of 2/360 */
   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING			0xB60B61
+#define INPUT_SPACING           0xB60B61
 
   /**
    * @brief Macro for Unaligned Support
@@ -315,7 +315,7 @@ extern "C"
   #else
     #define ALIGN4 __align(4)
   #endif
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#endif  /*  #ifndef UNALIGNED_SUPPORT_DISABLE   */
 
   /**
    * @brief Error status returned by some functions in the library.
@@ -371,7 +371,7 @@ extern "C"
 #else
   #define __SIMD32(addr)         (*(__packed                    int32_t **) & (addr))
   #define  _SIMD32_OFFSET(addr)  (*(__packed                    int32_t * )   (addr))
-#endif 
+#endif
 
   #define __SIMD64(addr)  (*(int64_t **) & (addr))
 
@@ -392,16 +392,16 @@ extern "C"
    */
 #ifndef ARM_MATH_BIG_ENDIAN
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
+                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
+                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
 #else
 
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
+                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
+                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
 
 #endif
 
@@ -1169,11 +1169,11 @@ extern "C"
   /**
    * @brief  Initialization function for the Q31 FIR filter.
    * @param[in,out] *S points to an instance of the Q31 FIR structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return 		none.
+   * @param[in]     numTaps  Number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs points to the filter coefficients.
+   * @param[in]     *pState points to the state buffer.
+   * @param[in]     blockSize number of samples that are processed at a time.
+   * @return        none.
    */
   void arm_fir_init_q31(
   arm_fir_instance_q31 * S,
@@ -1199,11 +1199,11 @@ extern "C"
   /**
    * @brief  Initialization function for the floating-point FIR filter.
    * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return    	none.
+   * @param[in]     numTaps  Number of filter coefficients in the filter.
+   * @param[in]     *pCoeffs points to the filter coefficients.
+   * @param[in]     *pState points to the state buffer.
+   * @param[in]     blockSize number of samples that are processed at a time.
+   * @return        none.
    */
   void arm_fir_init_f32(
   arm_fir_instance_f32 * S,
@@ -1463,7 +1463,7 @@ extern "C"
    * @brief Floating-point matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1476,7 +1476,7 @@ extern "C"
    * @brief Q15 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1488,7 +1488,7 @@ extern "C"
    * @brief Q31 matrix transpose.
    * @param[in]  *pSrc points to the input matrix
    * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
 
@@ -1531,7 +1531,7 @@ extern "C"
    * @param[in]       *pSrcA  points to the first input matrix structure
    * @param[in]       *pSrcB  points to the second input matrix structure
    * @param[out]      *pDst   points to output matrix structure
-   * @param[in]		  *pState points to the array for storing intermediate results  
+   * @param[in]       *pState points to the array for storing intermediate results
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
@@ -1665,7 +1665,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -1680,7 +1680,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -1695,7 +1695,7 @@ extern "C"
    * @param[in,out] *S             points to an instance of the floating-point matrix structure.
    * @param[in]     nRows          number of rows in the matrix.
    * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
+   * @param[in]     *pData         points to the matrix data array.
    * @return        none
    */
 
@@ -2187,7 +2187,7 @@ extern "C"
 
 
   /*----------------------------------------------------------------------
-   *		Internal functions prototypes FFT function
+   *        Internal functions prototypes FFT function
    ----------------------------------------------------------------------*/
 
   /**
@@ -2256,7 +2256,7 @@ extern "C"
    * @brief  Core function for the f32 FFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef           points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    * @return none.
    */
@@ -2267,14 +2267,14 @@ extern "C"
   float32_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q31 CFFT butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_q31(
   q31_t * pSrc,
@@ -2282,14 +2282,14 @@ extern "C"
   q31_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q15 CFFT butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_q15(
   q15_t * pSrc,
@@ -2297,14 +2297,14 @@ extern "C"
   q15_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef       	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_inverse_q15(
   q15_t * pSrc,
@@ -2312,14 +2312,14 @@ extern "C"
   q15_t * pCoef,
   uint16_t twidCoefModifier);
 
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
+        /**
+     * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process.
+     * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
+     * @param[in]      fftLen           length of the FFT.
+     * @param[in]      *pCoef           points to Twiddle coefficient buffer.
+     * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+     * @return none.
+     */
 
   void arm_radix2_butterfly_inverse_q31(
   q31_t * pSrc,
@@ -2331,9 +2331,9 @@ extern "C"
    * @brief  Core function for the f32 IFFT butterfly process.
    * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
    * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
+   * @param[in]      *pCoef           points to Twiddle coefficient buffer.
    * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @param[in]		 onebyfftLen	  1/fftLenfth
+   * @param[in]      onebyfftLen      1/fftLenfth
    * @return none.
    */
 
@@ -2489,7 +2489,7 @@ extern "C"
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_q15(
@@ -2519,7 +2519,7 @@ extern "C"
    * @param[in]      fftLenReal     length of the FFT.
    * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_q31(
@@ -2536,7 +2536,7 @@ extern "C"
    * @param[in]     fftLenReal     length of the FFT.
    * @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
    */
 
   arm_status arm_rfft_init_f32(
@@ -2582,7 +2582,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_f32(
@@ -2629,7 +2629,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q31(
@@ -2676,7 +2676,7 @@ extern "C"
    * @param[in]     N          length of the DCT4.
    * @param[in]     Nby2       half of the length of the DCT4.
    * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
 
   arm_status arm_dct4_init_q15(
@@ -3155,7 +3155,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Copies the elements of a floating-point vector. 
+   * @brief  Copies the elements of a floating-point vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3167,7 +3167,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q7 vector. 
+   * @brief  Copies the elements of a Q7 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3179,7 +3179,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q15 vector. 
+   * @brief  Copies the elements of a Q15 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3191,7 +3191,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q31 vector. 
+   * @brief  Copies the elements of a Q31 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3202,7 +3202,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Fills a constant value into a floating-point vector. 
+   * @brief  Fills a constant value into a floating-point vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3214,7 +3214,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q7 vector. 
+   * @brief  Fills a constant value into a Q7 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3226,7 +3226,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q15 vector. 
+   * @brief  Fills a constant value into a Q15 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3238,7 +3238,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q31 vector. 
+   * @brief  Fills a constant value into a Q31 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3249,14 +3249,14 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
 
-/**  
- * @brief Convolution of floating-point sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_f32(
@@ -3266,17 +3266,17 @@ extern "C"
   uint32_t srcBLen,
   float32_t * pDst);
 
-  
-  /**   
-   * @brief Convolution of Q15 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
 
@@ -3290,14 +3290,14 @@ extern "C"
   q15_t * pScratch2);
 
 
-/**  
- * @brief Convolution of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_q15(
@@ -3318,11 +3318,11 @@ extern "C"
    */
 
   void arm_conv_fast_q15(
-			  q15_t * pSrcA,
-			 uint32_t srcALen,
-			  q15_t * pSrcB,
-			 uint32_t srcBLen,
-			 q15_t * pDst);
+              q15_t * pSrcA,
+             uint32_t srcALen,
+              q15_t * pSrcB,
+             uint32_t srcBLen,
+             q15_t * pDst);
 
   /**
    * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
@@ -3331,9 +3331,9 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_fast_opt_q15(
@@ -3382,16 +3382,16 @@ extern "C"
   q31_t * pDst);
 
 
-    /**   
-   * @brief Convolution of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_opt_q7(
@@ -3444,18 +3444,18 @@ extern "C"
   uint32_t firstIndex,
   uint32_t numPoints);
 
-    /**   
-   * @brief Partial convolution of Q15 sequences.   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+    /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q15(
@@ -3504,13 +3504,13 @@ extern "C"
    */
 
   arm_status arm_conv_partial_fast_q15(
-				        q15_t * pSrcA,
-				       uint32_t srcALen,
-				        q15_t * pSrcB,
-				       uint32_t srcBLen,
-				       q15_t * pDst,
-				       uint32_t firstIndex,
-				       uint32_t numPoints);
+                        q15_t * pSrcA,
+                       uint32_t srcALen,
+                        q15_t * pSrcB,
+                       uint32_t srcBLen,
+                       q15_t * pDst,
+                       uint32_t firstIndex,
+                       uint32_t numPoints);
 
 
   /**
@@ -3522,9 +3522,9 @@ extern "C"
    * @param[out]      *pDst points to the block of output data
    * @param[in]       firstIndex is the first output sample to start with.
    * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_fast_opt_q15(
@@ -3583,18 +3583,18 @@ extern "C"
   uint32_t numPoints);
 
 
-  /**   
-   * @brief Partial convolution of Q7 sequences   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q7(
@@ -4086,8 +4086,8 @@ extern "C"
    * @brief Initialization function for the Q15 FIR lattice filter.
    * @param[in] *S points to an instance of the Q15 FIR lattice structure.
    * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages. 
-   * @param[in] *pState points to the state buffer.  The array is of length numStages. 
+   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages.
    * @return none.
    */
 
@@ -4654,15 +4654,15 @@ extern "C"
   float32_t * pDst);
 
 
-   /**   
-   * @brief Correlation of Q15 sequences   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @return none.   
+   /**
+   * @brief Correlation of Q15 sequences
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @return none.
    */
   void arm_correlate_opt_q15(
   q15_t * pSrcA,
@@ -4701,11 +4701,11 @@ extern "C"
    */
 
   void arm_correlate_fast_q15(
-			       q15_t * pSrcA,
-			      uint32_t srcALen,
-			       q15_t * pSrcB,
-			      uint32_t srcBLen,
-			      q15_t * pDst);
+                   q15_t * pSrcA,
+                  uint32_t srcALen,
+                   q15_t * pSrcB,
+                  uint32_t srcBLen,
+                  q15_t * pDst);
 
 
 
@@ -4716,7 +4716,7 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    * @return none.
    */
 
@@ -4764,16 +4764,16 @@ extern "C"
 
 
 
- /**   
-   * @brief Correlation of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_correlate_opt_q7(
@@ -5019,9 +5019,9 @@ extern "C"
 
   /*
    * @brief  Floating-point sin_cos function.
-   * @param[in]  theta    input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cos output. 
+   * @param[in]  theta    input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cos output.
    * @return none.
    */
 
@@ -5032,9 +5032,9 @@ extern "C"
 
   /*
    * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cosine output. 
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cosine output.
    * @return none.
    */
 
@@ -5132,7 +5132,7 @@ extern "C"
   /**
    * @defgroup PID PID Motor Control
    *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control 
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
    * loop mechanism widely used in industrial control systems.
    * A PID controller is the most commonly used type of feedback controller.
    *
@@ -5151,39 +5151,39 @@ extern "C"
    *
    * \par
    * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   * 
-   * \par 
-   * \image html PID.gif "Proportional Integral Derivative Controller" 
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
    *
    * \par
    * The PID controller calculates an "error" value as the difference between
    * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.  
-   * The proportional value determines the reaction to the current error, 
-   * the integral value determines the reaction based on the sum of recent errors, 
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
    * and the derivative value determines the reaction based on the rate at which the error has been changing.
    *
-   * \par Instance Structure 
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. 
-   * A separate instance structure must be defined for each PID Controller. 
-   * There are separate instance structure declarations for each of the 3 supported data types. 
-   * 
-   * \par Reset Functions 
-   * There is also an associated reset function for each data type which clears the state array. 
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
    *
-   * \par Initialization Functions 
-   * There is also an associated initialization function for each data type. 
-   * The initialization function performs the following operations: 
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
    * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.   
-   * 
-   * \par 
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. 
+   * - Zeros out the values in the state buffer.
+   *
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
    *
-   * \par Fixed-Point Behavior 
-   * Care must be taken when using the fixed-point versions of the PID Controller functions. 
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. 
-   * Refer to the function specific documentation below for usage guidelines. 
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
    */
 
   /**
@@ -5225,13 +5225,13 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * <b>Scaling and Overflow Behavior:</b> 
-   * \par 
-   * The function is implemented using an internal 64-bit accumulator. 
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. 
-   * Thus, if the accumulator result overflows it wraps around rather than clip. 
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. 
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. 
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using an internal 64-bit accumulator.
+   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+   * Thus, if the accumulator result overflows it wraps around rather than clip.
+   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    */
 
   __STATIC_INLINE q31_t arm_pid_q31(
@@ -5272,13 +5272,13 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * <b>Scaling and Overflow Behavior:</b> 
-   * \par 
-   * The function is implemented using a 64-bit internal accumulator. 
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. 
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. 
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. 
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. 
+   * <b>Scaling and Overflow Behavior:</b>
+   * \par
+   * The function is implemented using a 64-bit internal accumulator.
+   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
    * Lastly, the accumulator is saturated to yield a result in 1.15 format.
    */
 
@@ -5366,7 +5366,7 @@ extern "C"
    * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
    * can be calculated using only <code>Ia</code> and <code>Ib</code>.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeFormula.gif
@@ -5470,8 +5470,8 @@ extern "C"
   /**
    * @defgroup inv_clarke Vector Inverse Clarke Transform
    * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   * 
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeInvFormula.gif
@@ -5513,7 +5513,7 @@ extern "C"
   }
 
   /**
-   * @brief  Inverse Clarke transform for Q31 version 
+   * @brief  Inverse Clarke transform for Q31 version
    * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
    * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
    * @param[out]      *pIa    points to output three-phase coordinate <code>a</code>
@@ -5575,19 +5575,19 @@ extern "C"
    * @defgroup park Vector Park Transform
    *
    * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents 
-   * from the stationary to the moving reference frame and control the spatial relationship between 
+   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
    * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the 
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
    * current vector and the relationship from the two reference frames:
    * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkFormula.gif
-   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,  
-   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the 
+   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
+   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5604,8 +5604,8 @@ extern "C"
    * @brief Floating-point Park transform
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
-   * @param[out]      *pId   points to output	rotor reference frame d
-   * @param[out]      *pIq   points to output	rotor reference frame q
+   * @param[out]      *pId   points to output   rotor reference frame d
+   * @param[out]      *pIq   points to output   rotor reference frame q
    * @param[in]       sinVal sine value of rotation angle theta
    * @param[in]       cosVal cosine value of rotation angle theta
    * @return none.
@@ -5631,7 +5631,7 @@ extern "C"
   }
 
   /**
-   * @brief  Park transform for Q31 version 
+   * @brief  Park transform for Q31 version
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
    * @param[out]      *pId   points to output rotor reference frame d
@@ -5704,12 +5704,12 @@ extern "C"
    * @defgroup inv_park Vector Inverse Park transform
    * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkInvFormula.gif
-   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,  
-   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the 
+   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
+   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5751,7 +5751,7 @@ extern "C"
 
 
   /**
-   * @brief  Inverse Park transform for	Q31 version 
+   * @brief  Inverse Park transform for Q31 version
    * @param[in]       Id        input coordinate of rotor reference frame d
    * @param[in]       Iq        input coordinate of rotor reference frame q
    * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
@@ -5827,7 +5827,7 @@ extern "C"
    * Linear interpolation is a method of curve fitting using linear polynomials.
    * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
    *
-   * \par 
+   * \par
    * \image html LinearInterp.gif "Linear interpolation"
    *
    * \par
@@ -5847,10 +5847,10 @@ extern "C"
    * sample of data and each call to the function returns a single processed value.
    * <code>S</code> points to an instance of the Linear Interpolate function data structure.
    * <code>x</code> is the input sample value. The functions returns the output value.
-   * 
+   *
    * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table 
-   * if x is below input range and returns last value of table if x is above range.  
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
    */
 
   /**
@@ -5982,7 +5982,7 @@ extern "C"
    *
    * \par
    * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12. 
+   * This function can support maximum of table size 2^12.
    *
    */
 
@@ -6162,7 +6162,7 @@ extern "C"
    * @defgroup SQRT Square Root
    *
    * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.  
+   * There are separate functions for Q15, Q31, and floating-point data types.
    * The square root function is computed using the Newton-Raphson algorithm.
    * This is an iterative algorithm of the form:
    * <pre>
@@ -7072,11 +7072,11 @@ extern "C"
   uint32_t numSamples);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q31 output vector
-   * @param[in]       blockSize length of the input vector 
-   * @return none. 
+   * @param[in]       blockSize length of the input vector
+   * @return none.
    */
   void arm_float_to_q31(
   float32_t * pSrc,
@@ -7084,10 +7084,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q15 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q15(
@@ -7096,10 +7096,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q7 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q7(
@@ -7219,12 +7219,12 @@ extern "C"
    *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
    *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
    * </pre>
-   * Note that the coordinates (x, y) contain integer and fractional components.  
+   * Note that the coordinates (x, y) contain integer and fractional components.
    * The integer components specify which portion of the table to use while the
    * fractional components control the interpolation processor.
    *
    * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. 
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
    */
 
   /**
@@ -7543,7 +7543,7 @@ extern "C"
 
 
 
-#ifdef	__cplusplus
+#ifdef  __cplusplus
 }
 #endif
 
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h b/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
index 0173893fbd..350d452093 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_cm3.h
@@ -636,14 +636,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h b/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
index a965537402..2a67fa2a41 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_cm4.h
@@ -669,14 +669,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h b/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
index 7e56b0f332..4176fe8d5d 100644
--- a/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
+++ b/bsp/efm32/Libraries/CMSIS/Include/core_sc300.h
@@ -607,14 +607,14 @@ typedef struct
   __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
        uint32_t RESERVED2[15];
   __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];                                  
+       uint32_t RESERVED3[29];
   __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
   __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
   __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];                                  
+       uint32_t RESERVED4[43];
   __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
   __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];                                   
+       uint32_t RESERVED5[6];
   __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
   __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
   __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
diff --git a/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h b/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
index 2ccfd17504..db29415c55 100644
--- a/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
+++ b/bsp/efm32/Libraries/CMSIS/RTOS/cmsis_os.h
@@ -1,20 +1,20 @@
-/* ----------------------------------------------------------------------  
- * Copyright (C) 2012 ARM Limited. All rights reserved.  
- *  
+/* ----------------------------------------------------------------------
+ * Copyright (C) 2012 ARM Limited. All rights reserved.
+ *
  * $Date:        5. March 2012
  * $Revision:    V0.03
- *  
+ *
  * Project:      CMSIS-RTOS API
  * Title:        cmsis_os.h template header file
- *  
+ *
  * Version 0.02
- *    Initial Proposal Phase 
+ *    Initial Proposal Phase
  * Version 0.03
  *    osKernelStart added, optional feature: main started as thread
  *    osSemaphores have standard behaviour
  *    osTimerCreate does not start the timer, added osTimerStart
- *    osThreadPass is renamed to osThreadYield 
- * -------------------------------------------------------------------- */ 
+ *    osThreadPass is renamed to osThreadYield
+ * -------------------------------------------------------------------- */
 
 /**
 \page cmsis_os_h Header File Template: cmsis_os.h
@@ -35,8 +35,8 @@ The file cmsis_os.h contains:
 All definitions are prefixed with \b os to give an unique name space for CMSIS-RTOS functions.
 Definitions that are prefixed \b os_ are not used in the application code but local to this header file.
 All definitions and functions that belong to a module are grouped and have a common prefix, i.e. \b osThread.
- 
-Definitions that are marked with <b>CAN BE CHANGED</b> can be adapted towards the needs of the actual CMSIS-RTOS implementation. 
+
+Definitions that are marked with <b>CAN BE CHANGED</b> can be adapted towards the needs of the actual CMSIS-RTOS implementation.
 These definitions can be specific to the underlying RTOS kernel.
 
 Definitions that are marked with <b>MUST REMAIN UNCHANGED</b> cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer
@@ -52,7 +52,7 @@ The following CMSIS-RTOS functions can be called from threads and interrupt serv
   - \ref osMessagePut, \ref osMessageGet
   - \ref osMailAlloc, \ref osMailCAlloc, \ref osMailGet, \ref osMailPut, \ref osMailFree
 
-Functions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called 
+Functions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called
 from an ISR context the status code \b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.
 
 Some CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.
@@ -73,11 +73,11 @@ extern void thread_sample (void const *argument);             // function protot
 osThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);
 
 // Pool definition
-osPoolDef(MyPool, 10, long);                      
+osPoolDef(MyPool, 10, long);
 \endcode
 
 
-This header file defines all objects when included in a C/C++ source file. When <b>\#define osObjectsExternal</b> is 
+This header file defines all objects when included in a C/C++ source file. When <b>\#define osObjectsExternal</b> is
 present before the header file, the objects are defined as external symbols. A single consistent header file can therefore be
 used throughout the whole project.
 
@@ -92,7 +92,7 @@ used throughout the whole project.
 \endcode
 
 */
- 
+
 #ifndef _CMSIS_OS_H
 #define _CMSIS_OS_H
 
@@ -100,7 +100,7 @@ used throughout the whole project.
 #define osCMSIS           0x00003      ///< API version (main [31:16] .sub [15:0])
 
 /// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlaying RTOS kernel and version number.
-#define osCMSIS_KERNEL    0x10000	   ///< RTOS identification and version (main [31:16] .sub [15:0])
+#define osCMSIS_KERNEL    0x10000      ///< RTOS identification and version (main [31:16] .sub [15:0])
 
 /// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS.
 #define osKernelSystemId "KERNEL V1.00"   ///< RTOS identification string
@@ -113,7 +113,7 @@ used throughout the whole project.
 #define osFeature_Signals      8       ///< maximum number of Signal Flags available per thread
 #define osFeature_Semaphore    30      ///< maximum count for SemaphoreInit function
 #define osFeature_Wait         1       ///< osWait function: 1=available, 0=not available
-                                    
+
 #include <stdint.h>
 #include <stddef.h>
 
@@ -133,7 +133,7 @@ typedef enum  {
   osPriorityBelowNormal   = -1,          ///< priority: below normal
   osPriorityNormal        =  0,          ///< priority: normal (default)
   osPriorityAboveNormal   = +1,          ///< priority: above normal
-  osPriorityHigh          = +2,          ///< priority: high 
+  osPriorityHigh          = +2,          ///< priority: high
   osPriorityRealtime      = +3,          ///< priority: realtime (highest)
   osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority
 } osPriority;
@@ -160,23 +160,23 @@ typedef enum  {
   osErrorValue            =  0x86,       ///< value of a parameter is out of range.
   osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.
   os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.
-} osStatus; 
+} osStatus;
 
 
 /// Timer type value for the timer definition
 /// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS.
 typedef enum  {
-  osTimerOnce             =     0,       ///< one-shot timer 
-  osTimerPeriodic         =     1        ///< repeating timer 
-} os_timer_type; 
+  osTimerOnce             =     0,       ///< one-shot timer
+  osTimerPeriodic         =     1        ///< repeating timer
+} os_timer_type;
 
 /// Entry point of a thread.
 /// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS.
-typedef void (*os_pthread) (void const *argument); 
+typedef void (*os_pthread) (void const *argument);
 
 /// Entry point of a timer call back function.
 /// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS.
-typedef void (*os_ptimer) (void const *argument); 
+typedef void (*os_ptimer) (void const *argument);
 
 // >>> the following data type definitions may shall adapted towards a specific RTOS
 
@@ -240,7 +240,7 @@ typedef const struct os_semaphore_def  {
 /// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_pool_def  {
   uint32_t                 pool_sz;    ///< number of items (elements) in the pool
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< pointer to memory for pool
 } osPoolDef_t;
 
@@ -248,7 +248,7 @@ typedef const struct os_pool_def  {
 /// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_messageQ_def  {
   uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< memory array for messages
 } osMessageQDef_t;
 
@@ -256,23 +256,23 @@ typedef const struct os_messageQ_def  {
 /// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_mailQ_def  {
   uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
+  uint32_t                 item_sz;    ///< size of an item
   void                       *pool;    ///< memory array for mail
 } osMailQDef_t;
 
-/// Event structure contains detailed information about an event. 
-/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS. 
+/// Event structure contains detailed information about an event.
+/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS.
 ///       However the struct may be extended at the end.
 typedef struct  {
   osStatus                 status;     ///< status code: event or error information
   union  {
-    uint32_t                    v;     ///< message as 32-bit value 
+    uint32_t                    v;     ///< message as 32-bit value
     void                       *p;     ///< message or mail as void pointer
-    int32_t               signals;     ///< signal flags 
+    int32_t               signals;     ///< signal flags
   } value;                             ///< event value
   union  {
-    osMailQId             mail_id;     ///< mail id obtained by \ref osMailCreate 
-    osMessageQId       message_id;     ///< message id obtained by \ref osMessageCreate 
+    osMailQId             mail_id;     ///< mail id obtained by \ref osMailCreate
+    osMessageQId       message_id;     ///< message id obtained by \ref osMessageCreate
   } def;                               ///< event definition
 } osEvent;
 
@@ -283,11 +283,11 @@ typedef struct  {
 /// \param[in]     thread_def    thread definition referenced with \ref osThread.
 /// \param[in]     argument      pointer that is passed to the thread function as start argument.
 /// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS. 
+/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
 osStatus osKernelStart (osThreadDef_t *thread_def, void *argument);
-   
+
 /// Check if the RTOS kernel is already started.
-/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS. 
+/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS.
 /// \return 0 RTOS is not started, 1 RTOS is started.
 int32_t osKernelRunning(void);
 
@@ -299,7 +299,7 @@ int32_t osKernelRunning(void);
 /// \param         priority     initial priority of the thread function.
 /// \param         instances    number of possible thread instances.
 /// \param         stacksz      stack size (in bytes) requirements for the thread function.
-/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osThreadDef(name, priority, instances, stacksz)  \
@@ -312,7 +312,7 @@ osThreadDef_t os_thread_def_##name = \
 
 /// Access a Thread defintion.
 /// \param         name          name of the thread definition object.
-/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osThread(name)  \
 &os_thread_def_##name
@@ -341,7 +341,7 @@ osStatus osThreadTerminate (osThreadId thread_id);
 /// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS.
 osStatus osThreadYield (void);
 
-/// Change priority of an active thread.  
+/// Change priority of an active thread.
 /// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
 /// \param[in]     priority      new priority value for the thread function.
 /// \return status code that indicates the execution status of the function.
@@ -359,7 +359,7 @@ osPriority osThreadGetPriority (osThreadId thread_id);
 //  ==== Generic Wait Functions ====
 
 /// Wait for Timeout (Time Delay)
-/// \param[in]     millisec      time delay value 
+/// \param[in]     millisec      time delay value
 /// \return status code that indicates the execution status of the function.
 osStatus osDelay (uint32_t millisec);
 
@@ -378,7 +378,7 @@ osEvent osWait (uint32_t millisec);
 /// Define a Timer object.
 /// \param         name          name of the timer object.
 /// \param         function      name of the timer call back function.
-/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osTimerDef(name, function)  \
@@ -391,7 +391,7 @@ osTimerDef_t os_timer_def_##name = \
 
 /// Access a Timer definition.
 /// \param         name          name of the timer object.
-/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osTimer(name) \
 &os_timer_def_##name
@@ -452,7 +452,7 @@ osEvent osSignalWait (int32_t signals, uint32_t millisec);
 
 /// Define a Mutex.
 /// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMutexDef(name)  \
@@ -464,7 +464,7 @@ osMutexDef_t os_mutex_def_##name = { 0 }
 
 /// Access a Mutex defintion.
 /// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMutex(name)  \
 &os_mutex_def_##name
@@ -495,7 +495,7 @@ osStatus osMutexRelease (osMutexId mutex_id);
 
 /// Define a Semaphore object.
 /// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osSemaphoreDef(name)  \
@@ -507,7 +507,7 @@ osSemaphoreDef_t os_semaphore_def_##name = { 0 }
 
 /// Access a Semaphore definition.
 /// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osSemaphore(name)  \
 &os_semaphore_def_##name
@@ -533,7 +533,7 @@ int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);
 osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
 
 #endif     // Semaphore available
- 
+
 //  ==== Memory Pool Management Functions ====
 
 #if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available
@@ -542,7 +542,7 @@ osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
 /// \param         name          name of the memory pool.
 /// \param         no            maximum number of objects (elements) in the memory pool.
 /// \param         type          data type of a single object (element).
-/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osPoolDef(name, no, type)   \
@@ -555,7 +555,7 @@ osPoolDef_t os_pool_def_##name = \
 
 /// \brief Access a Memory Pool definition.
 /// \param         name          name of the memory pool
-/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osPool(name) \
 &os_pool_def_##name
@@ -572,7 +572,7 @@ osPoolId osPoolCreate (osPoolDef_t *pool_def);
 /// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
 void *osPoolAlloc (osPoolId pool_id);
 
-/// Allocate a memory block from a memory pool and set memory block to zero 
+/// Allocate a memory block from a memory pool and set memory block to zero
 /// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
 /// \return address of the allocated memory block or NULL in case of no memory available.
 /// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS.
@@ -596,7 +596,7 @@ osStatus osPoolFree (osPoolId pool_id, void *block);
 /// \param         name          name of the queue.
 /// \param         queue_sz      maximum number of messages in the queue.
 /// \param         type          data type of a single message element (for debugger).
-/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMessageQDef(name, queue_sz, type)   \
@@ -609,7 +609,7 @@ osMessageQDef_t os_messageQ_def_##name = \
 
 /// \brief Access a Message Queue Definition.
 /// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMessageQ(name) \
 &os_messageQ_def_##name
@@ -647,7 +647,7 @@ osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);
 /// \param         name          name of the queue
 /// \param         queue_sz      maximum number of messages in queue
 /// \param         type          data type of a single message element
-/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #if defined (osObjectsExternal)  // object is external
 #define osMailQDef(name, queue_sz, type) \
@@ -657,10 +657,10 @@ extern osMailQDef_t os_mailQ_def_##name
 osMailQDef_t os_mailQ_def_##name =  \
 { (queue_sz), sizeof (type) }
 #endif
-     
+
 /// \brief Access a Mail Queue Definition
 /// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the 
+/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the
 ///       macro body is implementation specific in every CMSIS-RTOS.
 #define osMailQ(name)  \
 &os_mailQ_def_##name
@@ -706,7 +706,7 @@ osEvent osMailGet (osMailQId queue_id, uint32_t millisec);
 /// \return status code that indicates the execution status of the function.
 /// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS.
 osStatus osMailFree (osMailQId queue_id, void *mail);
-                            
+
 #endif  // Mail Queues available
 
 
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
index 1713a1aed5..2328977341 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/IAR/startup_efm32g.c
@@ -39,7 +39,7 @@ extern void __iar_program_start(void);
 extern void SystemInit(void);
 
 /* Auto defined by linker */
-extern unsigned char CSTACK$$Limit; 
+extern unsigned char CSTACK$$Limit;
 
 __weak void Reset_Handler(void)
 {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
index d343bd4357..a11e3de7a2 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Source/system_efm32g.c
@@ -64,18 +64,18 @@
 /* Do not define variable if HF crystal oscillator not present */
 #if (EFM32_HFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System HFXO clock. */ 
+/** System HFXO clock. */
 static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
 
-#ifndef EFM32_LFXO_FREQ 
+#ifndef EFM32_LFXO_FREQ
 #define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
 #endif
 /* Do not define variable if LF crystal oscillator not present */
 #if (EFM32_LFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System LFXO clock. */ 
+/** System LFXO clock. */
 static uint32_t SystemLFXOClock = EFM32_LFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
@@ -118,13 +118,13 @@ uint32_t SystemCoreClock;
 uint32_t SystemCoreClockGet(void)
 {
   uint32_t ret;
-  
+
   ret = SystemHFClockGet();
 #if defined (_EFM32_GIANT_FAMILY)
   /* Leopard/Giant Gecko has an additional divider */
   ret =  ret / (1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK)>>_CMU_CTRL_HFCLKDIV_SHIFT));
 #endif
-  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >> 
+  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>
           _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;
 
   /* Keep CMSIS variable up-to-date just in case */
@@ -147,7 +147,7 @@ uint32_t SystemCoreClockGet(void)
 uint32_t SystemHFClockGet(void)
 {
   uint32_t ret;
-  
+
   switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |
                          CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))
   {
@@ -160,11 +160,11 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     case CMU_STATUS_LFRCOSEL:
       ret = EFM32_LFRCO_FREQ;
       break;
-      
+
     case CMU_STATUS_HFXOSEL:
 #if (EFM32_HFXO_FREQ > 0)
       ret = SystemHFXOClock;
@@ -174,7 +174,7 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     default: /* CMU_STATUS_HFRCOSEL */
       switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)
       {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
index 0e3124dcea..356dec376b 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/startup_efm32gg.c
@@ -39,7 +39,7 @@ extern void __iar_program_start(void);
 extern void SystemInit(void);
 
 /* Auto defined by linker */
-extern unsigned char CSTACK$$Limit; 
+extern unsigned char CSTACK$$Limit;
 
 __weak void Reset_Handler(void)
 {
diff --git a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
index c7709f9a64..841ac171b6 100644
--- a/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
+++ b/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/system_efm32gg.c
@@ -64,18 +64,18 @@
 /* Do not define variable if HF crystal oscillator not present */
 #if (EFM32_HFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System HFXO clock. */ 
+/** System HFXO clock. */
 static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
 
-#ifndef EFM32_LFXO_FREQ 
+#ifndef EFM32_LFXO_FREQ
 #define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
 #endif
 /* Do not define variable if LF crystal oscillator not present */
 #if (EFM32_LFXO_FREQ > 0)
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
-/** System LFXO clock. */ 
+/** System LFXO clock. */
 static uint32_t SystemLFXOClock = EFM32_LFXO_FREQ;
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
 #endif
@@ -118,13 +118,13 @@ uint32_t SystemCoreClock;
 uint32_t SystemCoreClockGet(void)
 {
   uint32_t ret;
-  
+
   ret = SystemHFClockGet();
 #if defined (_EFM32_GIANT_FAMILY)
   /* Leopard/Giant Gecko has an additional divider */
   ret =  ret / (1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK)>>_CMU_CTRL_HFCLKDIV_SHIFT));
 #endif
-  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >> 
+  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>
           _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;
 
   /* Keep CMSIS variable up-to-date just in case */
@@ -147,7 +147,7 @@ uint32_t SystemCoreClockGet(void)
 uint32_t SystemHFClockGet(void)
 {
   uint32_t ret;
-  
+
   switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |
                          CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))
   {
@@ -160,11 +160,11 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     case CMU_STATUS_LFRCOSEL:
       ret = EFM32_LFRCO_FREQ;
       break;
-      
+
     case CMU_STATUS_HFXOSEL:
 #if (EFM32_HFXO_FREQ > 0)
       ret = SystemHFXOClock;
@@ -174,7 +174,7 @@ uint32_t SystemHFClockGet(void)
       ret = 0;
 #endif
       break;
-      
+
     default: /* CMU_STATUS_HFRCOSEL */
       switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)
       {
diff --git a/bsp/efm32/Libraries/emlib/inc/em_acmp.h b/bsp/efm32/Libraries/emlib/inc/em_acmp.h
index 0c20ead97f..bc36e3c618 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_acmp.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_acmp.h
@@ -173,7 +173,7 @@ typedef struct
    *  power used by the VDD and bandgap references. */
   bool                          lowPowerReferenceEnabled;
 
-  /** Vdd reference value. VDD_SCALED = VDD � VDDLEVEL � 50mV/3.8V.
+  /** Vdd reference value. VDD_SCALED = VDD × VDDLEVEL × 50mV/3.8V.
    *  Valid values are in the range 0-63. */
   uint32_t                      vddLevel;
 
@@ -229,7 +229,7 @@ typedef struct
    *  power used by the VDD and bandgap references. */
   bool                         lowPowerReferenceEnabled;
 
-  /** Vdd reference value. VDD_SCALED = VDD � VDDLEVEL � 50mV/3.8V.
+  /** Vdd reference value. VDD_SCALED = VDD × VDDLEVEL × 50mV/3.8V.
    *  Valid values are in the range 0-63. */
   uint32_t                     vddLevel;
 
diff --git a/bsp/efm32/Libraries/emlib/inc/em_burtc.h b/bsp/efm32/Libraries/emlib/inc/em_burtc.h
index 3f7233a5c5..8e6d11ec6a 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_burtc.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_burtc.h
@@ -289,8 +289,8 @@ __STATIC_INLINE void BURTC_Enable(bool enable)
   if( enable )
   {
     BITBAND_Peripheral(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 0);
-  } 
-  else 
+  }
+  else
   {
     BITBAND_Peripheral(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 1);
   }
diff --git a/bsp/efm32/Libraries/emlib/inc/em_cmu.h b/bsp/efm32/Libraries/emlib/inc/em_cmu.h
index 7f0a3fbd4c..881fd77174 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_cmu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_cmu.h
@@ -432,7 +432,7 @@ typedef enum
 #endif
 
 #if defined(USB_PRESENT)
-  cmuClock_USBC = (CMU_NODIV_REG << CMU_DIV_REG_POS) | 
+  cmuClock_USBC = (CMU_NODIV_REG << CMU_DIV_REG_POS) |
                   (CMU_USBCCLKSEL_REG << CMU_SEL_REG_POS) |
                   (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) |
                   (_CMU_HFCORECLKEN0_USBC_SHIFT << CMU_EN_BIT_POS) |
@@ -441,7 +441,7 @@ typedef enum
 #endif
 
 #if defined(USB_PRESENT)
-  cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS) | 
+  cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS) |
                  (CMU_NOSEL_REG << CMU_SEL_REG_POS) |
                  (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) |
                  (_CMU_HFCORECLKEN0_USB_SHIFT << CMU_EN_BIT_POS) |
diff --git a/bsp/efm32/Libraries/emlib/inc/em_dma.h b/bsp/efm32/Libraries/emlib/inc/em_dma.h
index 5ce256296f..544ccb5bc3 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_dma.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_dma.h
@@ -251,7 +251,7 @@ typedef struct
   /** Enable repeated loop */
   bool      enable;
   /** Width of transfer, reload value for nMinus1 */
-  uint16_t  nMinus1;  
+  uint16_t  nMinus1;
 } DMA_CfgLoop_TypeDef;
 
 
@@ -335,20 +335,20 @@ typedef struct
    * Pointer to the controlblock in memory holding descriptors (channel
    * control data structures). This memory must be properly aligned
    * according to requirements.
-   * 
+   *
    * Alignment requirements are
    *   a) 5 bits base requirement, bits [4:0]
    *   b) Add the number of bits needed to represent the wanted number
    *      of channels
    *   c) Align structure with this number of bits set to zero
-   *  
+   *
    * Examples: 4 channels, 5 + 2 (channels 0 to 3) = 7 bits
    *           7 bit alignment, 64 byte address alignment
    *           8 channels, 5 + 3 (channels 0 to 7) = 8 bits
    *           8 bit alignment, 256 byte address alignment
    *           12 channels, 5 + 4 (channels 0 to 11) = 9 bits
    *           9 bit alignment, 512 byte address alignment
-   * 
+   *
    * Please refer to the reference manual, DMA chapter for more details.
    *
    * It is possible to provide a smaller memory block, only covering
diff --git a/bsp/efm32/Libraries/emlib/inc/em_ebi.h b/bsp/efm32/Libraries/emlib/inc/em_ebi.h
index 43bf58de2c..dbfe09e74e 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_ebi.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_ebi.h
@@ -157,7 +157,7 @@ typedef enum
 } EBI_ALow_TypeDef;
 
 /** Adress Pin Enable, high limit - higher limit of pins to enable */
-typedef enum 
+typedef enum
 {
   /** All EBI_A pins are disabled */
   ebiAHighA0 = EBI_ROUTE_APEN_A0,
@@ -218,9 +218,9 @@ typedef enum {
   /** EBI PIN I/O Location 1 */
   ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
   /** EBI PIN I/O Location 2 */
-  ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,  
+  ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,
   /** EBI PIN I/O Location 3 */
-  // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,  
+  // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,
 } EBI_Location_TypeDef;
 #endif
 
@@ -626,7 +626,7 @@ __STATIC_INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
  ******************************************************************************/
 __STATIC_INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
 {
-  EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;                  
+  EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
 }
 
 
@@ -676,7 +676,7 @@ __STATIC_INLINE uint32_t EBI_TFTHCount(void)
 
 
 /***************************************************************************//**
- * @brief Set Frame Buffer Trigger  
+ * @brief Set Frame Buffer Trigger
  *   Frame buffer pointer will be updated either on each horizontal line (hsync)
  *   or vertical update (vsync)(
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/inc/em_emu.h b/bsp/efm32/Libraries/emlib/inc/em_emu.h
index ea000c6c2f..c6687d41a0 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_emu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_emu.h
@@ -62,8 +62,8 @@ typedef enum
   /** Select ULFRCO as duty oscillator in EM4 */
   emuEM4Osc_ULFRCO = EMU_EM4CONF_OSC_ULFRCO,
   /** Select LFXO as duty oscillator in EM4 */
-  emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO, 
-  /** Select LFRCO as duty oscillator in EM4 */    
+  emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO,
+  /** Select LFRCO as duty oscillator in EM4 */
   emuEM4Osc_LFRCO = EMU_EM4CONF_OSC_LFRCO
 } EMU_EM4Osc_TypeDef;
 
@@ -124,15 +124,15 @@ typedef enum
 
 #if defined(_EFM32_GIANT_FAMILY)
 /** Energy Mode 4 initialization structure  */
-typedef struct 
+typedef struct
 {
   /** Lock configuration of regulator, BOD and oscillator */
   bool               lockConfig;
   /** EM4 duty oscillator */
-  EMU_EM4Osc_TypeDef osc;  
+  EMU_EM4Osc_TypeDef osc;
   /** Wake up on EM4 BURTC interrupt */
   bool               buRtcWakeup;
-  /** Enable EM4 voltage regulator */  
+  /** Enable EM4 voltage regulator */
   bool               vreg;
 } EMU_EM4Init_TypeDef;
 
@@ -145,7 +145,7 @@ typedef struct
   }
 
 /** Backup Power Domain Initialization structure */
-typedef struct 
+typedef struct
 {
   /* Backup Power Domain power configuration */
 
@@ -153,7 +153,7 @@ typedef struct
   EMU_Probe_TypeDef probe;
   /** Enable BOD calibration mode */
   bool              bodCal;
-  /** Enable BU_STAT status pin for active BU mode */ 
+  /** Enable BU_STAT status pin for active BU mode */
   bool              statusPinEnable;
 
   /* Backup Power Domain connection configuration */
diff --git a/bsp/efm32/Libraries/emlib/inc/em_msc.h b/bsp/efm32/Libraries/emlib/inc/em_msc.h
index 0af96f9271..ac00aac98a 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_msc.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_msc.h
@@ -88,7 +88,7 @@ typedef enum
 
 #if defined (_EFM32_GIANT_FAMILY)
 /** Strategy for prioritized bus access */
-typedef enum { 
+typedef enum {
   mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU, /**< Prioritize CPU bus accesses */
   mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA, /**< Prioritize DMA bus accesses */
   mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1, /**< Prioritize DMAEM1 for bus accesses */
diff --git a/bsp/efm32/Libraries/emlib/inc/em_rmu.h b/bsp/efm32/Libraries/emlib/inc/em_rmu.h
index c180344616..8ee5ebec33 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_rmu.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_rmu.h
@@ -59,10 +59,10 @@ typedef enum
 {
 #if defined(_EFM32_GIANT_FAMILY)
   /** Reset control over Backup Power Domain */
-  rmuResetBU = _RMU_CTRL_BURSTEN_SHIFT,        
+  rmuResetBU = _RMU_CTRL_BURSTEN_SHIFT,
 #endif
   /** Allow Cortex-M3 lock up signal */
-  rmuResetLockUp = _RMU_CTRL_LOCKUPRDIS_SHIFT 
+  rmuResetLockUp = _RMU_CTRL_LOCKUPRDIS_SHIFT
 } RMU_Reset_TypeDef;
 
 /*******************************************************************************
diff --git a/bsp/efm32/Libraries/emlib/inc/em_usart.h b/bsp/efm32/Libraries/emlib/inc/em_usart.h
index e30d75c7fe..d36209bc37 100644
--- a/bsp/efm32/Libraries/emlib/inc/em_usart.h
+++ b/bsp/efm32/Libraries/emlib/inc/em_usart.h
@@ -276,7 +276,7 @@ typedef struct
 
 #if defined(_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
 /** USART PRS trigger enable */
-typedef struct 
+typedef struct
 {
 #if defined(_EFM32_GIANT_FAMILY)
   /** Enable AUTOTX */
diff --git a/bsp/efm32/Libraries/emlib/src/em_burtc.c b/bsp/efm32/Libraries/emlib/src/em_burtc.c
index 005c7770fb..dac6645c67 100644
--- a/bsp/efm32/Libraries/emlib/src/em_burtc.c
+++ b/bsp/efm32/Libraries/emlib/src/em_burtc.c
@@ -87,7 +87,7 @@ __STATIC_INLINE uint32_t BURTC_DivToLog2(uint32_t div)
  *    Configures the BURTC peripheral.
  *
  * @note
- *   Before initialization, BURTC module must first be enabled by clearing the 
+ *   Before initialization, BURTC module must first be enabled by clearing the
  *   reset bit in the RMU, i.e.
  * @verbatim
  *   RMU_ResetControl(rmuResetBU, false);
@@ -123,7 +123,7 @@ void BURTC_Init(const BURTC_Init_TypeDef *burtcInit)
   presc = BURTC_DivToLog2(burtcInit->clkDiv);
 
   /* Make sure all registers are updated simultaneously */
-  if (burtcInit->enable) 
+  if (burtcInit->enable)
   {
     BURTC_FreezeEnable(true);
   }
@@ -132,7 +132,7 @@ void BURTC_Init(const BURTC_Init_TypeDef *burtcInit)
   BURTC->LPMODE = (uint32_t)(burtcInit->lowPowerMode);
 
   /* New configuration */
-  ctrl = ((BURTC_CTRL_RSTEN) | 
+  ctrl = ((BURTC_CTRL_RSTEN) |
           (burtcInit->mode) |
           (burtcInit->debugRun << _BURTC_CTRL_DEBUGRUN_SHIFT) |
           (burtcInit->compare0Top << _BURTC_CTRL_COMP0TOP_SHIFT) |
diff --git a/bsp/efm32/Libraries/emlib/src/em_cmu.c b/bsp/efm32/Libraries/emlib/src/em_cmu.c
index 974ff932d6..516f7b68ca 100644
--- a/bsp/efm32/Libraries/emlib/src/em_cmu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_cmu.c
@@ -1377,14 +1377,14 @@ void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
       /* frequencies above 32MHz */
       if(SystemHFXOClockGet() > CMU_MAX_FREQ_HFLE)
       {
-        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) | 
-          CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ | 
+        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) |
+          CMU_CTRL_HFXOBUFCUR_BOOSTABOVE32MHZ |
           /* Must have HFLE enabled to access some LE peripherals >=32MHz */
           CMU_CTRL_HFLE;
       } else {
         /* This can happen if the user configures the EFM32_HFXO_FREQ to */
         /* use another oscillator frequency */
-        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) | 
+        CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) |
           CMU_CTRL_HFXOBUFCUR_BOOSTUPTO32MHZ;
       }
 #endif
@@ -1475,7 +1475,7 @@ void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
         BITBAND_Peripheral(&(CMU->CTRL), _CMU_CTRL_HFLE_SHIFT, 1);
 
         /* Enable DIV4 factor for peripheral clock */
-        BITBAND_Peripheral(&(CMU->HFCORECLKDIV), 
+        BITBAND_Peripheral(&(CMU->HFCORECLKDIV),
                            _CMU_HFCORECLKDIV_HFCORECLKLEDIV_SHIFT, 1);
       }
 #endif
diff --git a/bsp/efm32/Libraries/emlib/src/em_ebi.c b/bsp/efm32/Libraries/emlib/src/em_ebi.c
index 8f8439e7fa..52ef36716b 100644
--- a/bsp/efm32/Libraries/emlib/src/em_ebi.c
+++ b/bsp/efm32/Libraries/emlib/src/em_ebi.c
@@ -105,7 +105,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTODIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK0EN;
     }
@@ -117,13 +117,13 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
               _EBI_CTRL_ARDY1EN_MASK|
               _EBI_CTRL_ARDYTO1DIS_MASK|
               _EBI_CTRL_NOIDLE1_MASK|
-              _EBI_CTRL_BANK1EN_MASK); 
+              _EBI_CTRL_BANK1EN_MASK);
     ctrl |= (ebiInit->mode << _EBI_CTRL_MODE1_SHIFT);
     ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY1EN_SHIFT);
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO1DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL1_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE1_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK1EN;
     }
@@ -141,7 +141,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO2DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL2_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE2_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK2EN;
     }
@@ -153,13 +153,13 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
               _EBI_CTRL_ARDY3EN_MASK|
               _EBI_CTRL_ARDYTO3DIS_MASK|
               _EBI_CTRL_NOIDLE3_MASK|
-              _EBI_CTRL_BANK3EN_MASK); 
+              _EBI_CTRL_BANK3EN_MASK);
     ctrl |= (ebiInit->mode << _EBI_CTRL_MODE3_SHIFT);
     ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY3EN_SHIFT);
     ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO3DIS_SHIFT);
     ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL3_SHIFT);
     ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE3_SHIFT);
-    if ( ebiInit->enable) 
+    if ( ebiInit->enable)
     {
       ctrl |= EBI_CTRL_BANK3EN;
     }
@@ -172,7 +172,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
             _EBI_CTRL_BANK1EN_MASK|
             _EBI_CTRL_BANK2EN_MASK|
             _EBI_CTRL_BANK3EN_MASK);
-  if ( ebiInit->enable) 
+  if ( ebiInit->enable)
   {
     if ( ebiInit->banks & EBI_BANK0 )
     {
@@ -265,7 +265,7 @@ void EBI_Init(const EBI_Init_TypeDef *ebiInit)
   EBI_ChipSelectEnable(ebiInit->csLines, true);
 
   /* Activate new configuration */
-  EBI->CTRL = ctrl;  
+  EBI->CTRL = ctrl;
 }
 
 
diff --git a/bsp/efm32/Libraries/emlib/src/em_emu.c b/bsp/efm32/Libraries/emlib/src/em_emu.c
index fc8587636c..5df9fb577a 100644
--- a/bsp/efm32/Libraries/emlib/src/em_emu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_emu.c
@@ -402,16 +402,16 @@ void EMU_EM4Init(EMU_EM4Init_TypeDef *em4init)
     _EMU_EM4CONF_OSC_MASK|
     _EMU_EM4CONF_BURTCWU_MASK|
     _EMU_EM4CONF_VREGEN_MASK);
-  
+
   /* Configure new settings */
   em4conf |= (
     (em4init->lockConfig << _EMU_EM4CONF_LOCKCONF_SHIFT)|
     (em4init->osc)|
     (em4init->buRtcWakeup << _EMU_EM4CONF_BURTCWU_SHIFT)|
     (em4init->vreg << _EMU_EM4CONF_VREGEN_SHIFT));
-  
+
   /* Apply configuration. Note that lock can be set after this stage. */
-  EMU->EM4CONF = em4conf;    
+  EMU->EM4CONF = em4conf;
 }
 
 
@@ -432,15 +432,15 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
     _EMU_PWRCONF_VOUTSTRONG_MASK|
     _EMU_PWRCONF_VOUTMED_MASK|
     _EMU_PWRCONF_VOUTWEAK_MASK);
-  
+
   reg |= (bupdInit->resistor|
          (bupdInit->voutStrong << _EMU_PWRCONF_VOUTSTRONG_SHIFT)|
          (bupdInit->voutMed    << _EMU_PWRCONF_VOUTMED_SHIFT)|
-         (bupdInit->voutWeak   << _EMU_PWRCONF_VOUTWEAK_SHIFT)); 
-  
+         (bupdInit->voutWeak   << _EMU_PWRCONF_VOUTWEAK_SHIFT));
+
   EMU->PWRCONF = reg;
 
-  /* Set backup domain inactive mode configuration */ 
+  /* Set backup domain inactive mode configuration */
   reg = EMU->BUINACT & ~(_EMU_BUINACT_PWRCON_MASK);
   reg |= (bupdInit->inactivePower);
   EMU->BUINACT = reg;
@@ -456,14 +456,14 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
     _EMU_BUCTRL_BODCAL_MASK|
     _EMU_BUCTRL_STATEN_MASK|
     _EMU_BUCTRL_EN_MASK);
-             
-  /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and 
+
+  /* Note use of ->enable to both enable BUPD, use BU_VIN pin input and
      release reset */
   reg |= (bupdInit->probe|
          (bupdInit->bodCal          << _EMU_BUCTRL_BODCAL_SHIFT)|
          (bupdInit->statusPinEnable << _EMU_BUCTRL_STATEN_SHIFT)|
          (bupdInit->enable          << _EMU_BUCTRL_EN_SHIFT));
-  
+
   /* Enable configuration */
   EMU->BUCTRL = reg;
 
@@ -479,14 +479,14 @@ void EMU_BUPDInit(EMU_BUPDInit_TypeDef *bupdInit)
  * @brief
  *   Configure Backup Power Domain BOD Threshold value
  * @note
- *   These values are precalibrated 
+ *   These values are precalibrated
  * @param[in] mode Active or Inactive mode
  * @param[in] value
  ******************************************************************************/
 void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value)
 {
   EFM_ASSERT(value<4);
-  
+
   switch(mode)
   {
   case emuBODMode_Active:
@@ -503,7 +503,7 @@ void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value)
  * @brief
  *  Configure Backup Power Domain BOD Threshold Range
  * @note
- *  These values are precalibrated 
+ *  These values are precalibrated
  * @param[in] mode Active or Inactive mode
  * @param[in] value
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/src/em_lesense.c b/bsp/efm32/Libraries/emlib/src/em_lesense.c
index 8dc9c1ec7d..4482b20cce 100644
--- a/bsp/efm32/Libraries/emlib/src/em_lesense.c
+++ b/bsp/efm32/Libraries/emlib/src/em_lesense.c
@@ -533,7 +533,7 @@ void LESENSE_ChannelConfig(LESENSE_ChDesc_TypeDef const *confCh,
   /* Channel specific configuration of clocks, sample mode, excitation pin mode
    * alternate excitation usage and interrupt mode on scan channel chIdx in
    * LESENSE_CHchIdx_INTERACT. */
-  LESENSE->CH[chIdx].INTERACT = ((uint32_t)confCh->exClk << 
+  LESENSE->CH[chIdx].INTERACT = ((uint32_t)confCh->exClk <<
                                  _LESENSE_CH_INTERACT_EXCLK_SHIFT) |
                                 ((uint32_t)confCh->sampleClk <<
                                  _LESENSE_CH_INTERACT_SAMPLECLK_SHIFT) |
diff --git a/bsp/efm32/Libraries/emlib/src/em_msc.c b/bsp/efm32/Libraries/emlib/src/em_msc.c
index f42811219e..47f01e6168 100644
--- a/bsp/efm32/Libraries/emlib/src/em_msc.c
+++ b/bsp/efm32/Libraries/emlib/src/em_msc.c
@@ -55,7 +55,7 @@
  * @brief
  *   Enables the flash controller for writing.
  * @note
- *   IMPORTANT: This function must be called before flash operations when 
+ *   IMPORTANT: This function must be called before flash operations when
  *   AUXHFRCO clock has been changed from default 14MHz band.
  ******************************************************************************/
 void MSC_Init(void)
diff --git a/bsp/efm32/Libraries/emlib/src/em_opamp.c b/bsp/efm32/Libraries/emlib/src/em_opamp.c
index f12551430f..c44ab9c4a6 100644
--- a/bsp/efm32/Libraries/emlib/src/em_opamp.c
+++ b/bsp/efm32/Libraries/emlib/src/em_opamp.c
@@ -243,7 +243,7 @@ void OPAMP_Disable( DAC_TypeDef *dac, OPAMP_TypeDef opa )
 void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef *init )
 {
   uint32_t offset;
-  
+
   EFM_ASSERT( DAC_REF_VALID( dac ) );
   EFM_ASSERT( DAC_OPA_VALID( opa ) );
   EFM_ASSERT( init->bias <= ( _DAC_BIASPROG_BIASPROG_MASK  >>
@@ -267,13 +267,13 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH0OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH0OFFSET_MASK >>
                                     _DAC_CAL_CH0OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_CAL_CH0OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_CAL_CH0OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_CAL_CH0OFFSET_SHIFT );
     }
-    
+
     dac->OPA0MUX  = (uint32_t)init->resSel                                |
                     (uint32_t)init->outMode                               |
                     init->outPen                                          |
@@ -315,11 +315,11 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH1OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_CAL_CH1OFFSET_MASK >>
                                     _DAC_CAL_CH1OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_CAL_CH1OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_CAL_CH1OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_CAL_CH1OFFSET_SHIFT );
     }
 
     dac->OPA1MUX  = (uint32_t)init->resSel                                |
@@ -370,11 +370,11 @@ void OPAMP_Enable( DAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef
     }
     else
     {
-      EFM_ASSERT( init->offset <= ( _DAC_OPAOFFSET_OPA2OFFSET_MASK >> 
+      EFM_ASSERT( init->offset <= ( _DAC_OPAOFFSET_OPA2OFFSET_MASK >>
                                     _DAC_OPAOFFSET_OPA2OFFSET_SHIFT   ) );
-      
+
       dac->CAL = ( dac->CAL      & ~_DAC_OPAOFFSET_OPA2OFFSET_MASK  ) |
-                 ( init->offset <<  _DAC_OPAOFFSET_OPA2OFFSET_SHIFT );        
+                 ( init->offset <<  _DAC_OPAOFFSET_OPA2OFFSET_SHIFT );
     }
 
     dac->OPA2MUX  = (uint32_t)init->resSel                                |
diff --git a/bsp/efm32/Libraries/emlib/src/em_rmu.c b/bsp/efm32/Libraries/emlib/src/em_rmu.c
index 93da92dee0..8a45d668cf 100644
--- a/bsp/efm32/Libraries/emlib/src/em_rmu.c
+++ b/bsp/efm32/Libraries/emlib/src/em_rmu.c
@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file
  * @brief Reset Management Unit (RMU) peripheral module peripheral API
- *  
+ *
  * @author Energy Micro AS
  * @version 3.0.0
  *******************************************************************************
diff --git a/bsp/efm32/Libraries/emlib/src/em_timer.c b/bsp/efm32/Libraries/emlib/src/em_timer.c
index b7d8c8930e..cdca54573f 100644
--- a/bsp/efm32/Libraries/emlib/src/em_timer.c
+++ b/bsp/efm32/Libraries/emlib/src/em_timer.c
@@ -136,7 +136,7 @@ void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init)
   {
     timer->CMD = TIMER_CMD_STOP;
   }
-  
+
   /* Reset counter */
   timer->CNT = _TIMER_CNT_RESETVALUE;
 
diff --git a/bsp/efm32/Libraries/emlib/src/em_usart.c b/bsp/efm32/Libraries/emlib/src/em_usart.c
index d33fe9e30c..33a944f216 100644
--- a/bsp/efm32/Libraries/emlib/src/em_usart.c
+++ b/bsp/efm32/Libraries/emlib/src/em_usart.c
@@ -82,7 +82,7 @@
 #endif
 
 #if (UART_COUNT == 1)
-#define UART_REF_VALID(ref)     ((ref)==UART0) 
+#define UART_REF_VALID(ref)     ((ref)==UART0)
 #elif (UART_COUNT == 2)
 #define UART_REF_VALID(ref)     (((ref)==UART0) || ((ref)==UART1))
 #else
@@ -733,8 +733,8 @@ void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init)
  * @brief
  *   Initialize automatic transmissions using PRS channel as trigger
  * @note
- *   Initialize USART with USART_Init() before setting up PRS configuration 
- * 
+ *   Initialize USART with USART_Init() before setting up PRS configuration
+ *
  * @param[in] usart Pointer to USART to configure
  * @param[in] init Pointer to initialization structure
  ******************************************************************************/
diff --git a/bsp/efm32/Libraries/emlib/src/em_vcmp.c b/bsp/efm32/Libraries/emlib/src/em_vcmp.c
index 6a83a22ae8..2e0d33da03 100644
--- a/bsp/efm32/Libraries/emlib/src/em_vcmp.c
+++ b/bsp/efm32/Libraries/emlib/src/em_vcmp.c
@@ -133,7 +133,7 @@ void VCMP_Init(const VCMP_Init_TypeDef *vcmpInit)
     while(!VCMP_Ready());
     VCMP_LowPowerRefSet(vcmpInit->lowPowerRef);
   }
-  
+
   /* Clear edge interrupt */
   VCMP_IntClear(VCMP_IF_EDGE);
 }
diff --git a/bsp/efm32/board.c b/bsp/efm32/board.c
index cdd44767f1..ea8b0640d2 100644
--- a/bsp/efm32/board.c
+++ b/bsp/efm32/board.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	board.c
- * @brief 	Board support of RT-Thread RTOS for EFM32
+ * @file    board.c
+ * @brief   Board support of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,12 +10,12 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2010-12-21	onelife		Initial creation for EFM32
- * 2011-05-06	onelife		Add EFM32 development kit and SPI Flash support
- * 2011-07-12	onelife		Add SWO output enable function
- * 2011-12-08	onelife		Add giant gecko development kit support
- * 2011-12-09	onelife		Add giant gecko support
+ * Date         Author      Notes
+ * 2010-12-21   onelife     Initial creation for EFM32
+ * 2011-05-06   onelife     Add EFM32 development kit and SPI Flash support
+ * 2011-07-12   onelife     Add SWO output enable function
+ * 2011-12-08   onelife     Add giant gecko development kit support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add LEUART module support
  * 2011-12-14   onelife     Add LFXO enabling routine in driver initialization
  *  function
@@ -37,19 +37,19 @@
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-#define IS_NVIC_VECTTAB(VECTTAB) 		(((VECTTAB) == RAM_MEM_BASE) || \
-										((VECTTAB) == FLASH_MEM_BASE))
-#define IS_NVIC_OFFSET(OFFSET) 			((OFFSET) < 0x000FFFFF)
+#define IS_NVIC_VECTTAB(VECTTAB)        (((VECTTAB) == RAM_MEM_BASE) || \
+                                        ((VECTTAB) == FLASH_MEM_BASE))
+#define IS_NVIC_OFFSET(OFFSET)          ((OFFSET) < 0x000FFFFF)
 
 /***************************************************************************//**
  * @addtogroup SysTick_clock_source
  * @{
  ******************************************************************************/
 #define SysTick_CLKSource_MASK          ((rt_uint32_t)0x00000004)
-#define SysTick_CLKSource_RTC		    ((rt_uint32_t)0x00000000)
-#define SysTick_CLKSource_HFCORECLK		((rt_uint32_t)0x00000004)
-#define IS_SYSTICK_CLK_SOURCE(SOURCE)	(((SOURCE) == SysTick_CLKSource_RTC) || \
-										((SOURCE) == SysTick_CLKSource_HFCORECLK))
+#define SysTick_CLKSource_RTC           ((rt_uint32_t)0x00000000)
+#define SysTick_CLKSource_HFCORECLK     ((rt_uint32_t)0x00000004)
+#define IS_SYSTICK_CLK_SOURCE(SOURCE)   (((SOURCE) == SysTick_CLKSource_RTC) || \
+                                        ((SOURCE) == SysTick_CLKSource_HFCORECLK))
 /***************************************************************************//**
  * @}
  ******************************************************************************/
@@ -67,20 +67,20 @@
  * @note
  *
  * @param[in] NVIC_VectTab
- *	 Indicate the vector table is allocated in RAM or ROM
+ *   Indicate the vector table is allocated in RAM or ROM
  *
  * @param[in] Offset
  *   The vector table offset
  ******************************************************************************/
 static void NVIC_SetVectorTable(
-	rt_uint32_t NVIC_VectTab,
-	rt_uint32_t Offset)
+    rt_uint32_t NVIC_VectTab,
+    rt_uint32_t Offset)
 {
-	/* Check the parameters */
-	RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab));
-	RT_ASSERT(IS_NVIC_OFFSET(Offset));
+    /* Check the parameters */
+    RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab));
+    RT_ASSERT(IS_NVIC_OFFSET(Offset));
 
-	SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80);
+    SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80);
 }
 
 /***************************************************************************//**
@@ -95,19 +95,19 @@ static void NVIC_SetVectorTable(
 static void NVIC_Configuration(void)
 {
 #ifdef  VECT_TAB_RAM
-	/* Set the vector table allocated at 0x20000000 */
-	NVIC_SetVectorTable(RAM_MEM_BASE, 0x0);
+    /* Set the vector table allocated at 0x20000000 */
+    NVIC_SetVectorTable(RAM_MEM_BASE, 0x0);
 #else  /* VECT_TAB_FLASH  */
-	/* Set the vector table allocated at 0x00000000 */
-	NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0);
+    /* Set the vector table allocated at 0x00000000 */
+    NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0);
 #endif
 
-	/* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for
-	   subpriority */
-	NVIC_SetPriorityGrouping(0x7UL);
+    /* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for
+       subpriority */
+    NVIC_SetPriorityGrouping(0x7UL);
 
-	/* Set Base Priority Mask Register */
-	__set_BASEPRI(EFM32_BASE_PRI_DEFAULT);
+    /* Set Base Priority Mask Register */
+    __set_BASEPRI(EFM32_BASE_PRI_DEFAULT);
 }
 
 /***************************************************************************//**
@@ -119,13 +119,13 @@ static void NVIC_Configuration(void)
  * @note
  *
  * @param[in] SysTick_CLKSource
- *	 Specifies the SysTick clock source.
+ *   Specifies the SysTick clock source.
  *
  * @arg SysTick_CLKSource_HCLK_Div8
- * 	 AHB clock divided by 8 selected as SysTick clock source.
+ *   AHB clock divided by 8 selected as SysTick clock source.
  *
  * @arg SysTick_CLKSource_HCLK
- *	 AHB clock selected as SysTick clock source.
+ *   AHB clock selected as SysTick clock source.
  ******************************************************************************/
 static void SysTick_CLKSourceConfig(rt_uint32_t SysTick_CLKSource)
 {
@@ -184,14 +184,14 @@ static void  SysTick_Configuration(void)
     /* Start LETIMER0 */
     LETIMER_Init(LETIMER0, &letimerInit);
 #else
-	rt_uint32_t 	coreClk;
-	rt_uint32_t 	cnts;
+    rt_uint32_t     coreClk;
+    rt_uint32_t     cnts;
 
-	coreClk = SystemCoreClockGet();
-	cnts = coreClk / RT_TICK_PER_SECOND;
+    coreClk = SystemCoreClockGet();
+    cnts = coreClk / RT_TICK_PER_SECOND;
 
-	SysTick_Config(cnts);
-	SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK);
+    SysTick_Config(cnts);
+    SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK);
 #endif
 }
 
@@ -206,9 +206,9 @@ static void  SysTick_Configuration(void)
  ******************************************************************************/
 void Swo_Configuration(void)
 {
-	rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000;
-	rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010;
-	rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0;
+    rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000;
+    rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010;
+    rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0;
 
     CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
     /* Enable Serial wire output pin */
@@ -258,12 +258,12 @@ void Swo_Configuration(void)
  ******************************************************************************/
 void rt_hw_board_init(void)
 {
-	/* Chip errata */
-	CHIP_Init();
+    /* Chip errata */
+    CHIP_Init();
 
     /* Initialize DVK board register access */
 #if defined(EFM32_GXXX_DK)
-	DVK_init();
+    DVK_init();
 #elif defined(EFM32GG_DK3750)
     DVK_init(DVK_Init_EBI);
 
@@ -272,12 +272,12 @@ void rt_hw_board_init(void)
     DVK_clearInterruptFlags(BC_INTFLAG_MASK);
 #endif
 
-	/* config NVIC Configuration */
-	NVIC_Configuration();
+    /* config NVIC Configuration */
+    NVIC_Configuration();
 
 #if defined(EFM32_USING_HFXO)
-	/* Configure external oscillator */
-	SystemHFXOClockSet(EFM32_HFXO_FREQUENCY);
+    /* Configure external oscillator */
+    SystemHFXOClockSet(EFM32_HFXO_FREQUENCY);
 
     /* Switching the CPU clock source to HFXO */
     CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFXO);
@@ -293,15 +293,15 @@ void rt_hw_board_init(void)
 
 #if defined(EFM32_SWO_ENABLE)
     /* Enable SWO */
-	Swo_Configuration();
+    Swo_Configuration();
 #endif
 
-	/* Enable high frequency peripheral clock */
-	CMU_ClockEnable(cmuClock_HFPER, true);
-	/* Enabling clock to the interface of the low energy modules */
-	CMU_ClockEnable(cmuClock_CORELE, true);
+    /* Enable high frequency peripheral clock */
+    CMU_ClockEnable(cmuClock_HFPER, true);
+    /* Enabling clock to the interface of the low energy modules */
+    CMU_ClockEnable(cmuClock_CORELE, true);
     /* Enable GPIO clock */
-	CMU_ClockEnable(cmuClock_GPIO, true);
+    CMU_ClockEnable(cmuClock_GPIO, true);
 
     /* Configure the SysTick */
     SysTick_Configuration();
@@ -318,8 +318,8 @@ void rt_hw_board_init(void)
  ******************************************************************************/
 void rt_hw_driver_init(void)
 {
-	/* Initialize DMA */
-	rt_hw_dma_init();
+    /* Initialize DMA */
+    rt_hw_dma_init();
 
     /* Select LFXO for specified module (and wait for it to stabilize) */
 #if (!defined(EFM32_USING_LFXO) && defined(RT_USING_RTC))
@@ -331,11 +331,11 @@ void rt_hw_driver_init(void)
 #error "Low frequency clock source is needed for using LEUART"
 #endif
 
-	/* Initialize USART */
+    /* Initialize USART */
 #if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
     defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
     defined(RT_USING_UART1))
-	rt_hw_usart_init();
+    rt_hw_usart_init();
 #endif
 
     /* Initialize LEUART */
@@ -343,7 +343,7 @@ void rt_hw_driver_init(void)
     rt_hw_leuart_init();
 #endif
 
-	/* Setup Console */
+    /* Setup Console */
 #if defined(EFM32_GXXX_DK)
     DVK_enablePeripheral(DVK_RS232A);
     DVK_enablePeripheral(DVK_SPI);
@@ -354,31 +354,31 @@ void rt_hw_driver_init(void)
     DVK_enablePeripheral(DVK_RS232_LEUART);
  #endif
 #endif
-	rt_console_set_device(CONSOLE_DEVICE);
+    rt_console_set_device(CONSOLE_DEVICE);
 
-	/* Initialize Timer */
+    /* Initialize Timer */
 #if (defined(RT_USING_TIMER0) || defined(RT_USING_TIMER1) || defined(RT_USING_TIMER2))
-	rt_hw_timer_init();
+    rt_hw_timer_init();
 #endif
 
-	/* Initialize ADC */
+    /* Initialize ADC */
 #if defined(RT_USING_ADC0)
-	rt_hw_adc_init();
+    rt_hw_adc_init();
 #endif
 
-	/* Initialize ACMP */
+    /* Initialize ACMP */
 #if (defined(RT_USING_ACMP0) || defined(RT_USING_ACMP1))
-	rt_hw_acmp_init();
+    rt_hw_acmp_init();
 #endif
 
-	/* Initialize IIC */
+    /* Initialize IIC */
 #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
-	rt_hw_iic_init();
+    rt_hw_iic_init();
 #endif
 
-	/* Initialize RTC */
+    /* Initialize RTC */
 #if defined(RT_USING_RTC)
-	rt_hw_rtc_init();
+    rt_hw_rtc_init();
 #endif
 
     /* Enable SPI access to MicroSD card */
diff --git a/bsp/efm32/board.h b/bsp/efm32/board.h
index a97b0d9bc0..b92e10194b 100644
--- a/bsp/efm32/board.h
+++ b/bsp/efm32/board.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	board.h
- * @brief 	Board support of RT-Thread RTOS for EFM32
+ * @file    board.h
+ * @brief   Board support of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,18 +10,18 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2010-12-21	onelife		Initial creation for EFM32
- * 2011-05-06	onelife		Add EFM32 development kit and SPI Flash support
- * 2011-07-12	onelife		Add prototype for SWO output enable and interrupt
+ * Date         Author      Notes
+ * 2010-12-21   onelife     Initial creation for EFM32
+ * 2011-05-06   onelife     Add EFM32 development kit and SPI Flash support
+ * 2011-07-12   onelife     Add prototype for SWO output enable and interrupt
  *  context check functions
- * 2011-12-08	onelife		Add giant gecko development kit support
- * 2011-12-09	onelife		Add giant gecko support
+ * 2011-12-08   onelife     Add giant gecko development kit support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add LEUART module support
  * 2011-12-14   onelife     Add LFXO enabling routine in driver initialization
  *  function
  * 2011-12-20   onelife     Move SPI Auto-CS setting to "rtconfig.h"
- * 2012-05-15	onelife		Modified to compatible with CMSIS v3
+ * 2012-05-15   onelife     Modified to compatible with CMSIS v3
  ******************************************************************************/
 #ifndef __BOARD_H__
 #define __BOARD_H__
@@ -72,15 +72,15 @@ extern volatile rt_uint32_t rt_system_status;
 #define EFM32_SWO_ENABLE
 #endif
 
-#define EFM32_NO_DATA				(0)
-#define EFM32_NO_POINTER			(RT_NULL)
-#define EFM32_NO_OFFSET				(-1)
-#define EFM32_NO_DMA				(-1)
+#define EFM32_NO_DATA               (0)
+#define EFM32_NO_POINTER            (RT_NULL)
+#define EFM32_NO_OFFSET             (-1)
+#define EFM32_NO_DMA                (-1)
 
 /* SECTION: SPI Flash */
 #if defined(EFM32_USING_SFLASH)
-#define SFLASH_CS_PORT 				(gpioPortC)
-#define SFLASH_CS_PIN 				(8)
+#define SFLASH_CS_PORT              (gpioPortC)
+#define SFLASH_CS_PIN               (8)
 #endif
 
 /* SECTION: Micro SD */
@@ -114,9 +114,9 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: SYSTEM */
-#define EFM32_SRAM_END 				(SRAM_BASE + SRAM_SIZE)
-#define EFM32_BASE_PRI_DEFAULT 		(0x0UL << 5)
-#define EFM32_IRQ_PRI_DEFAULT 		(0x4UL << 5)
+#define EFM32_SRAM_END              (SRAM_BASE + SRAM_SIZE)
+#define EFM32_BASE_PRI_DEFAULT      (0x0UL << 5)
+#define EFM32_IRQ_PRI_DEFAULT       (0x4UL << 5)
 
 /* SECTION: CLOCK */
 #define EFM32_USING_HFXO
@@ -125,9 +125,9 @@ extern volatile rt_uint32_t rt_system_status;
  #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK))
  #define EFM32_HFXO_FREQUENCY       (32000000)
  #elif defined(EFM32GG_DK3750)
- #define EFM32_HFXO_FREQUENCY 		(48000000)
+ #define EFM32_HFXO_FREQUENCY       (48000000)
  #else
- #define EFM32_HFXO_FREQUENCY		(00000000)
+ #define EFM32_HFXO_FREQUENCY       (00000000)
  #endif
 #endif
 #if defined(EFM32_USING_LFXO)
@@ -141,8 +141,8 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: USART */
-#define USART_RX_BUFFER_SIZE		(64)
-#define LEUART_RX_BUFFER_SIZE		(64)
+#define USART_RX_BUFFER_SIZE        (64)
+#define LEUART_RX_BUFFER_SIZE       (64)
 /* Location count (start from 0) */
 #if defined(_EFM32_GECKO_FAMILY)
 #define EFM32_USART_LOCATION_COUNT  (3)
@@ -155,14 +155,14 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SUBSECTION: UART */
-#define UART_BAUDRATE				(115200)
+#define UART_BAUDRATE               (115200)
 
 /* SUBSECTION: SPI */
 /* Max SPI clock: HFPERCLK/2 for master, HFPERCLK/8 for slave */
-#define SPI_BAUDRATE				(4000000)
+#define SPI_BAUDRATE                (4000000)
 
 /* SECTION: I2C */
-#define IIC_RX_BUFFER_SIZE			(32)
+#define IIC_RX_BUFFER_SIZE          (32)
 #if defined(_EFM32_GECKO_FAMILY)
 #define EFM32_IIC_LOCATION_COUNT    (4)
 #elif defined(_EFM32_GIANT_FAMILY)
@@ -170,61 +170,61 @@ extern volatile rt_uint32_t rt_system_status;
 #endif
 
 /* SECTION: ADC */
-#define ADC_CALI_REF				(adcRef2V5)
-#define ADC_CALI_CH 				(adcSingleInpCh5)
-#define ADC_CONVERT_FREQUENCY 		(7000000)
+#define ADC_CALI_REF                (adcRef2V5)
+#define ADC_CALI_CH                 (adcSingleInpCh5)
+#define ADC_CONVERT_FREQUENCY       (7000000)
 
 #if (RT_CONSOLE_DEVICE == EFM_USART0)
-#define CONSOLE_DEVICE 				RT_USART0_NAME
+#define CONSOLE_DEVICE              RT_USART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_USART1)
-#define CONSOLE_DEVICE 				RT_USART1_NAME
+#define CONSOLE_DEVICE              RT_USART1_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_USART2)
-#define CONSOLE_DEVICE 				RT_USART2_NAME
+#define CONSOLE_DEVICE              RT_USART2_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_UART0)
-#define CONSOLE_DEVICE 				RT_UART0_NAME
+#define CONSOLE_DEVICE              RT_UART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_UART1)
-#define CONSOLE_DEVICE 				RT_UART1_NAME
+#define CONSOLE_DEVICE              RT_UART1_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_LEUART0)
-#define CONSOLE_DEVICE 				RT_LEUART0_NAME
+#define CONSOLE_DEVICE              RT_LEUART0_NAME
 #elif (RT_CONSOLE_DEVICE == EFM_LEUART1)
-#define CONSOLE_DEVICE 				RT_LEUART1_NAME
+#define CONSOLE_DEVICE              RT_LEUART1_NAME
 #else
-#define CONSOLE_DEVICE 				"NONE"
+#define CONSOLE_DEVICE              "NONE"
 #endif
 
 
 /* The following defines should be consistent with those in diskio.h */
-#define CTRL_SYNC						0
-#define GET_SECTOR_COUNT				1
-#define GET_SECTOR_SIZE					2
-#define GET_BLOCK_SIZE					3
-#define MMC_GET_TYPE					10
-#define MMC_GET_CSD						11
-#define MMC_GET_CID						12
-#define MMC_GET_OCR						13
-#define MMC_GET_SDSTAT					14
+#define CTRL_SYNC                       0
+#define GET_SECTOR_COUNT                1
+#define GET_SECTOR_SIZE                 2
+#define GET_BLOCK_SIZE                  3
+#define MMC_GET_TYPE                    10
+#define MMC_GET_CSD                     11
+#define MMC_GET_CID                     12
+#define MMC_GET_OCR                     13
+#define MMC_GET_SDSTAT                  14
 /* The above defines should be consistent with those in diskio.h */
 
 /* I/O control options */
-#define RT_DEVICE_CTRL_SD_SYNC 			CTRL_SYNC
-#define RT_DEVICE_CTRL_SD_GET_SCOUNT 	GET_SECTOR_COUNT
-#define RT_DEVICE_CTRL_SD_GET_SSIZE		GET_SECTOR_SIZE
-#define RT_DEVICE_CTRL_SD_GET_BSIZE 	GET_BLOCK_SIZE
-#define RT_DEVICE_CTRL_SD_GET_TYPE 		MMC_GET_TYPE
-#define RT_DEVICE_CTRL_SD_GET_CSD		MMC_GET_CSD
-#define RT_DEVICE_CTRL_SD_GET_CID 		MMC_GET_CID
-#define RT_DEVICE_CTRL_SD_GET_OCR 		MMC_GET_OCR
-#define RT_DEVICE_CTRL_SD_GET_SDSTAT	MMC_GET_SDSTAT
+#define RT_DEVICE_CTRL_SD_SYNC          CTRL_SYNC
+#define RT_DEVICE_CTRL_SD_GET_SCOUNT    GET_SECTOR_COUNT
+#define RT_DEVICE_CTRL_SD_GET_SSIZE     GET_SECTOR_SIZE
+#define RT_DEVICE_CTRL_SD_GET_BSIZE     GET_BLOCK_SIZE
+#define RT_DEVICE_CTRL_SD_GET_TYPE      MMC_GET_TYPE
+#define RT_DEVICE_CTRL_SD_GET_CSD       MMC_GET_CSD
+#define RT_DEVICE_CTRL_SD_GET_CID       MMC_GET_CID
+#define RT_DEVICE_CTRL_SD_GET_OCR       MMC_GET_OCR
+#define RT_DEVICE_CTRL_SD_GET_SDSTAT    MMC_GET_SDSTAT
 
 /*! fixme: move the following define to Rtdef.h */
-#define RT_DEVICE_CTRL_USART_RBUFFER	(0xF1)		/*!< set USART/UART rx buffer */
-#define RT_DEVICE_CTRL_LEUART_RBUFFER	(0xF2)		/*!< set LEUART rx buffer */
-#define RT_DEVICE_CTRL_IIC_SETTING		(0xF3)		/*!< change IIC setting */
-#define RT_DEVICE_CTRL_TIMER_PERIOD		(0xF4)		/*!< set Timer timeout period */
-#define RT_DEVICE_CTRL_ADC_MODE			(0xF5)		/*!< change ADC mode */
-#define RT_DEVICE_CTRL_ADC_RESULT		(0xF6)		/*!< get ADC result */
-#define RT_DEVICE_CTRL_ACMP_INIT		(0xF7)		/*!< Initialize ACMP */
-#define RT_DEVICE_CTRL_ACMP_OUTPUT		(0xF8)		/*!< get ACMP output */
+#define RT_DEVICE_CTRL_USART_RBUFFER    (0xF1)      /*!< set USART/UART rx buffer */
+#define RT_DEVICE_CTRL_LEUART_RBUFFER   (0xF2)      /*!< set LEUART rx buffer */
+#define RT_DEVICE_CTRL_IIC_SETTING      (0xF3)      /*!< change IIC setting */
+#define RT_DEVICE_CTRL_TIMER_PERIOD     (0xF4)      /*!< set Timer timeout period */
+#define RT_DEVICE_CTRL_ADC_MODE         (0xF5)      /*!< change ADC mode */
+#define RT_DEVICE_CTRL_ADC_RESULT       (0xF6)      /*!< get ADC result */
+#define RT_DEVICE_CTRL_ACMP_INIT        (0xF7)      /*!< Initialize ACMP */
+#define RT_DEVICE_CTRL_ACMP_OUTPUT      (0xF8)      /*!< get ACMP output */
 
 /* Exported functions ------------------------------------------------------- */
 void rt_hw_board_init(void);
diff --git a/bsp/efm32/dev_accel.c b/bsp/efm32/dev_accel.c
index fb2c05174b..07fcc25ded 100644
--- a/bsp/efm32/dev_accel.c
+++ b/bsp/efm32/dev_accel.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_accel.c
- * @brief 	Accelerometer driver of RT-Thread RTOS for EFM32
+ * @file    dev_accel.c
+ * @brief   Accelerometer driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,10 +10,10 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-13	onelife		Initial creation for using EFM32 ADC module to
+ * Date         Author      Notes
+ * 2011-07-13   onelife     Initial creation for using EFM32 ADC module to
  *  interface the Freescale MMA7361L
- * 2011-08-02	onelife		Add digital interface support of using EFM32 IIC
+ * 2011-08-02   onelife     Add digital interface support of using EFM32 IIC
  *  module for the Freescale MMA7455L
  ******************************************************************************/
 
@@ -38,23 +38,23 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_ACCEL_DEBUG
-#define accel_debug(format,args...) 		rt_kprintf(format, ##args)
+#define accel_debug(format,args...)         rt_kprintf(format, ##args)
 #else
 #define accel_debug(format,args...)
 #endif
 
 /* Private constants ---------------------------------------------------------*/
-static rt_device_t 						accel;
+static rt_device_t                      accel;
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-static struct efm32_adc_control_t 		control = \
-	{ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}};
-static struct efm32_accel_result_t 		accelOffset = {0};
+static struct efm32_adc_control_t       control = \
+    {ADC_MODE_SCAN, {3, ACCEL_USING_DMA}, {}};
+static struct efm32_accel_result_t      accelOffset = {0};
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-static const struct efm32_iic_control_t	control = \
-	{IIC_STATE_MASTER, 0x0000};
+static const struct efm32_iic_control_t control = \
+    {IIC_STATE_MASTER, 0x0000};
 #endif
-static rt_bool_t 						accelInTime = true;
-static rt_uint32_t 						accelConfig = 0;
+static rt_bool_t                        accelInTime = true;
+static rt_uint32_t                      accelConfig = 0;
 
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
@@ -68,99 +68,99 @@ static rt_uint32_t 						accelConfig = 0;
  * @note
  *
  * @param[out] data
- *	Pointer to output buffer
+ *  Pointer to output buffer
  *
  * @param[in] lowResolution
- *	Resolution selection
+ *  Resolution selection
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
-	rt_bool_t lowResolution)
+    rt_bool_t lowResolution)
 {
-	RT_ASSERT(accel != RT_NULL);
+    RT_ASSERT(accel != RT_NULL);
 
-	rt_err_t ret;
+    rt_err_t ret;
 
-	if (data == RT_NULL)
-	{
-		return -RT_ERROR;
-	}
+    if (data == RT_NULL)
+    {
+        return -RT_ERROR;
+    }
 
-	ret = RT_EOK;
-	do
-	{
-		/* --------- ADC interface --------- */
+    ret = RT_EOK;
+    do
+    {
+        /* --------- ADC interface --------- */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		struct efm32_adc_result_t result;
+        struct efm32_adc_result_t result;
 
-		result.mode = control.mode;
-		result.buffer = (void *)data;
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME,
-			(void *)&result)) != RT_EOK)
-		{
-			break;
-		}
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \
-			(void *)&result)) != RT_EOK)
-		{
-			break;
-		}
+        result.mode = control.mode;
+        result.buffer = (void *)data;
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_RESUME,
+            (void *)&result)) != RT_EOK)
+        {
+            break;
+        }
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_RESULT, \
+            (void *)&result)) != RT_EOK)
+        {
+            break;
+        }
 
-		data->x += accelOffset.x - 0x800;
-		data->y += accelOffset.y - 0x800;
-		data->z += accelOffset.z - 0x800;
-		if (lowResolution)
-		{
-			data->x >>= 4;
-			data->y >>= 4;
-			data->z >>= 4;
-		}
+        data->x += accelOffset.x - 0x800;
+        data->y += accelOffset.y - 0x800;
+        data->z += accelOffset.z - 0x800;
+        if (lowResolution)
+        {
+            data->x >>= 4;
+            data->y >>= 4;
+            data->z >>= 4;
+        }
 
-		/* --------- IIC interface --------- */
+        /* --------- IIC interface --------- */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		if (lowResolution || \
-			((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G))
-		{
-			rt_int8_t buf[3];
+        if (lowResolution || \
+            ((accelConfig & ACCEL_MASK_RANGE) != MCTL_RANGE_8G))
+        {
+            rt_int8_t buf[3];
 
-			buf[0] = XOUT8;
-			if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
-				sizeof(buf)) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			data->x = buf[0];
-			data->y = buf[1];
-			data->z = buf[2];
-		}
-		else
-		{
-			rt_uint8_t buf[6];
-			rt_uint16_t *temp = (rt_uint16_t *)&buf;
+            buf[0] = XOUT8;
+            if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
+                sizeof(buf)) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            data->x = buf[0];
+            data->y = buf[1];
+            data->z = buf[2];
+        }
+        else
+        {
+            rt_uint8_t buf[6];
+            rt_uint16_t *temp = (rt_uint16_t *)&buf;
 
-			buf[0] = XOUTL;
-			if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
-				sizeof(buf)) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-			data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-			data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
-				((rt_uint32_t)*temp & 0x3FF);
-		}
+            buf[0] = XOUTL;
+            if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, \
+                sizeof(buf)) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            data->x = (*temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+            data->y = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+            data->z = (*++temp & 0x200) ? ((rt_uint32_t)*temp | ~0x3FF) : \
+                ((rt_uint32_t)*temp & 0x3FF);
+        }
 #endif
-		return RT_EOK;
-	} while (0);
+        return RT_EOK;
+    } while (0);
 
-	accel_debug("Accel err: Get data failed!\n");
-	return ret;
+    accel_debug("Accel err: Get data failed!\n");
+    return ret;
 }
 
 /***************************************************************************//**
@@ -172,357 +172,357 @@ rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
  * @note
  *
  * @param[in] parameter
- *	Parameter
+ *  Parameter
  ******************************************************************************/
 static void efm_accel_timer(void* parameter)
 {
-	accelInTime = false;
+    accelInTime = false;
 }
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
 /***************************************************************************//**
  * @brief
- *	Accelerometer level and pulse detection interrupts handler
+ *  Accelerometer level and pulse detection interrupts handler
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 static void efm_accel_isr(rt_device_t device)
 {
-	rt_uint8_t buf[2];
+    rt_uint8_t buf[2];
 
-	if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT)
-	{
-		/* Read detection source */
-		buf[0] = DETSRC;
-		if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
-		{
-			accel_debug("Accel: read error\n");
-			return;
-		}
-		accel_debug("Accel: DETSRC %x\n", buf[0]);
+    if ((accelConfig & ACCEL_MASK_MODE) != ACCEL_MODE_MEASUREMENT)
+    {
+        /* Read detection source */
+        buf[0] = DETSRC;
+        if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
+        {
+            accel_debug("Accel: read error\n");
+            return;
+        }
+        accel_debug("Accel: DETSRC %x\n", buf[0]);
 
-		/* Reset the interrupt flags: Part 1 */
-		buf[0] = INTRST;
-		buf[1] = INTRST_INT_1 | INTRST_INT_2;
-		accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
+        /* Reset the interrupt flags: Part 1 */
+        buf[0] = INTRST;
+        buf[1] = INTRST_INT_1 | INTRST_INT_2;
+        accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
 
-		/* Read status to waste some time */
-		buf[0] = STATUS;
-		if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
-		{
-			accel_debug("Accel: read error\n");
-			return;
-		}
-		accel_debug("Accel: STATUS %x\n", buf[0]);
+        /* Read status to waste some time */
+        buf[0] = STATUS;
+        if (accel->read(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 1) != 1)
+        {
+            accel_debug("Accel: read error\n");
+            return;
+        }
+        accel_debug("Accel: STATUS %x\n", buf[0]);
 
-		/* Reset the interrupt flags: Part 2 */
-		buf[0] = INTRST;
-		buf[1] = 0x00;
-		accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
-	}
+        /* Reset the interrupt flags: Part 2 */
+        buf[0] = INTRST;
+        buf[1] = 0x00;
+        accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	Accelerometer configuration function
+ *  Accelerometer configuration function
  *
  * @details
  *
  * @note
  *
  * @param[in] config
- *	Configuration options
+ *  Configuration options
  *
  * @param[in] level_threshold
- *	Level detection threshold
+ *  Level detection threshold
  *
  * @param[in] pulse_threshold
- *	Pulse detection threshold
+ *  Pulse detection threshold
  *
  * @param[in] pulse_duration
- *	Time window for 1st pulse
+ *  Time window for 1st pulse
  *
  * @param[in] pulse_latency
- *	Pulse latency Time
+ *  Pulse latency Time
  *
  * @param[in] pulse_duration2
- *	Time window for 2nd pulse
+ *  Time window for 2nd pulse
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_config(rt_uint32_t config,
-	rt_uint8_t level_threshold,
-	rt_uint8_t pulse_threshold,
-	rt_uint8_t pulse_duration,
-	rt_uint8_t pulse_latency,
-	rt_uint8_t pulse_duration2)
+    rt_uint8_t level_threshold,
+    rt_uint8_t pulse_threshold,
+    rt_uint8_t pulse_duration,
+    rt_uint8_t pulse_latency,
+    rt_uint8_t pulse_duration2)
 {
-	rt_err_t ret;
-	rt_uint8_t buf[2];
-	rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg;
+    rt_err_t ret;
+    rt_uint8_t buf[2];
+    rt_uint8_t mode, mctl_reg, ctl1_reg, ctl2_reg;
 
-	ret = RT_EOK;
-	mctl_reg = 0;
-	ctl1_reg = 0;
-	ctl2_reg = 0;
+    ret = RT_EOK;
+    mctl_reg = 0;
+    ctl1_reg = 0;
+    ctl2_reg = 0;
 
-	/* Modify MCTL */
-	mode = config & ACCEL_MASK_MODE;
-	switch (mode)
-	{
-	case ACCEL_MODE_STANDBY:
-		mctl_reg |= MCTL_MODE_STANDBY;
-		break;
-	case ACCEL_MODE_MEASUREMENT:
-		mctl_reg |= MCTL_MODE_MEASUREMENT;
-		break;
-	case ACCEL_MODE_LEVEL:
-		mctl_reg |= MCTL_MODE_LEVEL;
-		break;
-	case ACCEL_MODE_PULSE:
-		mctl_reg |= MCTL_MODE_PULSE;
-		break;
-	default:
-		return -RT_ERROR;
-	}
+    /* Modify MCTL */
+    mode = config & ACCEL_MASK_MODE;
+    switch (mode)
+    {
+    case ACCEL_MODE_STANDBY:
+        mctl_reg |= MCTL_MODE_STANDBY;
+        break;
+    case ACCEL_MODE_MEASUREMENT:
+        mctl_reg |= MCTL_MODE_MEASUREMENT;
+        break;
+    case ACCEL_MODE_LEVEL:
+        mctl_reg |= MCTL_MODE_LEVEL;
+        break;
+    case ACCEL_MODE_PULSE:
+        mctl_reg |= MCTL_MODE_PULSE;
+        break;
+    default:
+        return -RT_ERROR;
+    }
 
-	switch (config & ACCEL_MASK_RANGE)
-	{
-	case ACCEL_RANGE_8G:
-		mctl_reg |= MCTL_RANGE_8G;
-		break;
-	case ACCEL_RANGE_4G:
-		mctl_reg |= MCTL_RANGE_4G;
-		break;
-	case ACCEL_RANGE_2G:
-		mctl_reg |= MCTL_RANGE_2G;
-		break;
-	default:
-		return -RT_ERROR;
-	}
+    switch (config & ACCEL_MASK_RANGE)
+    {
+    case ACCEL_RANGE_8G:
+        mctl_reg |= MCTL_RANGE_8G;
+        break;
+    case ACCEL_RANGE_4G:
+        mctl_reg |= MCTL_RANGE_4G;
+        break;
+    case ACCEL_RANGE_2G:
+        mctl_reg |= MCTL_RANGE_2G;
+        break;
+    default:
+        return -RT_ERROR;
+    }
 
-	if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
-	{
-		mctl_reg |= MCTL_PIN_INT1;
-	}
+    if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
+    {
+        mctl_reg |= MCTL_PIN_INT1;
+    }
 
-	/* Modify CTL1 */
-	if (config & ACCEL_INTPIN_INVERSE)
-	{
-		ctl1_reg |= CTL1_INTPIN_INVERSE;
-	}
+    /* Modify CTL1 */
+    if (config & ACCEL_INTPIN_INVERSE)
+    {
+        ctl1_reg |= CTL1_INTPIN_INVERSE;
+    }
 
-	switch (config & ACCEL_MASK_INT)
-	{
-	case ACCEL_INT_LEVEL_PULSE:
-		ctl1_reg |= CTL1_INT_LEVEL_PULSE;
-		break;
-	case ACCEL_INT_PULSE_LEVEL:
-		ctl1_reg |= CTL1_INT_PULSE_LEVEL;
-		break;
-	case ACCEL_INT_SINGLE_DOUBLE:
-		ctl1_reg |= CTL1_INT_SINGLE_DOUBLE;
-		break;
-	default:
-		break;
-	}
+    switch (config & ACCEL_MASK_INT)
+    {
+    case ACCEL_INT_LEVEL_PULSE:
+        ctl1_reg |= CTL1_INT_LEVEL_PULSE;
+        break;
+    case ACCEL_INT_PULSE_LEVEL:
+        ctl1_reg |= CTL1_INT_PULSE_LEVEL;
+        break;
+    case ACCEL_INT_SINGLE_DOUBLE:
+        ctl1_reg |= CTL1_INT_SINGLE_DOUBLE;
+        break;
+    default:
+        break;
+    }
 
-	switch (config & ACCEL_MASK_DISABLE)
-	{
-	case ACCEL_DISABLE_X:
-		ctl1_reg |= CTL1_X_DISABLE;
-		break;
-	case ACCEL_DISABLE_Y:
-		ctl1_reg |= CTL1_Y_DISABLE;
-		break;
-	case ACCEL_DISABLE_Z:
-		ctl1_reg |= CTL1_Z_DISABLE;
-		break;
-	default:
-		break;
-	}
+    switch (config & ACCEL_MASK_DISABLE)
+    {
+    case ACCEL_DISABLE_X:
+        ctl1_reg |= CTL1_X_DISABLE;
+        break;
+    case ACCEL_DISABLE_Y:
+        ctl1_reg |= CTL1_Y_DISABLE;
+        break;
+    case ACCEL_DISABLE_Z:
+        ctl1_reg |= CTL1_Z_DISABLE;
+        break;
+    default:
+        break;
+    }
 
-	if (config & ACCEL_THRESHOLD_INTEGER)
-	{
-		ctl1_reg |= CTL1_THRESHOLD_INTEGER;
-	}
+    if (config & ACCEL_THRESHOLD_INTEGER)
+    {
+        ctl1_reg |= CTL1_THRESHOLD_INTEGER;
+    }
 
-	if (config & ACCEL_BANDWIDTH_125HZ)
-	{
-		ctl1_reg |= CTL1_BANDWIDTH_125HZ;
-	}
+    if (config & ACCEL_BANDWIDTH_125HZ)
+    {
+        ctl1_reg |= CTL1_BANDWIDTH_125HZ;
+    }
 
-	/* Modify CTL2 */
-	if (config & ACCEL_LEVEL_AND)
-	{
-		ctl2_reg |= CTL2_LEVEL_AND;
-	}
-	if (config & ACCEL_PULSE_AND)
-	{
-		ctl2_reg |= CTL2_PULSE_AND;
-	}
-	if (config & ACCEL_DRIVE_STRONG)
-	{
-		ctl2_reg |= CTL2_DRIVE_STRONG;
-	}
+    /* Modify CTL2 */
+    if (config & ACCEL_LEVEL_AND)
+    {
+        ctl2_reg |= CTL2_LEVEL_AND;
+    }
+    if (config & ACCEL_PULSE_AND)
+    {
+        ctl2_reg |= CTL2_PULSE_AND;
+    }
+    if (config & ACCEL_DRIVE_STRONG)
+    {
+        ctl2_reg |= CTL2_DRIVE_STRONG;
+    }
 
-	do
-	{
-		/* Write registers */
-		buf[0] = MCTL;
-		buf[1] = mctl_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: MCTL %x\n", mctl_reg);
+    do
+    {
+        /* Write registers */
+        buf[0] = MCTL;
+        buf[1] = mctl_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: MCTL %x\n", mctl_reg);
 
-		buf[0] = CTL1;
-		buf[1] = ctl1_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: CTL1 %x\n", ctl1_reg);
+        buf[0] = CTL1;
+        buf[1] = ctl1_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: CTL1 %x\n", ctl1_reg);
 
-		buf[0] = CTL2;
-		buf[1] = ctl2_reg;
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-		{
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: CTL2 %x\n", ctl2_reg);
-		accelConfig = config;
+        buf[0] = CTL2;
+        buf[1] = ctl2_reg;
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+        {
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: CTL2 %x\n", ctl2_reg);
+        accelConfig = config;
 
-		if (mode == ACCEL_MODE_PULSE)
-		{
-			buf[0] = PDTH;
-			buf[1] = pulse_threshold;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: PDTH %x\n", buf[1]);
+        if (mode == ACCEL_MODE_PULSE)
+        {
+            buf[0] = PDTH;
+            buf[1] = pulse_threshold;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: PDTH %x\n", buf[1]);
 
-			buf[0] = PW;
-			buf[1] = pulse_duration;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: PW %x\n", buf[1]);
+            buf[0] = PW;
+            buf[1] = pulse_duration;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: PW %x\n", buf[1]);
 
-			buf[0] = LT;
-			buf[1] = pulse_latency;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: LT %x\n", buf[1]);
+            buf[0] = LT;
+            buf[1] = pulse_latency;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: LT %x\n", buf[1]);
 
-			buf[0] = TW;
-			buf[1] = pulse_duration2;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: TW %x\n", buf[1]);
-		}
+            buf[0] = TW;
+            buf[1] = pulse_duration2;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: TW %x\n", buf[1]);
+        }
 
-		if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
-		{
-			efm32_irq_hook_init_t hook;
+        if ((mode == ACCEL_MODE_LEVEL) || (mode == ACCEL_MODE_PULSE))
+        {
+            efm32_irq_hook_init_t hook;
 
-			/* Reset the interrupt flags: Part 1 */
-			buf[0] = INTRST;
-			buf[1] = INTRST_INT_1 | INTRST_INT_2;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
+            /* Reset the interrupt flags: Part 1 */
+            buf[0] = INTRST;
+            buf[1] = INTRST_INT_1 | INTRST_INT_2;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
 
-			/* Set level detection threshold */
-			buf[0] = LDTH;
-			if (config & ACCEL_THRESHOLD_INTEGER)
-			{
-				buf[1] = level_threshold;
-			}
-			else
-			{
-				buf[1] = level_threshold & 0x7f;
-			}
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-			accel_debug("Accel: LDTH %x\n", buf[1]);
+            /* Set level detection threshold */
+            buf[0] = LDTH;
+            if (config & ACCEL_THRESHOLD_INTEGER)
+            {
+                buf[1] = level_threshold;
+            }
+            else
+            {
+                buf[1] = level_threshold & 0x7f;
+            }
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+            accel_debug("Accel: LDTH %x\n", buf[1]);
 
-			/* Config interrupt */
-			hook.type		= efm32_irq_type_gpio;
-			hook.unit		= ACCEL_INT1_PIN;
-			hook.cbFunc 	= efm_accel_isr;
-			hook.userPtr	= RT_NULL;
-			efm32_irq_hook_register(&hook);
-			hook.unit		= ACCEL_INT2_PIN;
-			efm32_irq_hook_register(&hook);
-			/* Clear pending interrupt */
-			BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL);
-			BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL);
-			/* Set raising edge interrupt and clear/enable it */
-			GPIO_IntConfig(
-				ACCEL_INT1_PORT,
-				ACCEL_INT1_PIN,
-				true,
-				false,
-				true);
-			GPIO_IntConfig(
-				ACCEL_INT2_PORT,
-				ACCEL_INT2_PIN,
-				true,
-				false,
-				true);
-			if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
-				((rt_uint8_t)ACCEL_INT2_PORT % 2))
-			{
-				NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
-				NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(GPIO_ODD_IRQn);
-			}
-			if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
-				!((rt_uint8_t)ACCEL_INT2_PORT % 2))
-			{
-				NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
-				NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(GPIO_EVEN_IRQn);
-			}
+            /* Config interrupt */
+            hook.type       = efm32_irq_type_gpio;
+            hook.unit       = ACCEL_INT1_PIN;
+            hook.cbFunc     = efm_accel_isr;
+            hook.userPtr    = RT_NULL;
+            efm32_irq_hook_register(&hook);
+            hook.unit       = ACCEL_INT2_PIN;
+            efm32_irq_hook_register(&hook);
+            /* Clear pending interrupt */
+            BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT1_PIN, 0x1UL);
+            BITBAND_Peripheral(&(GPIO->IFC), ACCEL_INT2_PIN, 0x1UL);
+            /* Set raising edge interrupt and clear/enable it */
+            GPIO_IntConfig(
+                ACCEL_INT1_PORT,
+                ACCEL_INT1_PIN,
+                true,
+                false,
+                true);
+            GPIO_IntConfig(
+                ACCEL_INT2_PORT,
+                ACCEL_INT2_PIN,
+                true,
+                false,
+                true);
+            if (((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
+                ((rt_uint8_t)ACCEL_INT2_PORT % 2))
+            {
+                NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
+                NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(GPIO_ODD_IRQn);
+            }
+            if (!((rt_uint8_t)ACCEL_INT1_PORT % 2) || \
+                !((rt_uint8_t)ACCEL_INT2_PORT % 2))
+            {
+                NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
+                NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(GPIO_EVEN_IRQn);
+            }
 
-			/* Reset the interrupt flags: Part 2 */
-			buf[0] = INTRST;
-			buf[1] = 0x00;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
-			{
-				ret = -RT_ERROR;
-				break;
-			}
-		}
-	} while (0);
+            /* Reset the interrupt flags: Part 2 */
+            buf[0] = INTRST;
+            buf[1] = 0x00;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, (void *)buf, 2) == 0)
+            {
+                ret = -RT_ERROR;
+                break;
+            }
+        }
+    } while (0);
 
-	return ret;
+    return ret;
 }
 
 #endif
@@ -536,203 +536,203 @@ rt_err_t efm_accel_config(rt_uint32_t config,
  * @note
  *
  * @param[in] mode
- *	0, simple mode (assuming the device is placed on flat surface)
- *	1, interaction method
+ *  0, simple mode (assuming the device is placed on flat surface)
+ *  1, interaction method
  *
  * @param[in] period
- *	Time period to perform auto-zero calibration
+ *  Time period to perform auto-zero calibration
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period)
 {
-	RT_ASSERT(accel != RT_NULL);
+    RT_ASSERT(accel != RT_NULL);
 
-	rt_timer_t calTimer;
-	struct efm32_accel_result_t min = {0, 0, 0};
-	struct efm32_accel_result_t max = {0, 0, 0};
-	struct efm32_accel_result_t temp, sum;
-	rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE;
-	rt_uint8_t cmd[7] = {0};
-	rt_uint8_t i, j;
+    rt_timer_t calTimer;
+    struct efm32_accel_result_t min = {0, 0, 0};
+    struct efm32_accel_result_t max = {0, 0, 0};
+    struct efm32_accel_result_t temp, sum;
+    rt_int32_t simpleOffset[] = ACCEL_CAL_1G_VALUE;
+    rt_uint8_t cmd[7] = {0};
+    rt_uint8_t i, j;
 
-	/* Reset offset */
+    /* Reset offset */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-	accelOffset.x = 0;
-	accelOffset.y = 0;
-	accelOffset.z = 0;
+    accelOffset.x = 0;
+    accelOffset.y = 0;
+    accelOffset.z = 0;
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-	cmd[0] = XOFFL;
-	if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-	{
-		return -RT_ERROR;
-	}
+    cmd[0] = XOFFL;
+    if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+    {
+        return -RT_ERROR;
+    }
 #endif
 
-	if (mode == ACCEL_CAL_SIMPLE)
-	{
-		/* Simple mode */
-		for (j = 0; j < ACCEL_CAL_ROUND; j++)
-		{
-			sum.x = 0x0;
-			sum.y = 0x0;
-			sum.z = 0x0;
+    if (mode == ACCEL_CAL_SIMPLE)
+    {
+        /* Simple mode */
+        for (j = 0; j < ACCEL_CAL_ROUND; j++)
+        {
+            sum.x = 0x0;
+            sum.y = 0x0;
+            sum.z = 0x0;
 
-			for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
-			{
+            for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
+            {
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-				/* Waiting for data ready */
-				while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
+                /* Waiting for data ready */
+                while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
 #endif
-				if (efm_accel_get_data(&temp, false) != RT_EOK)
-				{
-					return -RT_ERROR;
-				}
-				sum.x += temp.x;
-				sum.y += temp.y;
-				sum.z += temp.z;
-			}
+                if (efm_accel_get_data(&temp, false) != RT_EOK)
+                {
+                    return -RT_ERROR;
+                }
+                sum.x += temp.x;
+                sum.y += temp.y;
+                sum.z += temp.z;
+            }
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-			temp.x = sum.x / ACCEL_CAL_SAMPLES;
-			temp.y = sum.y / ACCEL_CAL_SAMPLES;
-			temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT];
-			if ((temp.x == 0) && (temp.y == 0) && \
-				(temp.z == 0))
-			{
-				accel_debug("Accel: Offset %+d %+d %+d\n",
-					accelOffset.x, accelOffset.y, accelOffset.z);
-				break;
-			}
-			accelOffset.x -= temp.x;
-			accelOffset.y -= temp.y;
-			accelOffset.z -= temp.z;
+            temp.x = sum.x / ACCEL_CAL_SAMPLES;
+            temp.y = sum.y / ACCEL_CAL_SAMPLES;
+            temp.z = sum.z / ACCEL_CAL_SAMPLES - simpleOffset[ACCEL_G_SELECT];
+            if ((temp.x == 0) && (temp.y == 0) && \
+                (temp.z == 0))
+            {
+                accel_debug("Accel: Offset %+d %+d %+d\n",
+                    accelOffset.x, accelOffset.y, accelOffset.z);
+                break;
+            }
+            accelOffset.x -= temp.x;
+            accelOffset.y -= temp.y;
+            accelOffset.z -= temp.z;
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-			temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1);
-			temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1);
-			temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \
-				- (simpleOffset[ACCEL_G_SELECT] << 1);
-			if ((temp.x == 0) && (temp.y == 0) && \
-				(temp.z == 0))
-			{
-				break;
-			}
+            temp.x = sum.x / (ACCEL_CAL_SAMPLES >> 1);
+            temp.y = sum.y / (ACCEL_CAL_SAMPLES >> 1);
+            temp.z = sum.z / (ACCEL_CAL_SAMPLES >> 1) \
+                - (simpleOffset[ACCEL_G_SELECT] << 1);
+            if ((temp.x == 0) && (temp.y == 0) && \
+                (temp.z == 0))
+            {
+                break;
+            }
 
-			/* Set offset drift registers */
-			max.x -= temp.x;
-			max.y -= temp.y;
-			max.z -= temp.z;
-			*(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x;
-			*(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y;
-			*(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z;
-			if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-			{
-				return -RT_ERROR;
-			}
-			accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \
-				*(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
+            /* Set offset drift registers */
+            max.x -= temp.x;
+            max.y -= temp.y;
+            max.z -= temp.z;
+            *(rt_int16_t *)&cmd[1] = (rt_int16_t)max.x;
+            *(rt_int16_t *)&cmd[3] = (rt_int16_t)max.y;
+            *(rt_int16_t *)&cmd[5] = (rt_int16_t)max.z;
+            if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+            {
+                return -RT_ERROR;
+            }
+            accel_debug("Accel: Offset %+d %+d %+d\n", *(rt_int16_t *)&cmd[1], \
+                *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
 #endif
-			rt_thread_sleep(1);
-		}
-	}
-	else
-	{
-		/* Interact mode */
-		if ((calTimer = rt_timer_create(
-			"cal_tmr",
-			efm_accel_timer,
-			RT_NULL,
-			period,
-			RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL)
-		{
-			accel_debug("Accel err: Create timer failed!\n");
-			return -RT_ERROR;
-		}
+            rt_thread_sleep(1);
+        }
+    }
+    else
+    {
+        /* Interact mode */
+        if ((calTimer = rt_timer_create(
+            "cal_tmr",
+            efm_accel_timer,
+            RT_NULL,
+            period,
+            RT_TIMER_FLAG_ONE_SHOT)) == RT_NULL)
+        {
+            accel_debug("Accel err: Create timer failed!\n");
+            return -RT_ERROR;
+        }
 
-		accelInTime = true;
-		rt_timer_start(calTimer);
-		do
-		{
-			sum.x = 0x0;
-			sum.y = 0x0;
-			sum.z = 0x0;
+        accelInTime = true;
+        rt_timer_start(calTimer);
+        do
+        {
+            sum.x = 0x0;
+            sum.y = 0x0;
+            sum.z = 0x0;
 
-			for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
-			{
+            for (i = 0; i < ACCEL_CAL_SAMPLES; i++)
+            {
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-				/* Waiting for data ready */
-				while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
+                /* Waiting for data ready */
+                while(!GPIO_PinInGet(ACCEL_INT1_PORT, ACCEL_INT1_PIN));
 #endif
-				if (efm_accel_get_data(&temp, false) != RT_EOK)
-				{
-					return -RT_ERROR;
-				}
-				sum.x += temp.x;
-				sum.y += temp.y;
-				sum.z += temp.z;
-			}
-			sum.x /= ACCEL_CAL_SAMPLES;
-			sum.y /= ACCEL_CAL_SAMPLES;
-			sum.z /= ACCEL_CAL_SAMPLES;
-			if (sum.x < min.x)
-			{
-				min.x = sum.x;
-			}
-			if (sum.y < min.y)
-			{
-				min.y = sum.y;
-			}
-			if (sum.z < min.z)
-			{
-				min.z = sum.z;
-			}
-			if (sum.x > max.x)
-			{
-				max.x = sum.x;
-			}
-			if (sum.y > max.y)
-			{
-				max.y = sum.y;
-			}
-			if (sum.z > max.z)
-			{
-				max.z = sum.z;
-			}
-			rt_thread_sleep(1);
-		} while (accelInTime);
+                if (efm_accel_get_data(&temp, false) != RT_EOK)
+                {
+                    return -RT_ERROR;
+                }
+                sum.x += temp.x;
+                sum.y += temp.y;
+                sum.z += temp.z;
+            }
+            sum.x /= ACCEL_CAL_SAMPLES;
+            sum.y /= ACCEL_CAL_SAMPLES;
+            sum.z /= ACCEL_CAL_SAMPLES;
+            if (sum.x < min.x)
+            {
+                min.x = sum.x;
+            }
+            if (sum.y < min.y)
+            {
+                min.y = sum.y;
+            }
+            if (sum.z < min.z)
+            {
+                min.z = sum.z;
+            }
+            if (sum.x > max.x)
+            {
+                max.x = sum.x;
+            }
+            if (sum.y > max.y)
+            {
+                max.y = sum.y;
+            }
+            if (sum.z > max.z)
+            {
+                max.z = sum.z;
+            }
+            rt_thread_sleep(1);
+        } while (accelInTime);
 
-		accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n",
-			min.x, min.y, min.z, max.x, max.y, max.z);
+        accel_debug("Accel: Min %+d %+d %+d, max %+d %+d %+d\n",
+            min.x, min.y, min.z, max.x, max.y, max.z);
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		accelOffset.x = -((min.x + max.x) >> 1);
-		accelOffset.y = -((min.y + max.y) >> 1);
-		accelOffset.z = -((min.z + max.z) >> 1);
+        accelOffset.x = -((min.x + max.x) >> 1);
+        accelOffset.y = -((min.y + max.y) >> 1);
+        accelOffset.z = -((min.z + max.z) >> 1);
 
-	accel_debug("Accel: Offset %+d %+d %+d\n",
-		accelOffset.x, accelOffset.y, accelOffset.z);
+    accel_debug("Accel: Offset %+d %+d %+d\n",
+        accelOffset.x, accelOffset.y, accelOffset.z);
 
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		/* Set offset drift registers */
-		*(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x);
-		*(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y);
-		*(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z);
-		if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
-		{
-			return -RT_ERROR;
-		}
+        /* Set offset drift registers */
+        *(rt_int16_t *)&cmd[1] = (rt_int16_t)-(min.x + max.x);
+        *(rt_int16_t *)&cmd[3] = (rt_int16_t)-(min.y + max.y);
+        *(rt_int16_t *)&cmd[5] = (rt_int16_t)-(min.z + max.z);
+        if (accel->write(accel, ACCEL_IIC_SLAVE_ADDRESS, cmd, sizeof(cmd)) == 0)
+        {
+            return -RT_ERROR;
+        }
 
-	accel_debug("Accel: Offset %+d %+d %+d\n",
-		*(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
+    accel_debug("Accel: Offset %+d %+d %+d\n",
+        *(rt_int16_t *)&cmd[1], *(rt_int16_t *)&cmd[3], *(rt_int16_t *)&cmd[5]);
 #endif
 
-		rt_timer_delete(calTimer);
-	}
+        rt_timer_delete(calTimer);
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -744,147 +744,147 @@ rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period)
  * @note
  *
  * @return
- *	 Error code
+ *   Error code
  ******************************************************************************/
 rt_err_t efm_accel_init(void)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	ret = RT_EOK;
-	do
-	{
-		/* Find ADC device */
-		accel = rt_device_find(ACCEL_USING_DEVICE_NAME);
-		if (accel == RT_NULL)
-		{
-			accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME);
-			ret = -RT_ERROR;
-			break;
-		}
-		accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME);
+    ret = RT_EOK;
+    do
+    {
+        /* Find ADC device */
+        accel = rt_device_find(ACCEL_USING_DEVICE_NAME);
+        if (accel == RT_NULL)
+        {
+            accel_debug("Accel err: Can't find device: %s!\n", ACCEL_USING_DEVICE_NAME);
+            ret = -RT_ERROR;
+            break;
+        }
+        accel_debug("Accel: Find device %s\n", ACCEL_USING_DEVICE_NAME);
 
-		/* --------- ADC interface --------- */
+        /* --------- ADC interface --------- */
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-		ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT;
+        ADC_InitScan_TypeDef scanInit = ADC_INITSCAN_DEFAULT;
 
  #if defined(EFM32_GXXX_DK)
-		/* Enable accelerometer */
-		DVK_enablePeripheral(DVK_ACCEL);
-			/* Select g-range */
+        /* Enable accelerometer */
+        DVK_enablePeripheral(DVK_ACCEL);
+            /* Select g-range */
   #if (ACCEL_G_SELECT == 0)
-		DVK_disablePeripheral(DVK_ACCEL_GSEL);
+        DVK_disablePeripheral(DVK_ACCEL_GSEL);
   #elif (ACCEL_G_SELECT == 1)
-		DVK_enablePeripheral(DVK_ACCEL_GSEL);
+        DVK_enablePeripheral(DVK_ACCEL_GSEL);
   #else
   #error "Wrong value for ACCEL_G_SELECT"
   #endif
  #endif
-		/* Init ADC for scan mode */
-		scanInit.reference = adcRefVDD;
-		scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH;
+        /* Init ADC for scan mode */
+        scanInit.reference = adcRefVDD;
+        scanInit.input = ACCEL_X_ADC_CH | ACCEL_Y_ADC_CH | ACCEL_Z_ADC_CH;
 
-		control.scan.init = &scanInit;
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \
-			(void *)&control)) != RT_EOK)
-		{
-			break;
-		}
+        control.scan.init = &scanInit;
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_ADC_MODE, \
+            (void *)&control)) != RT_EOK)
+        {
+            break;
+        }
 
-		/* --------- IIC interface --------- */
+        /* --------- IIC interface --------- */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-		rt_uint8_t cmd[2];
+        rt_uint8_t cmd[2];
 
-		/* Initialize */
-		if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \
-			(void *)&control)) != RT_EOK)
-		{
-			break;
-		}
+        /* Initialize */
+        if ((ret = accel->control(accel, RT_DEVICE_CTRL_IIC_SETTING, \
+            (void *)&control)) != RT_EOK)
+        {
+            break;
+        }
 
-		if (efm_accel_config(
-			ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA) != RT_EOK)
-		{
-			break;
-		}
+        if (efm_accel_config(
+            ACCEL_MODE_MEASUREMENT | ACCEL_RANGE_2G,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA) != RT_EOK)
+        {
+            break;
+        }
 
-		/* Config interrupt pin1 */
-		GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0);
-		/* Config interrupt pin2 */
-		GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0);
+        /* Config interrupt pin1 */
+        GPIO_PinModeSet(ACCEL_INT1_PORT, ACCEL_INT1_PIN, gpioModeInput, 0);
+        /* Config interrupt pin2 */
+        GPIO_PinModeSet(ACCEL_INT2_PORT, ACCEL_INT2_PIN, gpioModeInput, 0);
 #endif
 
-		accel_debug("Accel: Init OK\n");
-		return RT_EOK;
-	} while (0);
+        accel_debug("Accel: Init OK\n");
+        return RT_EOK;
+    } while (0);
 
-	accel_debug("Accel err: Init failed!\n");
-	return -RT_ERROR;
+    accel_debug("Accel err: Init failed!\n");
+    return -RT_ERROR;
 }
 
 /*******************************************************************************
- * 	Export to FINSH
+ *  Export to FINSH
  ******************************************************************************/
 #ifdef RT_USING_FINSH
 #include <finsh.h>
 
 void accel_cal(rt_uint8_t mode, rt_uint32_t second)
 {
-	if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK)
-	{
-		rt_kprintf("Error occurred.");
-		return;
-	}
+    if (efm_accel_auto_zero(mode, RT_TICK_PER_SECOND * second) != RT_EOK)
+    {
+        rt_kprintf("Error occurred.");
+        return;
+    }
 
-	rt_kprintf("Calibration done.\n");
+    rt_kprintf("Calibration done.\n");
 }
 FINSH_FUNCTION_EXPORT(accel_cal, auto-zero calibration.)
 
 void list_accel(void)
 {
-	struct efm32_accel_result_t data;
+    struct efm32_accel_result_t data;
 
-	efm_accel_get_data(&data, false);
-	rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z);
+    efm_accel_get_data(&data, false);
+    rt_kprintf("X: %d, Y: %d, Z: %d\n", data.x, data.y, data.z);
 }
 FINSH_FUNCTION_EXPORT(list_accel, list accelerometer info.)
 
 void test_accel(rt_uint8_t mode)
 {
-	if (mode == 0)
-	{
-		if (efm_accel_config(
-			ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \
-			ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y,
-			0x1f,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA,
-			EFM32_NO_DATA) != RT_EOK)
-		{
-			rt_kprintf("efm_accel_config(): error\n");
-			return;
-		}
-	}
-	else
-	{
-		if (efm_accel_config(
-			ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \
-			ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y,
-			0x1f,
-			0x1f,
-			200,
-			255,
-			255) != RT_EOK)
-		{
-			rt_kprintf("efm_accel_config(): error\n");
-			return;
-		}
-	}
+    if (mode == 0)
+    {
+        if (efm_accel_config(
+            ACCEL_MODE_LEVEL | ACCEL_RANGE_8G | ACCEL_INT_LEVEL_PULSE | \
+            ACCEL_SOURCE_LEVEL_X | ACCEL_SOURCE_LEVEL_Y,
+            0x1f,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA,
+            EFM32_NO_DATA) != RT_EOK)
+        {
+            rt_kprintf("efm_accel_config(): error\n");
+            return;
+        }
+    }
+    else
+    {
+        if (efm_accel_config(
+            ACCEL_MODE_PULSE | ACCEL_RANGE_8G | ACCEL_INT_SINGLE_DOUBLE | \
+            ACCEL_SOURCE_PULSE_X | ACCEL_SOURCE_PULSE_Y,
+            0x1f,
+            0x1f,
+            200,
+            255,
+            255) != RT_EOK)
+        {
+            rt_kprintf("efm_accel_config(): error\n");
+            return;
+        }
+    }
 }
 FINSH_FUNCTION_EXPORT(test_accel, list accelerometer info.)
 #endif
diff --git a/bsp/efm32/dev_accel.h b/bsp/efm32/dev_accel.h
index 2e12d797d3..cc75631834 100644
--- a/bsp/efm32/dev_accel.h
+++ b/bsp/efm32/dev_accel.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_accel.h
- * @brief 	Accelerometer driver of RT-Thread RTOS for EFM32
+ * @file    dev_accel.h
+ * @brief   Accelerometer driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,10 +10,10 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-13	onelife		Initial creation for using EFM32 ADC module to
+ * Date         Author      Notes
+ * 2011-07-13   onelife     Initial creation for using EFM32 ADC module to
  *  interface the Freescale MMA7361L
- * 2011-08-02	onelife		Add digital interface support of using EFM32 IIC
+ * 2011-08-02   onelife     Add digital interface support of using EFM32 IIC
  *  module for the Freescale MMA7455L
  ******************************************************************************/
 #ifndef __DEV_ACCEL_H__
@@ -27,95 +27,95 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_accel_result_t
 {
-	rt_int32_t 				x;
-	rt_int32_t 				y;
-	rt_int32_t 				z;
+    rt_int32_t              x;
+    rt_int32_t              y;
+    rt_int32_t              z;
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-/* 	MMA7361LC
- 	g-Select 	g-Range 	Sensitivity
- 	0 			1.5 g 		800 mV/g
- 	1 			6 g 		206 mV/g
+/*  MMA7361LC
+    g-Select    g-Range     Sensitivity
+    0           1.5 g       800 mV/g
+    1           6 g         206 mV/g
 
- 	MMA7455L
- 	g-Select 	g-Range 	Sensitivity
- 	0 			2 g 		64 LSB/g
- 	1 			4 g 		32 LSB/g
-	2			8 g 		16 LSB/g
+    MMA7455L
+    g-Select    g-Range     Sensitivity
+    0           2 g         64 LSB/g
+    1           4 g         32 LSB/g
+    2           8 g         16 LSB/g
 */
-#define ACCEL_G_SELECT 			(0)
+#define ACCEL_G_SELECT          (0)
 
-#define ACCEL_CAL_SAMPLES 		(4) 	/* Must be multiple of 2 */
-#define ACCEL_CAL_ROUND 		(50)
-#define ACCEL_CAL_SIMPLE 		(0)
-#define ACCEL_CAL_INTERACT 		(1)
+#define ACCEL_CAL_SAMPLES       (4)     /* Must be multiple of 2 */
+#define ACCEL_CAL_ROUND         (50)
+#define ACCEL_CAL_SIMPLE        (0)
+#define ACCEL_CAL_INTERACT      (1)
 
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
 /* Reading_at_1g = Sensitivity * Max_reading / Refference_voltage */
-#define ACCEL_CAL_1G_VALUE 		{993, 256}
+#define ACCEL_CAL_1G_VALUE      {993, 256}
 
-#define ACCEL_X_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH2
-#define ACCEL_Y_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH3
-#define ACCEL_Z_ADC_CH 			ADC_SCANCTRL_INPUTMASK_CH4
+#define ACCEL_X_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH2
+#define ACCEL_Y_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH3
+#define ACCEL_Z_ADC_CH          ADC_SCANCTRL_INPUTMASK_CH4
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-#define ACCEL_CAL_1G_VALUE 		{0x3f, 0x1f, 0x0f}
+#define ACCEL_CAL_1G_VALUE      {0x3f, 0x1f, 0x0f}
 #define ACCEL_IIC_SLAVE_ADDRESS (0x1d)
 
-#define ACCEL_INT1_PORT			(gpioPortD)
-#define ACCEL_INT1_PIN			(13)
-#define ACCEL_INT2_PORT 		(gpioPortD)
-#define ACCEL_INT2_PIN 			(12)
+#define ACCEL_INT1_PORT         (gpioPortD)
+#define ACCEL_INT1_PIN          (13)
+#define ACCEL_INT2_PORT         (gpioPortD)
+#define ACCEL_INT2_PIN          (12)
 
-#define ACCEL_MODE_STANDBY 		(1 << 0)
-#define ACCEL_MODE_MEASUREMENT	(1 << 1)
-#define ACCEL_MODE_LEVEL		(1 << 2)
-#define ACCEL_MODE_PULSE 		(1 << 3)
-#define ACCEL_RANGE_8G 			(1 << 4)
-#define ACCEL_RANGE_4G 			(1 << 5)
-#define ACCEL_RANGE_2G 			(1 << 6)
-#define ACCEL_INTPIN_INVERSE 	(1 << 7)
-#define ACCEL_INT_LEVEL_PULSE 	(1 << 8)
-#define ACCEL_INT_PULSE_LEVEL 	(1 << 9)
-#define ACCEL_INT_SINGLE_DOUBLE	(1 << 10)
-#define ACCEL_DISABLE_X 		(1 << 11)
-#define ACCEL_DISABLE_Y 		(1 << 12)
-#define ACCEL_DISABLE_Z 		(1 << 13)
-#define ACCEL_THRESHOLD_INTEGER	(1 << 14) 	/* For level detection only */
-#define ACCEL_BANDWIDTH_125HZ	(1 << 15)
-#define ACCEL_LEVEL_AND			(1 << 16)
-#define ACCEL_PULSE_AND			(1 << 17)
-#define ACCEL_DRIVE_STRONG		(1 << 18)
-#define ACCEL_SOURCE_LEVEL_X 	(1 << 19)
-#define ACCEL_SOURCE_LEVEL_Y 	(1 << 20)
-#define ACCEL_SOURCE_LEVEL_Z 	(1 << 21)
-#define ACCEL_SOURCE_PULSE_X 	(1 << 22)
-#define ACCEL_SOURCE_PULSE_Y 	(1 << 23)
-#define ACCEL_SOURCE_PULSE_Z 	(1 << 24)
+#define ACCEL_MODE_STANDBY      (1 << 0)
+#define ACCEL_MODE_MEASUREMENT  (1 << 1)
+#define ACCEL_MODE_LEVEL        (1 << 2)
+#define ACCEL_MODE_PULSE        (1 << 3)
+#define ACCEL_RANGE_8G          (1 << 4)
+#define ACCEL_RANGE_4G          (1 << 5)
+#define ACCEL_RANGE_2G          (1 << 6)
+#define ACCEL_INTPIN_INVERSE    (1 << 7)
+#define ACCEL_INT_LEVEL_PULSE   (1 << 8)
+#define ACCEL_INT_PULSE_LEVEL   (1 << 9)
+#define ACCEL_INT_SINGLE_DOUBLE (1 << 10)
+#define ACCEL_DISABLE_X         (1 << 11)
+#define ACCEL_DISABLE_Y         (1 << 12)
+#define ACCEL_DISABLE_Z         (1 << 13)
+#define ACCEL_THRESHOLD_INTEGER (1 << 14)   /* For level detection only */
+#define ACCEL_BANDWIDTH_125HZ   (1 << 15)
+#define ACCEL_LEVEL_AND         (1 << 16)
+#define ACCEL_PULSE_AND         (1 << 17)
+#define ACCEL_DRIVE_STRONG      (1 << 18)
+#define ACCEL_SOURCE_LEVEL_X    (1 << 19)
+#define ACCEL_SOURCE_LEVEL_Y    (1 << 20)
+#define ACCEL_SOURCE_LEVEL_Z    (1 << 21)
+#define ACCEL_SOURCE_PULSE_X    (1 << 22)
+#define ACCEL_SOURCE_PULSE_Y    (1 << 23)
+#define ACCEL_SOURCE_PULSE_Z    (1 << 24)
 
-#define ACCEL_SHIFT_MODE 		(0)
-#define ACCEL_SHIFT_RANGE 		(4)
-#define ACCEL_SHIFT_INT 		(8)
-#define ACCEL_SHIFT_DISABLE		(11)
-#define ACCEL_SHIFT_SOURCE		(19)
+#define ACCEL_SHIFT_MODE        (0)
+#define ACCEL_SHIFT_RANGE       (4)
+#define ACCEL_SHIFT_INT         (8)
+#define ACCEL_SHIFT_DISABLE     (11)
+#define ACCEL_SHIFT_SOURCE      (19)
 
-#define ACCEL_MASK_MODE 		(0X0000000f << ACCEL_SHIFT_MODE)
-#define ACCEL_MASK_RANGE 		(0X00000007 << ACCEL_SHIFT_RANGE)
-#define ACCEL_MASK_INT 			(0X00000007 << ACCEL_SHIFT_INT)
-#define ACCEL_MASK_DISABLE 		(0X00000007 << ACCEL_SHIFT_DISABLE)
-#define ACCEL_MASK_SOURCE 		(0X0000003f << ACCEL_SHIFT_SOURCE)
+#define ACCEL_MASK_MODE         (0X0000000f << ACCEL_SHIFT_MODE)
+#define ACCEL_MASK_RANGE        (0X00000007 << ACCEL_SHIFT_RANGE)
+#define ACCEL_MASK_INT          (0X00000007 << ACCEL_SHIFT_INT)
+#define ACCEL_MASK_DISABLE      (0X00000007 << ACCEL_SHIFT_DISABLE)
+#define ACCEL_MASK_SOURCE       (0X0000003f << ACCEL_SHIFT_SOURCE)
 #endif
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_accel_get_data(struct efm32_accel_result_t *data,
-	rt_bool_t lowResolution);
+    rt_bool_t lowResolution);
 rt_err_t efm_accel_config(rt_uint32_t config,
-	rt_uint8_t level_threshold,
-	rt_uint8_t pulse_threshold,
-	rt_uint8_t pulse_duration,
-	rt_uint8_t pulse_latency,
-	rt_uint8_t pulse_duration2);
+    rt_uint8_t level_threshold,
+    rt_uint8_t pulse_threshold,
+    rt_uint8_t pulse_duration,
+    rt_uint8_t pulse_latency,
+    rt_uint8_t pulse_duration2);
 rt_err_t efm_accel_auto_zero(rt_uint8_t mode, rt_tick_t period);
 rt_err_t efm_accel_init(void);
 
diff --git a/bsp/efm32/dev_keys.c b/bsp/efm32/dev_keys.c
index a7a58ff20f..15d306b36b 100644
--- a/bsp/efm32/dev_keys.c
+++ b/bsp/efm32/dev_keys.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_keys.c
- * @brief 	Keys driver of RT-Thread RTOS for EFM32
+ * @file    dev_keys.c
+ * @brief   Keys driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-29   onelife     Initial creation for EFM32GG_DK3750 board
  ******************************************************************************/
 
@@ -48,14 +48,14 @@ static rt_bool_t                            click;
 /* Private functions ---------------------------------------------------------*/
 /***************************************************************************//**
  * @brief
- *	Keys interrupt handler
+ *  Keys interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 static void efm32_keys_isr(rt_device_t dev)
 {
@@ -158,18 +158,18 @@ static void efm32_keys_isr(rt_device_t dev)
 
 /***************************************************************************//**
  * @brief
- *	Keys timeout handler
+ *  Keys timeout handler
  *
  * @details
  *
  * @note
  *
  * @param[in] param
- *	Parameter
+ *  Parameter
  ******************************************************************************/
 static void efm32_keys_timer_isr(void *param)
 {
-	rt_uint16_t joystick;
+    rt_uint16_t joystick;
 
     joystick = DVK_getJoystick();
 
@@ -277,11 +277,11 @@ void efm32_hw_keys_init(void)
     GPIO_IntConfig(KEYS_INT_PORT, KEYS_INT_PIN, true, true, true);
 
     efm32_irq_hook_init_t hook;
-	hook.type       = efm32_irq_type_gpio;
-	hook.unit       = KEYS_INT_PIN;
-	hook.cbFunc     = efm32_keys_isr;
-	hook.userPtr    = RT_NULL;
-	efm32_irq_hook_register(&hook);
+    hook.type       = efm32_irq_type_gpio;
+    hook.unit       = KEYS_INT_PIN;
+    hook.cbFunc     = efm32_keys_isr;
+    hook.userPtr    = RT_NULL;
+    efm32_irq_hook_register(&hook);
 
     if ((rt_uint8_t)KEYS_INT_PIN % 2)
     {
@@ -299,12 +299,12 @@ void efm32_hw_keys_init(void)
     /* Enable DVK joystick interrupt */
     DVK_enableInterrupt(BC_INTEN_JOYSTICK);
 
-	rt_timer_init(&joy.timer,
-		"joy_tmr",
-		efm32_keys_timer_isr,
-		RT_NULL,
-		KEYS_POLL_TIME,
-		RT_TIMER_FLAG_PERIODIC);
+    rt_timer_init(&joy.timer,
+        "joy_tmr",
+        efm32_keys_timer_isr,
+        RT_NULL,
+        KEYS_POLL_TIME,
+        RT_TIMER_FLAG_PERIODIC);
 
     joy_dev.init        = efm32_keys_init;
     joy_dev.open        = RT_NULL;
diff --git a/bsp/efm32/dev_keys.h b/bsp/efm32/dev_keys.h
index 6e66617331..87f8fe95fd 100644
--- a/bsp/efm32/dev_keys.h
+++ b/bsp/efm32/dev_keys.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_keys.h
- * @brief 	Keys driver of RT-Thread RTOS for EFM32
+ * @file    dev_keys.h
+ * @brief   Keys driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-29   onelife     Initial creation for EFM32GG_DK3750 board
  ******************************************************************************/
 #ifndef __DEV_KEYS_H__
diff --git a/bsp/efm32/dev_lcd.c b/bsp/efm32/dev_lcd.c
index 0a2d469d78..c4cbbcce21 100644
--- a/bsp/efm32/dev_lcd.c
+++ b/bsp/efm32/dev_lcd.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_lcd.c
- * @brief 	LCD driver of RT-Thread RTOS for EFM32
+ * @file    dev_lcd.c
+ * @brief   LCD driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-16   onelife     Initial creation of address mapped method (pixel
  *  drive) for EFM32GG_DK3750 board
  * 2011-12-29   onelife     Add direct drive method (frame buffer) support
@@ -451,48 +451,48 @@ rt_err_t efm32_spiLcd_writeRegister(rt_uint8_t reg, rt_uint16_t data)
 
 /***************************************************************************//**
  * @brief
- *	Register LCD device
+ *  Register LCD device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] iic
- *	Pointer to IIC device descriptor
+ *  Pointer to IIC device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t efm32_spiLcd_register(
-	rt_device_t		                device,
-	const char		                *name,
-	rt_uint32_t		                flag,
-	void                            *data)
+    rt_device_t                     device,
+    const char                      *name,
+    rt_uint32_t                     flag,
+    void                            *data)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Graphic;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= RT_NULL;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= efm32_spiLcd_control;
-	device->user_data	= data;
+    device->type        = RT_Device_Class_Graphic;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = RT_NULL;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = efm32_spiLcd_control;
+    device->user_data   = data;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /***************************************************************************//**
@@ -511,18 +511,18 @@ void efm32_spiLcd_init(void)
     DMD_DisplayGeometry         *geometry;
     rt_uint32_t                 ret;
 
-	do
-	{
+    do
+    {
         USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
 
-		/* Find SPI device */
-		lcd = rt_device_find(LCD_USING_DEVICE_NAME);
-		if (lcd == RT_NULL)
-		{
-			lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME);
-			break;
-		}
-		lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME);
+        /* Find SPI device */
+        lcd = rt_device_find(LCD_USING_DEVICE_NAME);
+        if (lcd == RT_NULL)
+        {
+            lcd_debug("LCD err: Can't find %s!\n", LCD_USING_DEVICE_NAME);
+            break;
+        }
+        lcd_debug("LCD: Find device %s\n", LCD_USING_DEVICE_NAME);
 
         /* Config CS pin */
         usart = (struct efm32_usart_device_t *)(lcd->user_data);
@@ -647,7 +647,7 @@ void efm32_spiLcd_init(void)
         }
 
         /* Init LCD info */
-		flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX;
+        flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_TX;
         lcd_info.pixel_format       = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
         lcd_info.bits_per_pixel     = 16;
         lcd_info.width              = geometry->xSize;
diff --git a/bsp/efm32/dev_lcd.h b/bsp/efm32/dev_lcd.h
index 075bed64ba..4c59286ef6 100644
--- a/bsp/efm32/dev_lcd.h
+++ b/bsp/efm32/dev_lcd.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	dev_lcd.h
- * @brief 	LCD driver of RT-Thread RTOS for EFM32
+ * @file    dev_lcd.h
+ * @brief   LCD driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-16   onelife     Initial creation of address mapped method (pixel
  *  drive) for EFM32GG_DK3750 board
  ******************************************************************************/
diff --git a/bsp/efm32/dev_sflash.h b/bsp/efm32/dev_sflash.h
index ae72ec678a..b7d2860f0d 100644
--- a/bsp/efm32/dev_sflash.h
+++ b/bsp/efm32/dev_sflash.h
@@ -20,85 +20,85 @@
 /* Exported types ------------------------------------------------------------*/
 enum sflash_inst_type_t
 {
-	/* Instruction only */
-	sflash_inst_wren = 0x00,
-	sflash_inst_wrdi,
-	sflash_inst_rdid_l,
-	sflash_inst_rdid_s,
-	sflash_inst_rdsr,
-	sflash_inst_wrsr,
-	sflash_inst_be,
-	sflash_inst_dp,
-	sflash_inst_rdp,
-	/* Instruction and address */
-	sflash_inst_wrlr,
-	sflash_inst_rdlr,
-	sflash_inst_read,
-	sflash_inst_potp,
-	sflash_inst_pp,
-	sflash_inst_difp,
-	sflash_inst_sse,
-	sflash_inst_se,
-	/* Instruction, address and dummy read */
-	sflash_inst_read_f,
-	sflash_inst_dofr,
-	sflash_inst_rotp
+    /* Instruction only */
+    sflash_inst_wren = 0x00,
+    sflash_inst_wrdi,
+    sflash_inst_rdid_l,
+    sflash_inst_rdid_s,
+    sflash_inst_rdsr,
+    sflash_inst_wrsr,
+    sflash_inst_be,
+    sflash_inst_dp,
+    sflash_inst_rdp,
+    /* Instruction and address */
+    sflash_inst_wrlr,
+    sflash_inst_rdlr,
+    sflash_inst_read,
+    sflash_inst_potp,
+    sflash_inst_pp,
+    sflash_inst_difp,
+    sflash_inst_sse,
+    sflash_inst_se,
+    /* Instruction, address and dummy read */
+    sflash_inst_read_f,
+    sflash_inst_dofr,
+    sflash_inst_rotp
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define SFLASH_SPI_COMMAND_SKIP 	(1)
-#define SFLASH_SPI_READ_SKIP 		(2)
+#define SFLASH_SPI_COMMAND_SKIP     (1)
+#define SFLASH_SPI_READ_SKIP        (2)
 
-#define SFLASH_INST_CODE_WREN 		(0x06)
-#define SFLASH_INST_CODE_WRDI 		(0x04)
-#define SFLASH_INST_CODE_RDID_L 	(0x9F)
-#define SFLASH_INST_CODE_RDID_S 	(0x9E)
-#define SFLASH_INST_CODE_RDSR 		(0x05)
-#define SFLASH_INST_CODE_WRSR 		(0x01)
-#define SFLASH_INST_CODE_WRLR 		(0xE5)
-#define SFLASH_INST_CODE_RDLR 		(0xE8)
-#define SFLASH_INST_CODE_READ 		(0x03)
-#define SFLASH_INST_CODE_READ_F 	(0x0B)
-#define SFLASH_INST_CODE_DOFR 		(0x3B)
-#define SFLASH_INST_CODE_ROTP 		(0x4B)
-#define SFLASH_INST_CODE_POTP 		(0x42)
-#define SFLASH_INST_CODE_PP 		(0x02)
-#define SFLASH_INST_CODE_DIFP 		(0xA2)
-#define SFLASH_INST_CODE_SSE 		(0x20)
-#define SFLASH_INST_CODE_SE 		(0xD8)
-#define SFLASH_INST_CODE_BE 		(0xC7)
-#define SFLASH_INST_CODE_DP 		(0xB9)
-#define SFLASH_INST_CODE_RDP 		(0xAB)
+#define SFLASH_INST_CODE_WREN       (0x06)
+#define SFLASH_INST_CODE_WRDI       (0x04)
+#define SFLASH_INST_CODE_RDID_L     (0x9F)
+#define SFLASH_INST_CODE_RDID_S     (0x9E)
+#define SFLASH_INST_CODE_RDSR       (0x05)
+#define SFLASH_INST_CODE_WRSR       (0x01)
+#define SFLASH_INST_CODE_WRLR       (0xE5)
+#define SFLASH_INST_CODE_RDLR       (0xE8)
+#define SFLASH_INST_CODE_READ       (0x03)
+#define SFLASH_INST_CODE_READ_F     (0x0B)
+#define SFLASH_INST_CODE_DOFR       (0x3B)
+#define SFLASH_INST_CODE_ROTP       (0x4B)
+#define SFLASH_INST_CODE_POTP       (0x42)
+#define SFLASH_INST_CODE_PP         (0x02)
+#define SFLASH_INST_CODE_DIFP       (0xA2)
+#define SFLASH_INST_CODE_SSE        (0x20)
+#define SFLASH_INST_CODE_SE         (0xD8)
+#define SFLASH_INST_CODE_BE         (0xC7)
+#define SFLASH_INST_CODE_DP         (0xB9)
+#define SFLASH_INST_CODE_RDP        (0xAB)
 
-#define SFLASH_REPLY_LEN_WREN 		(0)
-#define SFLASH_REPLY_LEN_WRDI 		(0)
-#define SFLASH_REPLY_LEN_RDID_L 	(20)
-#define SFLASH_REPLY_LEN_RDID_S 	(3)
-#define SFLASH_REPLY_LEN_RDSR 		(1)
-#define SFLASH_REPLY_LEN_WRSR 		(1)
-#define SFLASH_REPLY_LEN_WRLR 		(1)
-#define SFLASH_REPLY_LEN_RDLR 		(1)
-#define SFLASH_REPLY_LEN_READ 		(-1)
-#define SFLASH_REPLY_LEN_READ_F 	(-1)
-#define SFLASH_REPLY_LEN_DOFR 		(-1)
-#define SFLASH_REPLY_LEN_ROTP 		(65)
-#define SFLASH_REPLY_LEN_POTP 		(65)
-#define SFLASH_REPLY_LEN_PP 		(256)
-#define SFLASH_REPLY_LEN_DIFP 		(256)
-#define SFLASH_REPLY_LEN_SSE 		(0)
-#define SFLASH_REPLY_LEN_SE 		(0)
-#define SFLASH_REPLY_LEN_BE 		(0)
-#define SFLASH_REPLY_LEN_DP 		(0)
-#define SFLASH_REPLY_LEN_RDP 		(0)
+#define SFLASH_REPLY_LEN_WREN       (0)
+#define SFLASH_REPLY_LEN_WRDI       (0)
+#define SFLASH_REPLY_LEN_RDID_L     (20)
+#define SFLASH_REPLY_LEN_RDID_S     (3)
+#define SFLASH_REPLY_LEN_RDSR       (1)
+#define SFLASH_REPLY_LEN_WRSR       (1)
+#define SFLASH_REPLY_LEN_WRLR       (1)
+#define SFLASH_REPLY_LEN_RDLR       (1)
+#define SFLASH_REPLY_LEN_READ       (-1)
+#define SFLASH_REPLY_LEN_READ_F     (-1)
+#define SFLASH_REPLY_LEN_DOFR       (-1)
+#define SFLASH_REPLY_LEN_ROTP       (65)
+#define SFLASH_REPLY_LEN_POTP       (65)
+#define SFLASH_REPLY_LEN_PP         (256)
+#define SFLASH_REPLY_LEN_DIFP       (256)
+#define SFLASH_REPLY_LEN_SSE        (0)
+#define SFLASH_REPLY_LEN_SE         (0)
+#define SFLASH_REPLY_LEN_BE         (0)
+#define SFLASH_REPLY_LEN_DP         (0)
+#define SFLASH_REPLY_LEN_RDP        (0)
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_spiFlash_init(void);
 rt_err_t efm_spiFlash_deinit(void);
 rt_uint32_t efm_spiFlash_cmd(
-	enum sflash_inst_type_t command,
-	rt_uint32_t address,
-	rt_uint8_t *buffer,
-	rt_uint32_t size);
+    enum sflash_inst_type_t command,
+    rt_uint32_t address,
+    rt_uint8_t *buffer,
+    rt_uint32_t size);
 
 #endif /* __DEV_SFLASH_H__ */
diff --git a/bsp/efm32/drv_acmp.c b/bsp/efm32/drv_acmp.c
index 1961fc4695..b9d24e8ebd 100644
--- a/bsp/efm32/drv_acmp.c
+++ b/bsp/efm32/drv_acmp.c
@@ -30,18 +30,18 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_ACMP_DEBUG
-#define acmp_debug(format,args...) 			rt_kprintf(format, ##args)
+#define acmp_debug(format,args...)          rt_kprintf(format, ##args)
 #else
 #define acmp_debug(format,args...)
 #endif
 
 /* Private variables ---------------------------------------------------------*/
 #ifdef RT_USING_ACMP0
-	static struct rt_device acmp0_device;
+    static struct rt_device acmp0_device;
 #endif
 
 #ifdef RT_USING_ACMP1
-	static struct rt_device acmp1_device;
+    static struct rt_device acmp1_device;
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -64,169 +64,169 @@ ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq);
  ******************************************************************************/
  static rt_err_t rt_acmp_init(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	acmp->hook.cbFunc 	= RT_NULL;
-	acmp->hook.userPtr 	= RT_NULL;
+    acmp->hook.cbFunc   = RT_NULL;
+    acmp->hook.userPtr  = RT_NULL;
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Configure ACMP device
+ *  Configure ACMP device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] cmd
- *	ACMP control command
+ *  ACMP control command
  *
  * @param[in] args
- *	Arguments
+ *  Arguments
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 static rt_err_t rt_acmp_control(
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		ACMP_Disable(acmp->acmp_device);
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        ACMP_Disable(acmp->acmp_device);
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* Resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		ACMP_Enable(acmp->acmp_device);
-		break;
+    case RT_DEVICE_CTRL_RESUME:
+        /* Resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        ACMP_Enable(acmp->acmp_device);
+        break;
 
-	case RT_DEVICE_CTRL_ACMP_INIT:
-		{
-			rt_bool_t int_en = false;
-			struct efm32_acmp_control_t *control;
+    case RT_DEVICE_CTRL_ACMP_INIT:
+        {
+            rt_bool_t int_en = false;
+            struct efm32_acmp_control_t *control;
 
-			control = (struct efm32_acmp_control_t *)args;
-			acmp_debug("ACMP: control -> init start\n");
+            control = (struct efm32_acmp_control_t *)args;
+            acmp_debug("ACMP: control -> init start\n");
 
-			/* Configure ACMPn */
-			if (control->init == RT_NULL)
-			{
-				return -RT_ERROR;
-			}
-			ACMP_Init(acmp->acmp_device, control->init);
-			ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput);
-			if (control->output != RT_NULL)
-			{
-				ACMP_GPIOSetup(
-					acmp->acmp_device,
-					control->output->location,
-					control->output->enable,
-					control->output->invert);
-				int_en = true;
-			}
-			if (control->hook.cbFunc != RT_NULL)
-			{
-				acmp->hook.cbFunc = control->hook.cbFunc;
-				acmp->hook.userPtr = control->hook.userPtr;
-				int_en = true;
-			}
+            /* Configure ACMPn */
+            if (control->init == RT_NULL)
+            {
+                return -RT_ERROR;
+            }
+            ACMP_Init(acmp->acmp_device, control->init);
+            ACMP_ChannelSet(acmp->acmp_device, control->negInput, control->posInput);
+            if (control->output != RT_NULL)
+            {
+                ACMP_GPIOSetup(
+                    acmp->acmp_device,
+                    control->output->location,
+                    control->output->enable,
+                    control->output->invert);
+                int_en = true;
+            }
+            if (control->hook.cbFunc != RT_NULL)
+            {
+                acmp->hook.cbFunc = control->hook.cbFunc;
+                acmp->hook.userPtr = control->hook.userPtr;
+                int_en = true;
+            }
 
-			if (int_en)
-			{
-				/* Enable edge interrupt */
-				ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE);
-				ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE);
+            if (int_en)
+            {
+                /* Enable edge interrupt */
+                ACMP_IntEnable(acmp->acmp_device, ACMP_IEN_EDGE);
+                ACMP_IntClear(acmp->acmp_device, ACMP_IFC_EDGE);
 
-				/* Enable ACMP0/1 interrupt vector in NVIC */
-				NVIC_ClearPendingIRQ(ACMP0_IRQn);
-				NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT);
-				NVIC_EnableIRQ(ACMP0_IRQn);
-			}
-		}
-		break;
+                /* Enable ACMP0/1 interrupt vector in NVIC */
+                NVIC_ClearPendingIRQ(ACMP0_IRQn);
+                NVIC_SetPriority(ACMP0_IRQn, EFM32_IRQ_PRI_DEFAULT);
+                NVIC_EnableIRQ(ACMP0_IRQn);
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ACMP_OUTPUT:
-		*((rt_bool_t *)args) = \
-			(acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false;
-		break;
+    case RT_DEVICE_CTRL_ACMP_OUTPUT:
+        *((rt_bool_t *)args) = \
+            (acmp->acmp_device->STATUS & ACMP_STATUS_ACMPOUT) ? true : false;
+        break;
 
-		default:
-			return -RT_ERROR;
-	}
+        default:
+            return -RT_ERROR;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Register ACMP device
+ *  Register ACMP device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] acmp
- *	Pointer to ACMP device descriptor
+ *  Pointer to ACMP device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_acmp_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_acmp_device_t *acmp)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_acmp_device_t *acmp)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char; /* fixme: should be acmp type */
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_acmp_init;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= rt_acmp_control;
-	device->user_data	= acmp;
+    device->type        = RT_Device_Class_Char; /* fixme: should be acmp type */
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_acmp_init;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = rt_acmp_control;
+    device->user_data   = acmp;
 
-	/* register a character device */
-	return rt_device_register(device, name, flag);
+    /* register a character device */
+    return rt_device_register(device, name, flag);
 }
 
 /***************************************************************************//**
  * @brief
- *	ACMP edge trigger interrupt handler
+ *  ACMP edge trigger interrupt handler
  *
  * @details
  *
@@ -234,96 +234,96 @@ rt_err_t rt_hw_acmp_register(
  ******************************************************************************/
 void rt_hw_acmp_isr(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_acmp_device_t *acmp;
+    struct efm32_acmp_device_t *acmp;
 
-	acmp = (struct efm32_acmp_device_t *)(dev->user_data);
+    acmp = (struct efm32_acmp_device_t *)(dev->user_data);
 
-	if (acmp->hook.cbFunc != RT_NULL)
-	{
-		(acmp->hook.cbFunc)(acmp->hook.userPtr);
-	}
+    if (acmp->hook.cbFunc != RT_NULL)
+    {
+        (acmp->hook.cbFunc)(acmp->hook.userPtr);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize the specified ACMP unit
+ *  Initialize the specified ACMP unit
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] unitNumber
- *	Unit number
+ *  Unit number
  *
  * @return
- *	Pointer to ACMP device
+ *  Pointer to ACMP device
  ******************************************************************************/
 static struct efm32_acmp_device_t *rt_hw_acmp_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber)
+    rt_device_t device,
+    rt_uint8_t  unitNumber)
 {
-	struct efm32_acmp_device_t 		*acmp;
-	efm32_irq_hook_init_t			hook;
-	CMU_Clock_TypeDef				acmpClock;
+    struct efm32_acmp_device_t      *acmp;
+    efm32_irq_hook_init_t           hook;
+    CMU_Clock_TypeDef               acmpClock;
 
-	do
-	{
-		/* Allocate device */
-		acmp = rt_malloc(sizeof(struct efm32_acmp_device_t));
-		if (acmp == RT_NULL)
-		{
-			acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber);
-			break;
-		}
+    do
+    {
+        /* Allocate device */
+        acmp = rt_malloc(sizeof(struct efm32_acmp_device_t));
+        if (acmp == RT_NULL)
+        {
+            acmp_debug("ACMP err: no mem for ACMP%d\n", unitNumber);
+            break;
+        }
 
-		/* Initialization */
-		if (unitNumber >= ACMP_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			acmp->acmp_device	= ACMP0;
-			acmpClock 			= (CMU_Clock_TypeDef)cmuClock_ACMP0;
-			break;
+        /* Initialization */
+        if (unitNumber >= ACMP_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            acmp->acmp_device   = ACMP0;
+            acmpClock           = (CMU_Clock_TypeDef)cmuClock_ACMP0;
+            break;
 
-		case 1:
-			acmp->acmp_device	= ACMP1;
-			acmpClock 			= (CMU_Clock_TypeDef)cmuClock_ACMP1;
-			break;
+        case 1:
+            acmp->acmp_device   = ACMP1;
+            acmpClock           = (CMU_Clock_TypeDef)cmuClock_ACMP1;
+            break;
 
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
-		/* Enable ACMP clock */
-		CMU_ClockEnable(acmpClock, true);
+        /* Enable ACMP clock */
+        CMU_ClockEnable(acmpClock, true);
 
-		/* Reset */
-		ACMP_Reset(acmp->acmp_device);
+        /* Reset */
+        ACMP_Reset(acmp->acmp_device);
 
-		/* Config interrupt and NVIC */
-		hook.type			= efm32_irq_type_acmp;
-		hook.unit			= unitNumber;
-		hook.cbFunc 		= rt_hw_acmp_isr;
-		hook.userPtr		= device;
-		efm32_irq_hook_register(&hook);
+        /* Config interrupt and NVIC */
+        hook.type           = efm32_irq_type_acmp;
+        hook.unit           = unitNumber;
+        hook.cbFunc         = rt_hw_acmp_isr;
+        hook.userPtr        = device;
+        efm32_irq_hook_register(&hook);
 
-		return acmp;
-	} while(0);
+        return acmp;
+    } while(0);
 
-	if (acmp)
-	{
-		rt_free(acmp);
-	}
-	rt_kprintf("ACMP: Init failed!\n");
-	return RT_NULL;
+    if (acmp)
+    {
+        rt_free(acmp);
+    }
+    rt_kprintf("ACMP: Init failed!\n");
+    return RT_NULL;
 }
 
 /***************************************************************************//**
@@ -338,20 +338,20 @@ static struct efm32_acmp_device_t *rt_hw_acmp_unit_init(
  ******************************************************************************/
 void rt_hw_acmp_init(void)
 {
-	struct efm32_acmp_device_t 	*acmp;
+    struct efm32_acmp_device_t  *acmp;
 
 #ifdef RT_USING_ACMP0
-	if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL)
-	{
-		rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp);
-	}
+    if ((acmp = rt_hw_acmp_unit_init(&acmp0_device, 0)) != RT_NULL)
+    {
+        rt_hw_acmp_register(&acmp0_device, RT_ACMP0_NAME, EFM32_NO_DATA, acmp);
+    }
 #endif
 
 #ifdef RT_USING_ACMP1
-	if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL)
-	{
-		rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp);
-	}
+    if ((acmp = rt_hw_acmp_unit_init(&acmp1_device, 1)) != RT_NULL)
+    {
+        rt_hw_acmp_register(&acmp1_device, RT_ACMP1_NAME, EFM32_NO_DATA, acmp);
+    }
 #endif
 
 }
@@ -369,50 +369,50 @@ void rt_hw_acmp_init(void)
  ******************************************************************************/
 ACMP_WarmTime_TypeDef efm32_acmp_WarmTimeCalc(rt_uint32_t hfperFreq)
 {
-	if (!hfperFreq)
-	{
-		hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
+    if (!hfperFreq)
+    {
+        hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
 
-		/* Just in case, make sure we get non-zero freq for below calculation */
-		if (!hfperFreq)
-		{
-		  hfperFreq = 1;
-		}
-	}
+        /* Just in case, make sure we get non-zero freq for below calculation */
+        if (!hfperFreq)
+        {
+          hfperFreq = 1;
+        }
+    }
 
-	/* Determine number of HFPERCLK cycle >= 10us */
-	if (4 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime4;
-	}
-	else if (8 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime8;
-	}
-	else if (16 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime16;
-	}
-	else if (32 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime32;
-	}
-	else if (64 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime64;
-	}
-	else if (128 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime128;
-	}
-	else if (256 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime256;
-	}
-	else if (512 * 1000000 / hfperFreq > 10)
-	{
-		return acmpWarmTime512;
-	}
+    /* Determine number of HFPERCLK cycle >= 10us */
+    if (4 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime4;
+    }
+    else if (8 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime8;
+    }
+    else if (16 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime16;
+    }
+    else if (32 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime32;
+    }
+    else if (64 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime64;
+    }
+    else if (128 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime128;
+    }
+    else if (256 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime256;
+    }
+    else if (512 * 1000000 / hfperFreq > 10)
+    {
+        return acmpWarmTime512;
+    }
 }
 
 #endif
diff --git a/bsp/efm32/drv_acmp.h b/bsp/efm32/drv_acmp.h
index 50b4738afc..fd7f858669 100644
--- a/bsp/efm32/drv_acmp.h
+++ b/bsp/efm32/drv_acmp.h
@@ -23,24 +23,24 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_acmp_device_t
 {
-	ACMP_TypeDef 		*acmp_device;
-	efm32_irq_hook_t 	hook;
+    ACMP_TypeDef        *acmp_device;
+    efm32_irq_hook_t    hook;
 };
 
 struct efm32_acmp_output_t
 {
-	rt_uint32_t 		location;
-	rt_bool_t 			enable;
-	rt_bool_t 			invert;
+    rt_uint32_t         location;
+    rt_bool_t           enable;
+    rt_bool_t           invert;
 };
 
 struct efm32_acmp_control_t
 {
-	ACMP_Init_TypeDef			*init;
-	ACMP_Channel_TypeDef		posInput;
-	ACMP_Channel_TypeDef		negInput;
-	struct efm32_acmp_output_t 	*output;
-	efm32_irq_hook_t 			hook;
+    ACMP_Init_TypeDef           *init;
+    ACMP_Channel_TypeDef        posInput;
+    ACMP_Channel_TypeDef        negInput;
+    struct efm32_acmp_output_t  *output;
+    efm32_irq_hook_t            hook;
 };
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/drv_adc.c b/bsp/efm32/drv_adc.c
index e1eeafb36e..2a072507e0 100644
--- a/bsp/efm32/drv_adc.c
+++ b/bsp/efm32/drv_adc.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_adc.c
- * @brief 	ADC driver of RT-Thread RTOS for EFM32
+ * @file    drv_adc.c
+ * @brief   ADC driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -29,7 +29,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_ADC_DEBUG
-#define adc_debug(format,args...) 			rt_kprintf(format, ##args)
+#define adc_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define adc_debug(format,args...)
 #endif
@@ -71,132 +71,132 @@ static rt_uint32_t adcErrataShift = 0;
  *   No need to load the calibration values after the function returns.
  ******************************************************************************/
 rt_uint32_t efm32_adc_calibration(
-	ADC_TypeDef 			*adc,
-	ADC_Ref_TypeDef			ref,
-	ADC_SingleInput_TypeDef	input)
+    ADC_TypeDef             *adc,
+    ADC_Ref_TypeDef         ref,
+    ADC_SingleInput_TypeDef input)
 {
-	rt_uint32_t 	cal;
-	rt_int32_t 		sample;
-	rt_int8_t 		high, mid, low, tmp;
-	ADC_InitSingle_TypeDef singleInit 	= ADC_INITSINGLE_DEFAULT;
+    rt_uint32_t     cal;
+    rt_int32_t      sample;
+    rt_int8_t       high, mid, low, tmp;
+    ADC_InitSingle_TypeDef singleInit   = ADC_INITSINGLE_DEFAULT;
 
-	/* Init for single conversion use, measure diff 0 with selected reference. */
-	singleInit.reference 	= ref;
-	singleInit.input 		= adcSingleInpDiff0;
-	singleInit.acqTime 		= adcAcqTime32;
-	singleInit.diff 		= true;
-	/* Enable oversampling rate */
-	singleInit.resolution	= adcResOVS;
-	ADC_InitSingle(adc, &singleInit);
+    /* Init for single conversion use, measure diff 0 with selected reference. */
+    singleInit.reference    = ref;
+    singleInit.input        = adcSingleInpDiff0;
+    singleInit.acqTime      = adcAcqTime32;
+    singleInit.diff         = true;
+    /* Enable oversampling rate */
+    singleInit.resolution   = adcResOVS;
+    ADC_InitSingle(adc, &singleInit);
 
-	/* ADC is now set up for offset calibration */
-	/* Offset calibration register is a 7 bit signed 2's complement value. */
-	/* Use unsigned indexes for binary search, and convert when calibration */
-	/* register is written to. */
-	high = 63;
-	low = -64;
+    /* ADC is now set up for offset calibration */
+    /* Offset calibration register is a 7 bit signed 2's complement value. */
+    /* Use unsigned indexes for binary search, and convert when calibration */
+    /* register is written to. */
+    high = 63;
+    low = -64;
 
-	/* Do binary search for offset calibration*/
-	while (low < high)
-	{
-		/* Calculate midpoint */
-		mid = low + (high - low) / 2;
+    /* Do binary search for offset calibration*/
+    while (low < high)
+    {
+        /* Calculate midpoint */
+        mid = low + (high - low) / 2;
 
-		/* Midpoint is converted to 2's complement and written to both scan and */
-		/* single calibration registers */
-		cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK);
-		tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid;
-		cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT;
-		cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT;
-		adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp);
-		adc->CAL = cal;
+        /* Midpoint is converted to 2's complement and written to both scan and */
+        /* single calibration registers */
+        cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK);
+        tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid;
+        cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT;
+        cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT;
+        adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp);
+        adc->CAL = cal;
 
-		/* Do a conversion */
-		ADC_Start(adc, adcStartSingle);
+        /* Do a conversion */
+        ADC_Start(adc, adcStartSingle);
 
-		/* Wait while conversion is active */
-		while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
+        /* Wait while conversion is active */
+        while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
 
-		/* Get ADC result */
-		sample = ADC_DataSingleGet(adc);
+        /* Get ADC result */
+        sample = ADC_DataSingleGet(adc);
 
-		/* Check result and decide in which part of to repeat search */
-		/* Calibration register has negative effect on result */
-		if (sample < 0)
-		{
-			/* Repeat search in bottom half. */
-			high = mid;
-		}
-		else if (sample > 0)
-		{
-			/* Repeat search in top half. */
-			low = mid + 1;
-		}
-		else
-		{
-			/* Found it, exit while loop */
-			break;
-		}
-	}
-	adc_debug("adc->CAL = %x\n", adc->CAL);
+        /* Check result and decide in which part of to repeat search */
+        /* Calibration register has negative effect on result */
+        if (sample < 0)
+        {
+            /* Repeat search in bottom half. */
+            high = mid;
+        }
+        else if (sample > 0)
+        {
+            /* Repeat search in top half. */
+            low = mid + 1;
+        }
+        else
+        {
+            /* Found it, exit while loop */
+            break;
+        }
+    }
+    adc_debug("adc->CAL = %x\n", adc->CAL);
 
-	/* Now do gain calibration, only input and diff settings needs to be changed */
-	adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK);
-	adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT);
-	adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT);
+    /* Now do gain calibration, only input and diff settings needs to be changed */
+    adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK);
+    adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT);
+    adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT);
 
-	/* ADC is now set up for gain calibration */
-	/* Gain calibration register is a 7 bit unsigned value. */
-	high = 127;
-	low = 0;
+    /* ADC is now set up for gain calibration */
+    /* Gain calibration register is a 7 bit unsigned value. */
+    high = 127;
+    low = 0;
 
-	/* Do binary search for gain calibration */
-	while (low < high)
-	{
-		/* Calculate midpoint and write to calibration register */
-		mid = low + (high - low) / 2;
+    /* Do binary search for gain calibration */
+    while (low < high)
+    {
+        /* Calculate midpoint and write to calibration register */
+        mid = low + (high - low) / 2;
 
-		/* Midpoint is converted to 2's complement */
-		cal      = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK);
-		cal     |= mid << _ADC_CAL_SINGLEGAIN_SHIFT;
-		cal     |= mid << _ADC_CAL_SCANGAIN_SHIFT;
-		adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid);
-		adc->CAL = cal;
+        /* Midpoint is converted to 2's complement */
+        cal      = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK);
+        cal     |= mid << _ADC_CAL_SINGLEGAIN_SHIFT;
+        cal     |= mid << _ADC_CAL_SCANGAIN_SHIFT;
+        adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid);
+        adc->CAL = cal;
 
-		/* Do a conversion */
-		ADC_Start(adc, adcStartSingle);
+        /* Do a conversion */
+        ADC_Start(adc, adcStartSingle);
 
-		/* Wait while conversion is active */
-		while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
+        /* Wait while conversion is active */
+        while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
 
-		/* Get ADC result */
-		sample = ADC_DataSingleGet(adc);
+        /* Get ADC result */
+        sample = ADC_DataSingleGet(adc);
 
-		/* Check result and decide in which part to repeat search */
-		/* Compare with a value atleast one LSB's less than top to avoid overshooting */
-		/* Since oversampling is used, the result is 16 bits, but a couple of lsb's */
-		/* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */
-		/* is in turn 0xffe0 in the 16 bit result. */
-		/* Calibration register has positive effect on result */
-		if (sample > 0xffd0)
-		{
-		  /* Repeat search in bottom half. */
-		  high = mid;
-		}
-		else if (sample < 0xffd0)
-		{
-		  /* Repeat search in top half. */
-		  low = mid + 1;
-		}
-		else
-		{
-		  /* Found it, exit while loop */
-		  break;
-		}
-	}
-	adc_debug("adc->CAL = %x\n", adc->CAL);
+        /* Check result and decide in which part to repeat search */
+        /* Compare with a value atleast one LSB's less than top to avoid overshooting */
+        /* Since oversampling is used, the result is 16 bits, but a couple of lsb's */
+        /* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */
+        /* is in turn 0xffe0 in the 16 bit result. */
+        /* Calibration register has positive effect on result */
+        if (sample > 0xffd0)
+        {
+          /* Repeat search in bottom half. */
+          high = mid;
+        }
+        else if (sample < 0xffd0)
+        {
+          /* Repeat search in top half. */
+          low = mid + 1;
+        }
+        else
+        {
+          /* Found it, exit while loop */
+          break;
+        }
+    }
+    adc_debug("adc->CAL = %x\n", adc->CAL);
 
-	return adc->CAL;
+    return adc->CAL;
 }
 
 /***************************************************************************//**
@@ -217,52 +217,52 @@ rt_uint32_t efm32_adc_calibration(
  *   DMA channel
  ******************************************************************************/
 void efm32_adc_cfg_dma(
-		ADC_TypeDef 			*adc_device,
-		rt_uint8_t 				mode,
-		rt_uint8_t 				channel)
+        ADC_TypeDef             *adc_device,
+        rt_uint8_t              mode,
+        rt_uint8_t              channel)
 {
-	DMA_CfgChannel_TypeDef	chnlCfg;
-	DMA_CfgDescr_TypeDef	descrCfg;
+    DMA_CfgChannel_TypeDef  chnlCfg;
+    DMA_CfgDescr_TypeDef    descrCfg;
 
-	if (channel == (rt_uint8_t)EFM32_NO_DMA)
-	{
-		return;
-	}
+    if (channel == (rt_uint8_t)EFM32_NO_DMA)
+    {
+        return;
+    }
 
-	/* Set up DMA channel */
-	chnlCfg.highPri 	= false;
-	chnlCfg.enableInt	= false;
-	if (adc_device == ADC0)
-	{
-		switch (mode & ADC_MASK_MODE)
-		{
-		case ADC_MODE_SINGLE:
-			chnlCfg.select = DMAREQ_ADC0_SINGLE;
-			break;
+    /* Set up DMA channel */
+    chnlCfg.highPri     = false;
+    chnlCfg.enableInt   = false;
+    if (adc_device == ADC0)
+    {
+        switch (mode & ADC_MASK_MODE)
+        {
+        case ADC_MODE_SINGLE:
+            chnlCfg.select = DMAREQ_ADC0_SINGLE;
+            break;
 
-		case ADC_MODE_SCAN:
-			chnlCfg.select = DMAREQ_ADC0_SCAN;
-			break;
+        case ADC_MODE_SCAN:
+            chnlCfg.select = DMAREQ_ADC0_SCAN;
+            break;
 
-		default:
-			return;
-		}
-	}
-	else
-	{
-		// TODO: Any other channel?
-		return;
-	}
-	chnlCfg.cb			= RT_NULL;
-	DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg);
+        default:
+            return;
+        }
+    }
+    else
+    {
+        // TODO: Any other channel?
+        return;
+    }
+    chnlCfg.cb          = RT_NULL;
+    DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg);
 
-	/* Setting up DMA channel descriptor */
-	descrCfg.dstInc 	= dmaDataInc4;
-	descrCfg.srcInc 	= dmaDataIncNone;
-	descrCfg.size		= dmaDataSize4;
-	descrCfg.arbRate	= dmaArbitrate1;
-	descrCfg.hprot		= 0;
-	DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg);
+    /* Setting up DMA channel descriptor */
+    descrCfg.dstInc     = dmaDataInc4;
+    descrCfg.srcInc     = dmaDataIncNone;
+    descrCfg.size       = dmaDataSize4;
+    descrCfg.arbRate    = dmaArbitrate1;
+    descrCfg.hprot      = 0;
+    DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg);
 }
 
 /***************************************************************************//**
@@ -289,38 +289,38 @@ void efm32_adc_cfg_dma(
  *   Pointer to ADC results buffer
  ******************************************************************************/
 void efm32_adc_on_dma(
-		ADC_TypeDef 			*adc_device,
-		rt_uint8_t 				mode,
-		rt_uint8_t 				count,
-		rt_uint8_t 				channel,
-		void 					*buffer)
+        ADC_TypeDef             *adc_device,
+        rt_uint8_t              mode,
+        rt_uint8_t              count,
+        rt_uint8_t              channel,
+        void                    *buffer)
 {
-	switch (mode & ADC_MASK_MODE)
-	{
-	case ADC_MODE_SINGLE:
-		/* Activate DMA */
-		DMA_ActivateBasic(
-			(rt_uint32_t)channel,
-			true,
-			false,
-			buffer,
-			(void *)&(adc_device->SINGLEDATA),
-			count - 1);
-		break;
+    switch (mode & ADC_MASK_MODE)
+    {
+    case ADC_MODE_SINGLE:
+        /* Activate DMA */
+        DMA_ActivateBasic(
+            (rt_uint32_t)channel,
+            true,
+            false,
+            buffer,
+            (void *)&(adc_device->SINGLEDATA),
+            count - 1);
+        break;
 
-	case ADC_MODE_SCAN:
-		DMA_ActivateBasic(
-			(rt_uint32_t)channel,
-			true,
-			false,
-			buffer,
-			(void *)&(adc_device->SCANDATA),
-			count - 1);
-		break;
+    case ADC_MODE_SCAN:
+        DMA_ActivateBasic(
+            (rt_uint32_t)channel,
+            true,
+            false,
+            buffer,
+            (void *)&(adc_device->SCANDATA),
+            count - 1);
+        break;
 
-	default:
-		return;
-	}
+    default:
+        return;
+    }
 }
 
 /***************************************************************************//**
@@ -339,468 +339,468 @@ void efm32_adc_on_dma(
  ******************************************************************************/
  static rt_err_t rt_adc_init(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	rt_uint32_t temp;
+    rt_uint32_t temp;
 
-	struct efm32_adc_device_t *adc;
+    struct efm32_adc_device_t *adc;
 
-	adc = (struct efm32_adc_device_t *)(dev->user_data);
+    adc = (struct efm32_adc_device_t *)(dev->user_data);
 
-	temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH);
+    temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH);
 
-	adc_debug("adc->CAL = %x\n", temp);
-	return RT_EOK;
+    adc_debug("adc->CAL = %x\n", temp);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Configure ADC device
+ *  Configure ADC device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] cmd
- *	ADC control command
+ *  ADC control command
  *
  * @param[in] args
- *	Arguments
+ *  Arguments
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 static rt_err_t rt_adc_control(
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_adc_device_t *adc;
+    struct efm32_adc_device_t *adc;
 
-	adc = (struct efm32_adc_device_t *)(dev->user_data);
+    adc = (struct efm32_adc_device_t *)(dev->user_data);
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		{
-			/* Resume device */
-			struct efm32_adc_result_t *control = \
-				(struct efm32_adc_result_t *)args;
+    case RT_DEVICE_CTRL_RESUME:
+        {
+            /* Resume device */
+            struct efm32_adc_result_t *control = \
+                (struct efm32_adc_result_t *)args;
 
-			dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+            dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					efm32_adc_on_dma(
-						adc->adc_device,
-						control->mode,
-						adc->singleCount,
-						adc->singleDmaChannel,
-						control->buffer);
-				}
-				ADC_Start(adc->adc_device, adcStartSingle);
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    efm32_adc_on_dma(
+                        adc->adc_device,
+                        control->mode,
+                        adc->singleCount,
+                        adc->singleDmaChannel,
+                        control->buffer);
+                }
+                ADC_Start(adc->adc_device, adcStartSingle);
+                break;
 
-			case ADC_MODE_SCAN:
-				if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					efm32_adc_on_dma(
-						adc->adc_device,
-						control->mode,
-						adc->scanCount,
-						adc->scanDmaChannel,
-						control->buffer);
-				}
-				ADC_Start(adc->adc_device, adcStartScan);
-				break;
+            case ADC_MODE_SCAN:
+                if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    efm32_adc_on_dma(
+                        adc->adc_device,
+                        control->mode,
+                        adc->scanCount,
+                        adc->scanDmaChannel,
+                        control->buffer);
+                }
+                ADC_Start(adc->adc_device, adcStartScan);
+                break;
 
-			case ADC_MODE_TAILGATE:
-				{
-					void *index = control->buffer;
+            case ADC_MODE_TAILGATE:
+                {
+                    void *index = control->buffer;
 
-					if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						efm32_adc_on_dma(
-							adc->adc_device,
-							control->mode,
-							adc->scanCount,
-							adc->scanDmaChannel,
-							index);
-						index += adc->scanCount;
-					}
-					if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						efm32_adc_on_dma(
-							adc->adc_device,
-							control->mode,
-							adc->singleCount,
-							adc->singleDmaChannel,
-							index);
-						index += adc->singleCount;
-					}
-					ADC_Start(adc->adc_device, adcStartScanAndSingle);
-				}
+                    if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        efm32_adc_on_dma(
+                            adc->adc_device,
+                            control->mode,
+                            adc->scanCount,
+                            adc->scanDmaChannel,
+                            index);
+                        index += adc->scanCount;
+                    }
+                    if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        efm32_adc_on_dma(
+                            adc->adc_device,
+                            control->mode,
+                            adc->singleCount,
+                            adc->singleDmaChannel,
+                            index);
+                        index += adc->singleCount;
+                    }
+                    ADC_Start(adc->adc_device, adcStartScanAndSingle);
+                }
 
-				break;
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
-		}
-		break;
+            default:
+                return -RT_ERROR;
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ADC_MODE:
-		{
-			/* change device setting */
-			struct efm32_adc_control_t *control = \
-				(struct efm32_adc_control_t *)args;
+    case RT_DEVICE_CTRL_ADC_MODE:
+        {
+            /* change device setting */
+            struct efm32_adc_control_t *control = \
+                (struct efm32_adc_control_t *)args;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				ADC_InitSingle(adc->adc_device, control->single.init);
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                ADC_InitSingle(adc->adc_device, control->single.init);
+                break;
 
-			case ADC_MODE_SCAN:
-				ADC_InitScan(adc->adc_device, control->scan.init);
-				break;
+            case ADC_MODE_SCAN:
+                ADC_InitScan(adc->adc_device, control->scan.init);
+                break;
 
-			case ADC_MODE_TAILGATE:
-				ADC_InitSingle(adc->adc_device, control->single.init);
-				ADC_InitScan(adc->adc_device, control->scan.init);
-				break;
+            case ADC_MODE_TAILGATE:
+                ADC_InitSingle(adc->adc_device, control->single.init);
+                ADC_InitScan(adc->adc_device, control->scan.init);
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
+            default:
+                return -RT_ERROR;
+            }
 
-			if (control->mode == ADC_MODE_TAILGATE)
-			{
-				adc->mode = ADC_MODE_TAILGATE;
-			}
-			else
-			{
-				adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE;
-				adc->mode |= control->mode;
-			}
-			if ((control->mode == ADC_MODE_TAILGATE) || \
-				(control->mode == ADC_MODE_SINGLE))
-			{
-				if (control->single.init->rep)
-				{
-					adc->mode |= ADC_OP_SINGLE_REPEAT;
-				}
-				adc->singleCount = control->single.count;
-				adc->singleDmaChannel = control->single.dmaChannel;
-				efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel);
-			}
-			if ((control->mode == ADC_MODE_TAILGATE) || \
-				(control->mode == ADC_MODE_SCAN))
-			{
-				if (control->scan.init->rep)
-				{
-					adc->mode |= ADC_OP_SCAN_REPEAT;
-				}
-				adc->scanCount = control->scan.count;
-				adc->scanDmaChannel = control->scan.dmaChannel;
-				efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel);
-			}
-		}
-		break;
+            if (control->mode == ADC_MODE_TAILGATE)
+            {
+                adc->mode = ADC_MODE_TAILGATE;
+            }
+            else
+            {
+                adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE;
+                adc->mode |= control->mode;
+            }
+            if ((control->mode == ADC_MODE_TAILGATE) || \
+                (control->mode == ADC_MODE_SINGLE))
+            {
+                if (control->single.init->rep)
+                {
+                    adc->mode |= ADC_OP_SINGLE_REPEAT;
+                }
+                adc->singleCount = control->single.count;
+                adc->singleDmaChannel = control->single.dmaChannel;
+                efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel);
+            }
+            if ((control->mode == ADC_MODE_TAILGATE) || \
+                (control->mode == ADC_MODE_SCAN))
+            {
+                if (control->scan.init->rep)
+                {
+                    adc->mode |= ADC_OP_SCAN_REPEAT;
+                }
+                adc->scanCount = control->scan.count;
+                adc->scanDmaChannel = control->scan.dmaChannel;
+                efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel);
+            }
+        }
+        break;
 
-	case RT_DEVICE_CTRL_ADC_RESULT:
-		{
-			struct efm32_adc_result_t *control = \
-				(struct efm32_adc_result_t *)args;
+    case RT_DEVICE_CTRL_ADC_RESULT:
+        {
+            struct efm32_adc_result_t *control = \
+                (struct efm32_adc_result_t *)args;
 
-			switch (control->mode)
-			{
-			case ADC_MODE_SINGLE:
-				if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					if (adc->mode & ADC_OP_SINGLE_REPEAT)
-					{
-						if (!(DMA->IF & (1 << adc->singleDmaChannel)))
-						{
-							efm32_adc_on_dma(
-								adc->adc_device,
-								control->mode,
-								adc->singleCount,
-								adc->singleDmaChannel,
-								control->buffer);
-						}
-						while (!(DMA->IF & (1 << adc->singleDmaChannel)));
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-					}
-				}
-				else
-				{
-					while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-					*((rt_uint32_t *)control->buffer) = \
-						ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
-				}
-				break;
+            switch (control->mode)
+            {
+            case ADC_MODE_SINGLE:
+                if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    if (adc->mode & ADC_OP_SINGLE_REPEAT)
+                    {
+                        if (!(DMA->IF & (1 << adc->singleDmaChannel)))
+                        {
+                            efm32_adc_on_dma(
+                                adc->adc_device,
+                                control->mode,
+                                adc->singleCount,
+                                adc->singleDmaChannel,
+                                control->buffer);
+                        }
+                        while (!(DMA->IF & (1 << adc->singleDmaChannel)));
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                    }
+                }
+                else
+                {
+                    while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                    *((rt_uint32_t *)control->buffer) = \
+                        ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
+                }
+                break;
 
-			case ADC_MODE_SCAN:
-				if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-				{
-					if (adc->mode & ADC_OP_SCAN_REPEAT)
-					{
-						if (!(DMA->IF & (1 << adc->scanDmaChannel)))
-						{
-							efm32_adc_on_dma(
-								adc->adc_device,
-								control->mode,
-								adc->scanCount,
-								adc->scanDmaChannel,
-								control->buffer);
-						}
-						while (!(DMA->IF & (1 << adc->scanDmaChannel)));
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-					}
-				}
-				else
-				{
-					while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-					*((rt_uint32_t *)control->buffer) = \
-						ADC_DataScanGet(adc->adc_device) << adcErrataShift;
-				}
-				break;
+            case ADC_MODE_SCAN:
+                if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                {
+                    if (adc->mode & ADC_OP_SCAN_REPEAT)
+                    {
+                        if (!(DMA->IF & (1 << adc->scanDmaChannel)))
+                        {
+                            efm32_adc_on_dma(
+                                adc->adc_device,
+                                control->mode,
+                                adc->scanCount,
+                                adc->scanDmaChannel,
+                                control->buffer);
+                        }
+                        while (!(DMA->IF & (1 << adc->scanDmaChannel)));
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                    }
+                }
+                else
+                {
+                    while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                    *((rt_uint32_t *)control->buffer) = \
+                        ADC_DataScanGet(adc->adc_device) << adcErrataShift;
+                }
+                break;
 
-			case ADC_MODE_TAILGATE:
-				{
-					void *index = control->buffer;
+            case ADC_MODE_TAILGATE:
+                {
+                    void *index = control->buffer;
 
-					if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
-						!(adc->mode & ADC_OP_SCAN_REPEAT))
-					{
-						index += adc->scanCount;
-					}
-					if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
-						!(adc->mode & ADC_OP_SINGLE_REPEAT))
-					{
-						index += adc->singleCount;
-					}
+                    if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
+                        !(adc->mode & ADC_OP_SCAN_REPEAT))
+                    {
+                        index += adc->scanCount;
+                    }
+                    if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
+                        !(adc->mode & ADC_OP_SINGLE_REPEAT))
+                    {
+                        index += adc->singleCount;
+                    }
 
-					if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						if (adc->mode & ADC_OP_SCAN_REPEAT)
-						{
-							if (!(DMA->IF & (1 << adc->scanDmaChannel)))
-							{
-								efm32_adc_on_dma(
-									adc->adc_device,
-									control->mode,
-									adc->scanCount,
-									adc->scanDmaChannel,
-									index);
-								index += adc->scanCount;
-							}
-							while (!(DMA->IF & (1 << adc->scanDmaChannel)));
-						}
-						else
-						{
-							while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-						}
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
-						*(rt_uint32_t *)(index++) = \
-							ADC_DataScanGet(adc->adc_device) << adcErrataShift;
-					}
-					if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
-					{
-						if (adc->mode & ADC_OP_SINGLE_REPEAT)
-						{
-							if (!(DMA->IF & (1 << adc->singleDmaChannel)))
-							{
-								efm32_adc_on_dma(
-									adc->adc_device,
-									control->mode,
-									adc->singleCount,
-									adc->singleDmaChannel,
-									index);
-								index += adc->singleCount;
-							}
-							while (!(DMA->IF & (1 << adc->singleDmaChannel)));
-						}
-						else
-						{
-							while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-						}
-					}
-					else
-					{
-						while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
-						*(rt_uint32_t *)(index++) = \
-							ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
-					}
-				}
-				break;
+                    if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        if (adc->mode & ADC_OP_SCAN_REPEAT)
+                        {
+                            if (!(DMA->IF & (1 << adc->scanDmaChannel)))
+                            {
+                                efm32_adc_on_dma(
+                                    adc->adc_device,
+                                    control->mode,
+                                    adc->scanCount,
+                                    adc->scanDmaChannel,
+                                    index);
+                                index += adc->scanCount;
+                            }
+                            while (!(DMA->IF & (1 << adc->scanDmaChannel)));
+                        }
+                        else
+                        {
+                            while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                        }
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
+                        *(rt_uint32_t *)(index++) = \
+                            ADC_DataScanGet(adc->adc_device) << adcErrataShift;
+                    }
+                    if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
+                    {
+                        if (adc->mode & ADC_OP_SINGLE_REPEAT)
+                        {
+                            if (!(DMA->IF & (1 << adc->singleDmaChannel)))
+                            {
+                                efm32_adc_on_dma(
+                                    adc->adc_device,
+                                    control->mode,
+                                    adc->singleCount,
+                                    adc->singleDmaChannel,
+                                    index);
+                                index += adc->singleCount;
+                            }
+                            while (!(DMA->IF & (1 << adc->singleDmaChannel)));
+                        }
+                        else
+                        {
+                            while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                        }
+                    }
+                    else
+                    {
+                        while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
+                        *(rt_uint32_t *)(index++) = \
+                            ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
+                    }
+                }
+                break;
 
-			default:
-				return -RT_ERROR;
-			}
-		}
-		break;
+            default:
+                return -RT_ERROR;
+            }
+        }
+        break;
 
-	default:
-		return -RT_ERROR;
-	}
+    default:
+        return -RT_ERROR;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
  * @brief
- *	Register ADC device
+ *  Register ADC device
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] name
- *	Device name
+ *  Device name
  *
  * @param[in] flag
- *	Configuration flags
+ *  Configuration flags
  *
  * @param[in] adc
- *	Pointer to ADC device descriptor
+ *  Pointer to ADC device descriptor
  *
  * @return
- *	Error code
+ *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_adc_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_adc_device_t *adc)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_adc_device_t *adc)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_Char; /* fixme: should be adc type */
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_adc_init;
-	device->open		= RT_NULL;
-	device->close		= RT_NULL;
-	device->read 		= RT_NULL;
-	device->write 		= RT_NULL;
-	device->control 	= rt_adc_control;
-	device->user_data	= adc;
+    device->type        = RT_Device_Class_Char; /* fixme: should be adc type */
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_adc_init;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = rt_adc_control;
+    device->user_data   = adc;
 
-	/* register a character device */
-	return rt_device_register(device, name, flag);
+    /* register a character device */
+    return rt_device_register(device, name, flag);
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize the specified ADC unit
+ *  Initialize the specified ADC unit
  *
  * @details
  *
  * @note
  *
  * @param[in] device
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  *
  * @param[in] unitNumber
- *	Unit number
+ *  Unit number
  *
  * @return
- *	Pointer to ADC device
+ *  Pointer to ADC device
  ******************************************************************************/
 static struct efm32_adc_device_t *rt_hw_adc_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber)
+    rt_device_t device,
+    rt_uint8_t  unitNumber)
 {
-	struct efm32_adc_device_t 		*adc;
-	CMU_Clock_TypeDef				adcClock;
-	ADC_Init_TypeDef 				init = ADC_INIT_DEFAULT;
+    struct efm32_adc_device_t       *adc;
+    CMU_Clock_TypeDef               adcClock;
+    ADC_Init_TypeDef                init = ADC_INIT_DEFAULT;
 
-	do
-	{
-		/* Allocate device and set default value */
-		adc = rt_malloc(sizeof(struct efm32_adc_device_t));
-		if (adc == RT_NULL)
-		{
-			adc_debug("no memory for ADC%d driver\n", unitNumber);
-			break;
-		}
-		adc->mode 				= 0;
-		adc->singleCount 		= 0;
-		adc->singleDmaChannel 	= (rt_uint8_t)EFM32_NO_DMA;
-		adc->scanCount 			= 0;
-		adc->scanDmaChannel 	= (rt_uint8_t)EFM32_NO_DMA;
+    do
+    {
+        /* Allocate device and set default value */
+        adc = rt_malloc(sizeof(struct efm32_adc_device_t));
+        if (adc == RT_NULL)
+        {
+            adc_debug("no memory for ADC%d driver\n", unitNumber);
+            break;
+        }
+        adc->mode               = 0;
+        adc->singleCount        = 0;
+        adc->singleDmaChannel   = (rt_uint8_t)EFM32_NO_DMA;
+        adc->scanCount          = 0;
+        adc->scanDmaChannel     = (rt_uint8_t)EFM32_NO_DMA;
 
-		/* Initialization */
-		if (unitNumber >= ADC_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			adc->adc_device 	= ADC0;
-			adcClock 			= (CMU_Clock_TypeDef)cmuClock_ADC0;
-			break;
+        /* Initialization */
+        if (unitNumber >= ADC_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            adc->adc_device     = ADC0;
+            adcClock            = (CMU_Clock_TypeDef)cmuClock_ADC0;
+            break;
 
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
-		/* Enable ADC clock */
-		CMU_ClockEnable(adcClock, true);
+        /* Enable ADC clock */
+        CMU_ClockEnable(adcClock, true);
 
-		/* Reset */
-		ADC_Reset(adc->adc_device);
+        /* Reset */
+        ADC_Reset(adc->adc_device);
 
-		/* Configure ADC */
-		// TODO: Fixed oversampling rate?
-		init.ovsRateSel 		= adcOvsRateSel4096;
-		init.timebase			= ADC_TimebaseCalc(0);
-		init.prescale			= ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0);
-		ADC_Init(adc->adc_device, &init);
+        /* Configure ADC */
+        // TODO: Fixed oversampling rate?
+        init.ovsRateSel         = adcOvsRateSel4096;
+        init.timebase           = ADC_TimebaseCalc(0);
+        init.prescale           = ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0);
+        ADC_Init(adc->adc_device, &init);
 
-		return adc;
-	} while(0);
+        return adc;
+    } while(0);
 
-	if (adc)
-	{
-		rt_free(adc);
-	}
-	rt_kprintf("ADC: Init failed!\n");
-	return RT_NULL;
+    if (adc)
+    {
+        rt_free(adc);
+    }
+    rt_kprintf("ADC: Init failed!\n");
+    return RT_NULL;
 }
 
 /***************************************************************************//**
  * @brief
- *	Initialize all ADC module related hardware and register ADC device to kernel
+ *  Initialize all ADC module related hardware and register ADC device to kernel
  *
  * @details
  *
@@ -809,23 +809,23 @@ static struct efm32_adc_device_t *rt_hw_adc_unit_init(
  ******************************************************************************/
 void rt_hw_adc_init(void)
 {
-	SYSTEM_ChipRevision_TypeDef	chipRev;
-	struct efm32_adc_device_t 	*adc;
+    SYSTEM_ChipRevision_TypeDef chipRev;
+    struct efm32_adc_device_t   *adc;
 
 #ifdef RT_USING_ADC0
-	if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL)
-	{
-		rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc);
-	}
+    if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL)
+    {
+        rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc);
+    }
 #endif
 
-	/* ADC errata for rev B when using VDD as reference, need to multiply */
-	/* result by 2 */
-	SYSTEM_ChipRevisionGet(&chipRev);
-	if ((chipRev.major == 0x01) && (chipRev.minor == 0x01))
-	{
-	  adcErrataShift = 1;
-	}
+    /* ADC errata for rev B when using VDD as reference, need to multiply */
+    /* result by 2 */
+    SYSTEM_ChipRevisionGet(&chipRev);
+    if ((chipRev.major == 0x01) && (chipRev.minor == 0x01))
+    {
+      adcErrataShift = 1;
+    }
 }
 
 #endif
diff --git a/bsp/efm32/drv_adc.h b/bsp/efm32/drv_adc.h
index b3b81d94e1..f15d074835 100644
--- a/bsp/efm32/drv_adc.h
+++ b/bsp/efm32/drv_adc.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_adc.h
- * @brief 	ADC driver of RT-Thread RTOS for EFM32
+ * @file    drv_adc.h
+ * @brief   ADC driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 #ifndef __DRV_ADC_H__
 #define __DRV_ADC_H__
@@ -21,50 +21,50 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_adc_device_t
 {
-	ADC_TypeDef 			*adc_device;
-	rt_uint8_t 				mode;
-	rt_uint8_t 				singleCount;
-	rt_uint8_t 				singleDmaChannel;
-	rt_uint8_t 				scanCount;
-	rt_uint8_t 				scanDmaChannel;
+    ADC_TypeDef             *adc_device;
+    rt_uint8_t              mode;
+    rt_uint8_t              singleCount;
+    rt_uint8_t              singleDmaChannel;
+    rt_uint8_t              scanCount;
+    rt_uint8_t              scanDmaChannel;
 };
 
 struct efm32_adc_control_single_t
 {
-	rt_uint8_t				count;
-	rt_uint8_t 				dmaChannel;
-	ADC_InitSingle_TypeDef	*init;
+    rt_uint8_t              count;
+    rt_uint8_t              dmaChannel;
+    ADC_InitSingle_TypeDef  *init;
 };
 
 struct efm32_adc_control_scan_t
 {
-	rt_uint8_t				count;
-	rt_uint8_t 				dmaChannel;
-	ADC_InitScan_TypeDef	*init;
+    rt_uint8_t              count;
+    rt_uint8_t              dmaChannel;
+    ADC_InitScan_TypeDef    *init;
 };
 
 struct efm32_adc_control_t
 {
-	rt_uint8_t 				mode;
-	struct efm32_adc_control_scan_t 	scan;
-	struct efm32_adc_control_single_t 	single;
+    rt_uint8_t              mode;
+    struct efm32_adc_control_scan_t     scan;
+    struct efm32_adc_control_single_t   single;
 };
 
 struct efm32_adc_result_t
 {
-	rt_uint8_t 				mode;
-	void 					*buffer;
+    rt_uint8_t              mode;
+    void                    *buffer;
 };
 
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define ADC_MODE_SINGLE 		(0x01)
-#define ADC_MODE_SCAN 			(0x02)
-#define ADC_MODE_TAILGATE		(0x04)
-#define ADC_OP_SINGLE_REPEAT	(0x10)
-#define ADC_OP_SCAN_REPEAT		(0x20)
-#define ADC_MASK_MODE			(0x0f)
-#define ADC_MASK_OP				(0xf0)
+#define ADC_MODE_SINGLE         (0x01)
+#define ADC_MODE_SCAN           (0x02)
+#define ADC_MODE_TAILGATE       (0x04)
+#define ADC_OP_SINGLE_REPEAT    (0x10)
+#define ADC_OP_SCAN_REPEAT      (0x20)
+#define ADC_MASK_MODE           (0x0f)
+#define ADC_MASK_OP             (0xf0)
 
 /* Exported functions ------------------------------------------------------- */
 void rt_hw_adc_init(void);
diff --git a/bsp/efm32/drv_emu.c b/bsp/efm32/drv_emu.c
index 9a5fc8e97e..18eeca1a43 100644
--- a/bsp/efm32/drv_emu.c
+++ b/bsp/efm32/drv_emu.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_emu.c
- * @brief 	EMU driver of RT-Thread RTOS for EFM32
+ * @file    drv_emu.c
+ * @brief   EMU driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2012-02-21	onelife		Initial creation for EFM32
+ * Date         Author      Notes
+ * 2012-02-21   onelife     Initial creation for EFM32
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -27,7 +27,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_EMU_DEBUG
-#define emu_debug(format,args...) 			rt_kprintf(format, ##args)
+#define emu_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define emu_debug(format,args...)
 #endif
@@ -176,7 +176,7 @@ void emu_em4_enable(void)
 
 /***************************************************************************//**
  * @brief
- *	Initialize EMU module related hardware
+ *  Initialize EMU module related hardware
  *
  * @details
  *
@@ -213,22 +213,22 @@ void efm32_emu_init(void)
             break;
         }
 
-    	/* init thread */
+        /* init thread */
         if (rt_thread_init(
             &emu_task.thread,
             "EMU",
-    		emu_task_main_loop, (void *)&emu_task,
+            emu_task_main_loop, (void *)&emu_task,
             (void *)&emu_task.stack, sizeof(emu_task.stack),
-    		RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK)
+            RT_THREAD_PRIORITY_MAX - 2, RT_TICK_PER_SECOND) != RT_EOK)
         {
             break;
         }
 
-    	/* startup */
-    	if (rt_thread_startup(&emu_task.thread) != RT_EOK)
-    	{
+        /* startup */
+        if (rt_thread_startup(&emu_task.thread) != RT_EOK)
+        {
             break;
-    	}
+        }
     } while (0);
 
     rt_kprintf("EMU err: init failed!\n");
diff --git a/bsp/efm32/drv_emu.h b/bsp/efm32/drv_emu.h
index 3e491665ba..df46264295 100644
--- a/bsp/efm32/drv_emu.h
+++ b/bsp/efm32/drv_emu.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_emu.h
- * @brief 	EMU driver of RT-Thread RTOS for EFM32
+ * @file    drv_emu.h
+ * @brief   EMU driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-02-21	onelife		Initial creation for EFM32
- * 2011-07-14	onelife		Add multiple channels support for scan mode
+ * Date         Author      Notes
+ * 2011-02-21   onelife     Initial creation for EFM32
+ * 2011-07-14   onelife     Add multiple channels support for scan mode
  ******************************************************************************/
 #ifndef __DRV_EMU_H__
 #define __DRV_EMU_H__
diff --git a/bsp/efm32/drv_ethernet.c b/bsp/efm32/drv_ethernet.c
index e6bc25bbcc..db99de583a 100644
--- a/bsp/efm32/drv_ethernet.c
+++ b/bsp/efm32/drv_ethernet.c
@@ -1,11 +1,11 @@
 /***************************************************************************//**
- * @file 	drv_ethernet.c
- * @brief 	Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
+ * @file    drv_ethernet.c
+ * @brief   Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
  *  module
- * 	 This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
+ *   This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
  *  controller with SPI interface.
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -13,11 +13,11 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-06-22	onelife		Initial creation for using EFM32 USART module
- * 2011-07-25	onelife		Add lock (semaphore) to prevent simultaneously
+ * Date         Author      Notes
+ * 2011-06-22   onelife     Initial creation for using EFM32 USART module
+ * 2011-07-25   onelife     Add lock (semaphore) to prevent simultaneously
  *  access
- * 2011-07-28	onelife		Add get_ip() and update_ip() utilities
+ * 2011-07-28   onelife     Add get_ip() and update_ip() utilities
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -38,21 +38,21 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef EFM32_ETHERNET_DEBUG
-#define eth_debug(format,args...) 			rt_kprintf(format, ##args)
+#define eth_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define eth_debug(format,args...)
 #endif
 
 /* Private constants ---------------------------------------------------------*/
-static const rt_uint8_t 	eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT;
+static const rt_uint8_t     eth_addr[ETH_ADDR_LEN] = ETH_ADDR_DEFAULT;
 
 /* Private variables ---------------------------------------------------------*/
-static struct eth_device 	eth_dev;
-static struct rt_semaphore 	ethLock;
-static rt_uint8_t 			ethBank;
-static rt_uint16_t 			ethNxtPkt;
-static rt_device_t 			spi 			= RT_NULL;
-static rt_bool_t 			ethAutoCs 		= true;
+static struct eth_device    eth_dev;
+static struct rt_semaphore  ethLock;
+static rt_uint8_t           ethBank;
+static rt_uint16_t          ethNxtPkt;
+static rt_device_t          spi             = RT_NULL;
+static rt_bool_t            ethAutoCs       = true;
 
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
@@ -69,17 +69,17 @@ static rt_bool_t 			ethAutoCs 		= true;
  ******************************************************************************/
 static void efm_eth_cs(rt_uint8_t enable)
 {
-	if (!ethAutoCs)
-	{
-		if (enable)
-		{
-			GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN);
-		}
-		else
-		{
-			GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN);
-		}
-	}
+    if (!ethAutoCs)
+    {
+        if (enable)
+        {
+            GPIO_PinOutClear(ETH_CS_PORT, ETH_CS_PIN);
+        }
+        else
+        {
+            GPIO_PinOutSet(ETH_CS_PORT, ETH_CS_PIN);
+        }
+    }
 }
 
 /***************************************************************************//**
@@ -103,93 +103,93 @@ static void efm_eth_cs(rt_uint8_t enable)
  *   Error code
  ******************************************************************************/
 static rt_err_t efm_eth_cmd(
-	rt_uint8_t cmd,
-	rt_uint8_t addr,
-	rt_uint8_t *data)
+    rt_uint8_t cmd,
+    rt_uint8_t addr,
+    rt_uint8_t *data)
 {
-	RT_ASSERT(spi != RT_NULL);
+    RT_ASSERT(spi != RT_NULL);
 
-	rt_uint8_t buf_ins[6], buf_res[2];
-	rt_uint8_t len_ins, len_res;
+    rt_uint8_t buf_ins[6], buf_res[2];
+    rt_uint8_t len_ins, len_res;
 
-	len_ins = 0;
-	do
-	{
-		/* Build instruction buffer */
-		/* Check if need to read back */
-		if (cmd == ENC28J60_READ_CTRL_REG)
-		{
-			buf_ins[len_ins++] = 1; 						/* Instruction length */
-		}
-		/* Byte 0: Check if no address section */
-		if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \
-			cmd == ENC28J60_SOFT_RESET)
-		{
-			buf_ins[len_ins++] = cmd;
-		}
-		else
-		{
-			buf_ins[len_ins++] = cmd | (addr & ADDR_MASK);
-		}
-		/* Byte 1: Check if data section is present */
-		if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \
-			cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM)
-		{
-			buf_ins[len_ins++] = *data;
-		}
+    len_ins = 0;
+    do
+    {
+        /* Build instruction buffer */
+        /* Check if need to read back */
+        if (cmd == ENC28J60_READ_CTRL_REG)
+        {
+            buf_ins[len_ins++] = 1;                         /* Instruction length */
+        }
+        /* Byte 0: Check if no address section */
+        if (cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM || \
+            cmd == ENC28J60_SOFT_RESET)
+        {
+            buf_ins[len_ins++] = cmd;
+        }
+        else
+        {
+            buf_ins[len_ins++] = cmd | (addr & ADDR_MASK);
+        }
+        /* Byte 1: Check if data section is present */
+        if (cmd == ENC28J60_WRITE_CTRL_REG || cmd == ENC28J60_BIT_FIELD_SET || \
+            cmd == ENC28J60_BIT_FIELD_CLR || cmd == ENC28J60_WRITE_BUF_MEM)
+        {
+            buf_ins[len_ins++] = *data;
+        }
 
-		/* Check if reading */
-		if (cmd == ENC28J60_READ_CTRL_REG)
-		{
-			*(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res; 	/* Pointer to RX buffer */
-			len_ins += 4;
+        /* Check if reading */
+        if (cmd == ENC28J60_READ_CTRL_REG)
+        {
+            *(rt_uint8_t **)(&buf_ins[len_ins]) = buf_res;  /* Pointer to RX buffer */
+            len_ins += 4;
 
-			/* Check if MAC or MII register */
-			if (addr & SPRD_MASK)
-			{
-				len_res = 2;
-			}
-			else
-			{
-				len_res = 1;
-			}
+            /* Check if MAC or MII register */
+            if (addr & SPRD_MASK)
+            {
+                len_res = 2;
+            }
+            else
+            {
+                len_res = 1;
+            }
 
-			/* Send command and get response */
-			efm_eth_cs(1);
-			if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0)
-			{
-				break;
-			}
-			*data = buf_res[len_res - 1];
-//			eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res);
-//			eth_debug("ETH: ** read RX %x %x (%d)\n",
-//				buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4],
-//				buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9],
-//				len_res);
-		}
-		else
-		{
-//			eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0],
-//				buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5],
-//				len_ins);
-			/* Send command and get response */
-			efm_eth_cs(1);
-			if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0)
-			{
-				break;
-			}
-		}
+            /* Send command and get response */
+            efm_eth_cs(1);
+            if (spi->read(spi, ETH_SPI_RX_SKIP, buf_ins, len_res) == 0)
+            {
+                break;
+            }
+            *data = buf_res[len_res - 1];
+//          eth_debug("ETH: read RX %x %x (%d)\n", buf_res[0], buf_res[1], len_res);
+//          eth_debug("ETH: ** read RX %x %x (%d)\n",
+//              buf_res[0], buf_res[1], buf_res[2], buf_res[3], buf_res[4],
+//              buf_res[5], buf_res[6], buf_res[7], buf_res[8], buf_res[9],
+//              len_res);
+        }
+        else
+        {
+//          eth_debug("ETH: ** write TX %x %x %x %x %x %x (%d) \n", buf_ins[0],
+//              buf_ins[1], buf_ins[2], buf_ins[3], buf_ins[4], buf_ins[5],
+//              len_ins);
+            /* Send command and get response */
+            efm_eth_cs(1);
+            if (spi->write(spi, EFM32_NO_DATA, buf_ins, len_ins) == 0)
+            {
+                break;
+            }
+        }
 
-		if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM))
-		{
-			efm_eth_cs(0);
-		}
-		return RT_EOK;
-	} while(0);
+        if (!(cmd == ENC28J60_READ_BUF_MEM || cmd == ENC28J60_WRITE_BUF_MEM))
+        {
+            efm_eth_cs(0);
+        }
+        return RT_EOK;
+    } while(0);
 
-	eth_debug("ETH: Send command failed!\n");
-	efm_eth_cs(0);
-	return -RT_ERROR;
+    eth_debug("ETH: Send command failed!\n");
+    efm_eth_cs(0);
+    return -RT_ERROR;
 }
 
 /***************************************************************************//**
@@ -213,37 +213,37 @@ static rt_err_t efm_eth_cmd(
  *   Error code
  ******************************************************************************/
 static rt_err_t efm_eth_sendCmd(
-	rt_uint8_t cmd,
-	rt_uint8_t addr,
-	rt_uint8_t *data)
+    rt_uint8_t cmd,
+    rt_uint8_t addr,
+    rt_uint8_t *data)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data);
-	do
-	{
-		/* Change bank */
-		if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1)))
-		{
-			rt_uint8_t temp;
+    eth_debug("ETH: Send command %x (%x %x)\n", cmd, addr, *data);
+    do
+    {
+        /* Change bank */
+        if(((addr & BANK_MASK) != ethBank) && ((addr < EIE) || (addr > ECON1)))
+        {
+            rt_uint8_t temp;
 
-			if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK)
-			{
-				break;
-			}
-			temp &= 0xFC;
-			ethBank = (addr & BANK_MASK);
-			temp |= ethBank >> BANK_SHIFT;
-			if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK)
-			{
-				break;
-			}
-		}
-		/* Send command */
-		ret = efm_eth_cmd(cmd, addr, data);
-	} while(0);
+            if ((ret = efm_eth_cmd(ENC28J60_READ_CTRL_REG, ECON1, &temp)) != RT_EOK)
+            {
+                break;
+            }
+            temp &= 0xFC;
+            ethBank = (addr & BANK_MASK);
+            temp |= ethBank >> BANK_SHIFT;
+            if ((ret = efm_eth_cmd(ENC28J60_WRITE_CTRL_REG, ECON1, &temp)) != RT_EOK)
+            {
+                break;
+            }
+        }
+        /* Send command */
+        ret = efm_eth_cmd(cmd, addr, data);
+    } while(0);
 
-	return ret;
+    return ret;
 }
 
 /***************************************************************************//**
@@ -262,11 +262,11 @@ static rt_err_t efm_eth_sendCmd(
  ******************************************************************************/
 static rt_uint8_t efm_eth_readReg(rt_uint8_t addr)
 {
-	rt_uint8_t data;
+    rt_uint8_t data;
 
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data);
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, addr, &data);
 
-	return data;
+    return data;
 }
 
 /***************************************************************************//**
@@ -285,7 +285,7 @@ static rt_uint8_t efm_eth_readReg(rt_uint8_t addr)
  ******************************************************************************/
 static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data)
 {
-	efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data);
+    efm_eth_sendCmd(ENC28J60_WRITE_CTRL_REG, addr, &data);
 }
 
 /***************************************************************************//**
@@ -304,25 +304,25 @@ static void efm_eth_writeReg(rt_uint8_t addr, rt_uint8_t data)
  ******************************************************************************/
 static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr)
 {
-	rt_uint16_t ret;
+    rt_uint16_t ret;
 
-	eth_debug("ETH: *** read PHY %x\n", addr);
+    eth_debug("ETH: *** read PHY %x\n", addr);
 
-	/* Set PHY register address */
-	efm_eth_writeReg(MIREGADR, addr);
+    /* Set PHY register address */
+    efm_eth_writeReg(MIREGADR, addr);
 
-	/* Start read operation */
-	efm_eth_writeReg(MICMD, MICMD_MIIRD);
-	/* Waiting for at least 10.24 uS */
-	while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
+    /* Start read operation */
+    efm_eth_writeReg(MICMD, MICMD_MIIRD);
+    /* Waiting for at least 10.24 uS */
+    while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
 
-	/* Stop read operation */
-	efm_eth_writeReg(MICMD, 0x00);
+    /* Stop read operation */
+    efm_eth_writeReg(MICMD, 0x00);
 
-	/* Get the result */
-	ret = (rt_uint16_t)efm_eth_readReg(MIRDL);
-	ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8;
-	return ret;
+    /* Get the result */
+    ret = (rt_uint16_t)efm_eth_readReg(MIRDL);
+    ret |= (rt_uint16_t)efm_eth_readReg(MIRDH) << 8;
+    return ret;
 }
 
 /***************************************************************************//**
@@ -341,82 +341,82 @@ static rt_uint16_t efm_eth_readPhy(rt_uint8_t addr)
  ******************************************************************************/
 static void efm_eth_writePhy(rt_uint8_t addr, rt_uint16_t data)
 {
-	eth_debug("ETH: *** write PHY %x (%x)\n", addr, data);
+    eth_debug("ETH: *** write PHY %x (%x)\n", addr, data);
 
-	/* Set PHY register address */
-	efm_eth_writeReg(MIREGADR, addr);
+    /* Set PHY register address */
+    efm_eth_writeReg(MIREGADR, addr);
 
-	/* Set data */
-	efm_eth_writeReg(MIWRL, data);
-	efm_eth_writeReg(MIWRH, data >> 8);
-	/* Waiting for at least 10.24 uS */
-	while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
+    /* Set data */
+    efm_eth_writeReg(MIWRL, data);
+    efm_eth_writeReg(MIWRH, data >> 8);
+    /* Waiting for at least 10.24 uS */
+    while(efm_eth_readReg(MISTAT) & MISTAT_BUSY);
 }
 
 /***************************************************************************//**
  * @brief
- *	Interrupt handler of Ethernet device
+ *  Interrupt handler of Ethernet device
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void efm_eth_isr(rt_device_t dev)
 {
-	rt_uint8_t reg_eir, data;
-	volatile rt_uint8_t cnt;
+    rt_uint8_t reg_eir, data;
+    volatile rt_uint8_t cnt;
 
-	/* Disable RX and other interrutps */
-	data = EIE_PKTIE | EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    /* Disable RX and other interrutps */
+    data = EIE_PKTIE | EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	/* Get interrupt flag */
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, &reg_eir);
+    /* Get interrupt flag */
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EIR, &reg_eir);
 
-	data = 0;
-	/* DMA completed */
-	if (reg_eir & EIR_DMAIF)
-	{
-		data |= (rt_uint8_t)EIR_DMAIF;
-	}
-	/* Link Changed */
-	if (reg_eir & EIR_LINKIF)
-	{
-		/* Read PHIR to clear the flag */
-		efm_eth_readPhy(PHIR);
-	}
-	/* TX done */
-	if (reg_eir & EIR_TXIF)
-	{
-		data |= (rt_uint8_t)EIR_TXIF;
-	}
-	/* TX error */
-	if (reg_eir & EIR_TXERIF)
-	{
-		data |= (rt_uint8_t)EIR_TXERIF;
-	}
-	/* RX error */
-	if (reg_eir & EIR_RXERIF)
-	{
-		data |= (rt_uint8_t)EIR_RXERIF;
-	}
-	/* Clear flags */
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+    data = 0;
+    /* DMA completed */
+    if (reg_eir & EIR_DMAIF)
+    {
+        data |= (rt_uint8_t)EIR_DMAIF;
+    }
+    /* Link Changed */
+    if (reg_eir & EIR_LINKIF)
+    {
+        /* Read PHIR to clear the flag */
+        efm_eth_readPhy(PHIR);
+    }
+    /* TX done */
+    if (reg_eir & EIR_TXIF)
+    {
+        data |= (rt_uint8_t)EIR_TXIF;
+    }
+    /* TX error */
+    if (reg_eir & EIR_TXERIF)
+    {
+        data |= (rt_uint8_t)EIR_TXERIF;
+    }
+    /* RX error */
+    if (reg_eir & EIR_RXERIF)
+    {
+        data |= (rt_uint8_t)EIR_RXERIF;
+    }
+    /* Clear flags */
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
 
-	/* Get packet counter (Errata 6) */
-	efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt);
-	if (cnt)
-	{
-	    /* Inform Ethernet thread */
-		eth_device_ready(&eth_dev);
-	}
+    /* Get packet counter (Errata 6) */
+    efm_eth_sendCmd(ENC28J60_READ_CTRL_REG, EPKTCNT, (rt_uint8_t *)&cnt);
+    if (cnt)
+    {
+        /* Inform Ethernet thread */
+        eth_device_ready(&eth_dev);
+    }
 
-	/* Enable other interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    /* Enable other interrupts */
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
 }
 
 /***************************************************************************//**
@@ -435,119 +435,119 @@ void efm_eth_isr(rt_device_t dev)
  ******************************************************************************/
 static rt_err_t efm_eth_init(rt_device_t dev)
 {
-	rt_uint16_t reg_phy;
-	rt_uint8_t data;
+    rt_uint16_t reg_phy;
+    rt_uint8_t data;
 
-	/* Reset chip select */
-	efm_eth_cs(0);
-	/* Software reset */
-	efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER);
-	/* Waiting for at least 1 ms (Errata 2) */
-	rt_thread_delay(ETH_PERIOD_WAIT_INIT);
-	ethNxtPkt = RXSTART_INIT;
-	ethBank = 0;
+    /* Reset chip select */
+    efm_eth_cs(0);
+    /* Software reset */
+    efm_eth_sendCmd(ENC28J60_SOFT_RESET, EFM32_NO_DATA, EFM32_NO_POINTER);
+    /* Waiting for at least 1 ms (Errata 2) */
+    rt_thread_delay(ETH_PERIOD_WAIT_INIT);
+    ethNxtPkt = RXSTART_INIT;
+    ethBank = 0;
 
-	/* Init RX buffer */
-	efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF);
-	efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8);
-	efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8);
-	efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8);
+    /* Init RX buffer */
+    efm_eth_writeReg(ERXSTL, RXSTART_INIT & 0xFF);
+    efm_eth_writeReg(ERXSTH, RXSTART_INIT >> 8);
+    efm_eth_writeReg(ERXNDL, RXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ERXNDH, RXSTOP_INIT >> 8);
+    efm_eth_writeReg(ERXRDPTL, RXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ERXRDPTH, RXSTOP_INIT >> 8);
 
-	/* Init TX buffer */
-	efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8);
-	efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF);
-	efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8);
-	efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
+    /* Init TX buffer */
+    efm_eth_writeReg(ETXSTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(ETXSTH, TXSTART_INIT >> 8);
+    efm_eth_writeReg(ETXNDL, TXSTOP_INIT & 0xFF);
+    efm_eth_writeReg(ETXNDH, TXSTOP_INIT >> 8);
+    efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
 
-	/* Init RX filters */
-	/* For broadcast packets we allow only ARP packtets
-	   All other packets should be unicast only for our mac (MAADR)
+    /* Init RX filters */
+    /* For broadcast packets we allow only ARP packtets
+       All other packets should be unicast only for our mac (MAADR)
 
-	   The pattern to match on is therefore
-	   Type                    ETH.DST
-	   ARP                     BROADCAST
-	   06 08 -- -- -- -- -- -- ff ff ff ff ff ff
-	   These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex
-	   Checksum for theses bytes is: f7 f9 */
-	efm_eth_writeReg(EPMM0, 0x3f);
-	efm_eth_writeReg(EPMM1, 0x30);
-	efm_eth_writeReg(EPMCSL, 0xf9);
-	efm_eth_writeReg(EPMCSH, 0xf7);
-	efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
-	//efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);
-	/* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS)
-	    pass after Power-on Reset or wake-up from Power-Down mode occurs */
+       The pattern to match on is therefore
+       Type                    ETH.DST
+       ARP                     BROADCAST
+       06 08 -- -- -- -- -- -- ff ff ff ff ff ff
+       These poitions are: 11 0000 0011 1111 in binary and 30 3f in hex
+       Checksum for theses bytes is: f7 f9 */
+    efm_eth_writeReg(EPMM0, 0x3f);
+    efm_eth_writeReg(EPMM1, 0x30);
+    efm_eth_writeReg(EPMCSL, 0xf9);
+    efm_eth_writeReg(EPMCSH, 0xf7);
+    efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
+    //efm_eth_writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN);
+    /* Waiting For OST: The OST does not expire until 7500 OSC1 clock cycles (300 uS)
+        pass after Power-on Reset or wake-up from Power-Down mode occurs */
 
-	/* Init MAC */
-	/* Enable RX, IEEE defined flow control */
-	efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
-	/* Enable padding to 60 bytes, CRC and frame length status reporting */
+    /* Init MAC */
+    /* Enable RX, IEEE defined flow control */
+    efm_eth_writeReg(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
+    /* Enable padding to 60 bytes, CRC and frame length status reporting */
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN);
-	efm_eth_writeReg(MACON4, MACON4_DEFER);
+    efm_eth_writeReg(MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN);
+    efm_eth_writeReg(MACON4, MACON4_DEFER);
 #else
-	efm_eth_writeReg(MACON3, \
-		MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
+    efm_eth_writeReg(MACON3, \
+        MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
 #endif
-	/* Set the maximum packet length */
-	efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF);
-	efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8);
-	/* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */
+    /* Set the maximum packet length */
+    efm_eth_writeReg(MAMXFLL, MAX_FRAMELEN & 0xFF);
+    efm_eth_writeReg(MAMXFLH, MAX_FRAMELEN >> 8);
+    /* Set inter-packet gap (back-to-back). Full-Duplex: 0x15, Half-Duplex: 0x12 */
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MABBIPG, 0x12);
+    efm_eth_writeReg(MABBIPG, 0x12);
 #else
-	efm_eth_writeReg(MABBIPG, 0x15);
+    efm_eth_writeReg(MABBIPG, 0x15);
 #endif
-	/* Set inter-packet gap (non-back-to-back).
-	    Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */
-	efm_eth_writeReg(MAIPGL, 0x12);
+    /* Set inter-packet gap (non-back-to-back).
+        Full-Duplex: 0x0012, Half-Duplex: 0x0C12 */
+    efm_eth_writeReg(MAIPGL, 0x12);
 #if defined(ETH_HALF_DUPLEX)
-	efm_eth_writeReg(MAIPGH, 0x0C);
-	/* Set retransmission and collision window */
-	efm_eth_writeReg(MACLCON1, 0x0F);
-	efm_eth_writeReg(MACLCON2, 0x37);
+    efm_eth_writeReg(MAIPGH, 0x0C);
+    /* Set retransmission and collision window */
+    efm_eth_writeReg(MACLCON1, 0x0F);
+    efm_eth_writeReg(MACLCON2, 0x37);
 #endif
-	/* Set MAC address
-	    NOTE: MAC address in ENC28J60 is byte-backward */
-	efm_eth_writeReg(MAADR1, eth_addr[0]);
-	efm_eth_writeReg(MAADR2, eth_addr[1]);
-	efm_eth_writeReg(MAADR3, eth_addr[2]);
-	efm_eth_writeReg(MAADR4, eth_addr[3]);
-	efm_eth_writeReg(MAADR5, eth_addr[4]);
-	efm_eth_writeReg(MAADR6, eth_addr[5]);
+    /* Set MAC address
+        NOTE: MAC address in ENC28J60 is byte-backward */
+    efm_eth_writeReg(MAADR1, eth_addr[0]);
+    efm_eth_writeReg(MAADR2, eth_addr[1]);
+    efm_eth_writeReg(MAADR3, eth_addr[2]);
+    efm_eth_writeReg(MAADR4, eth_addr[3]);
+    efm_eth_writeReg(MAADR5, eth_addr[4]);
+    efm_eth_writeReg(MAADR6, eth_addr[5]);
 
-	/* Init PHY */
+    /* Init PHY */
 #if defined(ETH_HALF_DUPLEX)
-	reg_phy = efm_eth_readPhy(PHCON2);
-	efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS);
+    reg_phy = efm_eth_readPhy(PHCON2);
+    efm_eth_writePhy(PHCON2, reg_phy | PHCON2_HDLDIS);
 #else
-	reg_phy = efm_eth_readPhy(PHCON1);
-	efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD);
+    reg_phy = efm_eth_readPhy(PHCON1);
+    efm_eth_writePhy(PHCON1, reg_phy | PHCON1_PDPXMD);
 #endif
-	/* LEDA: Display link status;
-	   LEDB: Display transmit and receive activity */
-	reg_phy = efm_eth_readPhy(PHLCON);
-	efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470);
+    /* LEDA: Display link status;
+       LEDB: Display transmit and receive activity */
+    reg_phy = efm_eth_readPhy(PHLCON);
+    efm_eth_writePhy(PHLCON, (reg_phy & 0xF00F) | 0x0470);
 
-	/* Disable clock output */
-	efm_eth_writeReg(ECOCON, 0x00);
+    /* Disable clock output */
+    efm_eth_writeReg(ECOCON, 0x00);
 
-	/* Clear interrutp flags */
-	data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
-	/* Enable interrutps */
-	data = EIE_INTIE | EIE_PKTIE | EIE_TXIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
-	/* Enable RX */
-	data = ECON1_RXEN;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    /* Clear interrutp flags */
+    data = EIR_DMAIF | EIR_TXIF | EIR_TXERIF | EIR_RXERIF;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+    /* Enable interrutps */
+    data = EIE_INTIE | EIE_PKTIE | EIE_TXIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    /* Enable RX */
+    data = ECON1_RXEN;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
 
-	eth_debug("ETH: Init OK\n");
-	return RT_EOK;
+    eth_debug("ETH: Init OK\n");
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -569,8 +569,8 @@ static rt_err_t efm_eth_init(rt_device_t dev)
  ******************************************************************************/
 static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag);
-	return RT_EOK;
+    eth_debug("ETH: Open, flag %x\n", eth_dev.parent.flag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -589,8 +589,8 @@ static rt_err_t efm_eth_open(rt_device_t dev, rt_uint16_t oflag)
  ******************************************************************************/
 static rt_err_t efm_eth_close(rt_device_t dev)
 {
-	eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag);
-	return RT_EOK;
+    eth_debug("ETH: Close, flag %x\n", eth_dev.parent.flag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -617,10 +617,10 @@ static rt_err_t efm_eth_close(rt_device_t dev)
  *   Number of read bytes
  ******************************************************************************/
 static rt_size_t efm_eth_read(
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void 			*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void            *buffer,
+    rt_size_t       size)
 {
     rt_set_errno(-RT_ENOSYS);
     return 0;
@@ -650,10 +650,10 @@ static rt_size_t efm_eth_read(
  *   Number of written bytes
  ******************************************************************************/
 static rt_size_t efm_eth_write (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	const void 		*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    const void      *buffer,
+    rt_size_t       size)
 {
     rt_set_errno(-RT_ENOSYS);
     return 0;
@@ -674,35 +674,35 @@ static rt_size_t efm_eth_write (
 *   Ethernet control command
 *
 * @param[in] args
-*	Arguments
+*   Arguments
 *
 * @return
 *   Error code
 ******************************************************************************/
 static rt_err_t efm_eth_control (
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	rt_err_t ret;
+    rt_err_t ret;
 
-	ret = -RT_ERROR;
-	switch(cmd)
-	{
-	case NIOCTL_GADDR:
-		/* Get MAC address */
-		if(args)
-		{
-			rt_memcpy(args, eth_addr, sizeof(eth_addr));
-			ret = RT_EOK;
-		}
-		break;
+    ret = -RT_ERROR;
+    switch(cmd)
+    {
+    case NIOCTL_GADDR:
+        /* Get MAC address */
+        if(args)
+        {
+            rt_memcpy(args, eth_addr, sizeof(eth_addr));
+            ret = RT_EOK;
+        }
+        break;
 
-	default :
-		break;
-	}
+    default :
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -721,43 +721,43 @@ static rt_err_t efm_eth_control (
 ******************************************************************************/
 struct pbuf *efm_eth_rx(rt_device_t dev)
 {
-	rt_uint8_t buf_ins[5], buf_read[6];
-	rt_uint8_t data, reg_eie;
-	rt_uint16_t len_rx, sta_rx;
-	struct pbuf* p;
+    rt_uint8_t buf_ins[5], buf_read[6];
+    rt_uint8_t data, reg_eie;
+    rt_uint16_t len_rx, sta_rx;
+    struct pbuf* p;
 
     /* Lock device */
     rt_sem_take(&ethLock, RT_WAITING_FOREVER);
 
     /* Disable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	p = RT_NULL;
-	reg_eie = 0;
+    p = RT_NULL;
+    reg_eie = 0;
     if (efm_eth_readReg(EPKTCNT))
     {
         /* Set read pointer to the start of RX packet */
         efm_eth_writeReg(ERDPTL, ethNxtPkt & 0xFF);
         efm_eth_writeReg(ERDPTH, ethNxtPkt >> 8);
 
-		/* Send read buffer command */
-		efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER);
-		/* Build instruction buffer */
-		buf_ins[0] = 0x00;
-		*(rt_uint8_t **)(&buf_ins[1]) = buf_read;
-		/* Read packet header */
-		if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0)
-		{
-			eth_debug("ETH: RX header failed!\n");
-		}
+        /* Send read buffer command */
+        efm_eth_sendCmd(ENC28J60_READ_BUF_MEM, EFM32_NO_DATA, EFM32_NO_POINTER);
+        /* Build instruction buffer */
+        buf_ins[0] = 0x00;
+        *(rt_uint8_t **)(&buf_ins[1]) = buf_read;
+        /* Read packet header */
+        if (spi->read(spi, EFM32_NO_DATA, buf_ins, sizeof(buf_read)) == 0)
+        {
+            eth_debug("ETH: RX header failed!\n");
+        }
 
-		ethNxtPkt = buf_read[0] | (buf_read[1] << 8);
-		len_rx = buf_read[2] | (buf_read[3] << 8);
-		sta_rx = buf_read[4] | (buf_read[5] << 8);
-		eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n",
-			ethNxtPkt, len_rx, sta_rx);
-		/* Check if OK */
+        ethNxtPkt = buf_read[0] | (buf_read[1] << 8);
+        len_rx = buf_read[2] | (buf_read[3] << 8);
+        sta_rx = buf_read[4] | (buf_read[5] << 8);
+        eth_debug("ETH: RX header ethNxtPkt %x, len_rx %x, sta_rx %x\n",
+            ethNxtPkt, len_rx, sta_rx);
+        /* Check if OK */
         if (sta_rx & 0x80)
         {
             /* Allocate pbuf */
@@ -768,67 +768,67 @@ struct pbuf *efm_eth_rx(rt_device_t dev)
 
                 for (q = p; q != RT_NULL; q= q->next)
                 {
-					/* Build instruction buffer */
-					buf_ins[0] = 0x00;
-					*(rt_uint8_t **)(&buf_ins[1]) = q->payload;
-					/* Read packet header */
-					if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0)
-					{
-						eth_debug("ETH: RX payload failed!\n");
-					}
+                    /* Build instruction buffer */
+                    buf_ins[0] = 0x00;
+                    *(rt_uint8_t **)(&buf_ins[1]) = q->payload;
+                    /* Read packet header */
+                    if (spi->read(spi, EFM32_NO_DATA, buf_ins, q->len) == 0)
+                    {
+                        eth_debug("ETH: RX payload failed!\n");
+                    }
 #ifdef EFM32_ETHERNET_DEBUG
-					{
-						rt_uint8_t *temp = (rt_uint8_t *)q->payload;
-						rt_uint32_t i;
+                    {
+                        rt_uint8_t *temp = (rt_uint8_t *)q->payload;
+                        rt_uint32_t i;
 
-						eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len);
-						for (i = 0; i < q->len; i += 8)
-						{
-							eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
-								temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-								temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
-								temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-								temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
-						}
-					}
+                        eth_debug("ETH: ***** read RX (q->len %x) *****\n", q->len);
+                        for (i = 0; i < q->len; i += 8)
+                        {
+                            eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
+                                temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                                temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
+                                temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                                temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
+                        }
+                    }
 #endif
                 }
             }
-			else
-			{
-				eth_debug("ETH: No memory for pbuf!!!\n");
-			}
+            else
+            {
+                eth_debug("ETH: No memory for pbuf!!!\n");
+            }
         }
-		else
-		{
+        else
+        {
             eth_debug("ETH: Invalid CRC or symbol error occurred!\n");
         }
-		efm_eth_cs(0);
+        efm_eth_cs(0);
 
         /* Free buffer */
         efm_eth_writeReg(ERXRDPTL, ethNxtPkt & 0xFF);
         efm_eth_writeReg(ERXRDPTH, ethNxtPkt >> 8);
 
         /* Decrease counter */
-		data = ECON2_PKTDEC;
+        data = ECON2_PKTDEC;
         efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON2, &data);
     }
-	else
-	{
-		/* Enable RX */
-		data = ECON1_RXEN;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    else
+    {
+        /* Enable RX */
+        data = ECON1_RXEN;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
 
-	    reg_eie |= EIE_PKTIE;
-		eth_debug("ETH: Enable RX interrupt\n");
-	}
-	eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT));
+        reg_eie |= EIE_PKTIE;
+        eth_debug("ETH: Enable RX interrupt\n");
+    }
+    eth_debug("ETH: RX counter %x\n", efm_eth_readReg(EPKTCNT));
 
     /* Enable interrupts */
-	reg_eie |= EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &reg_eie);
+    reg_eie |= EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &reg_eie);
 
-	/* Unlock device */
+    /* Unlock device */
     rt_sem_release(&ethLock);
 
     return p;
@@ -849,76 +849,76 @@ struct pbuf *efm_eth_rx(rt_device_t dev)
 *   Pointer to packet buffer
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p)
 {
-	rt_uint8_t data;
-	struct pbuf* q;
+    rt_uint8_t data;
+    struct pbuf* q;
 
     /* Lock device */
     rt_sem_take(&ethLock, RT_WAITING_FOREVER);
 
     /* Disable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIE, &data);
 
-	/* Set write pointer to the start of TX buffer */
-	efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
-	efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
-	/* Set buffer end pointer according to the packet size */
-	efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF);
-	efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8);
+    /* Set write pointer to the start of TX buffer */
+    efm_eth_writeReg(EWRPTL, TXSTART_INIT & 0xFF);
+    efm_eth_writeReg(EWRPTH, TXSTART_INIT >> 8);
+    /* Set buffer end pointer according to the packet size */
+    efm_eth_writeReg(ETXNDL, (TXSTART_INIT + p->tot_len + 1) & 0xFF);
+    efm_eth_writeReg(ETXNDH, (TXSTART_INIT + p->tot_len + 1) >> 8);
 
-	/* Send write buffer command */
-	data = 0x00; 	/* Control byte */
-	efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data);
-	/* Send data */
-	for (q = p; q != NULL; q = q->next)
-	{
-		if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0)
-		{
-			eth_debug("ETH: TX failed!\n");
-			return -RT_ERROR;
-		}
+    /* Send write buffer command */
+    data = 0x00;    /* Control byte */
+    efm_eth_sendCmd(ENC28J60_WRITE_BUF_MEM, EFM32_NO_DATA, &data);
+    /* Send data */
+    for (q = p; q != NULL; q = q->next)
+    {
+        if (spi->write(spi, EFM32_NO_DATA, q->payload, q->len) == 0)
+        {
+            eth_debug("ETH: TX failed!\n");
+            return -RT_ERROR;
+        }
 #ifdef EFM32_ETHERNET_DEBUG
-		{
-			rt_uint8_t *temp = (rt_uint8_t *)q->payload;
-			rt_uint32_t i;
+        {
+            rt_uint8_t *temp = (rt_uint8_t *)q->payload;
+            rt_uint32_t i;
 
-			eth_debug("ETH: ***** write TX (len %d) *****\n", p->len);
-			for (i = 0; i < q->len; i += 8)
-			{
-				eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
-					temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-					temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
-					temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
-					temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
-			}
-		}
+            eth_debug("ETH: ***** write TX (len %d) *****\n", p->len);
+            for (i = 0; i < q->len; i += 8)
+            {
+                eth_debug("%02x %02x %02x %02x %02x %02x %02x %02x | %c %c %c %c %c %c %c %c\n",
+                    temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                    temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7],
+                    temp[i], temp[i + 1], temp[i + 2], temp[i + 3],
+                    temp[i + 4], temp[i + 5], temp[i + 6], temp[i + 7]);
+            }
+        }
 #endif
-	}
-	efm_eth_cs(0);
-	/* Start TX */
-	data = ECON1_TXRTS;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
-	/* Errata 12 */
-	if (efm_eth_readReg(EIR) & EIR_TXERIF)
-	{
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data);
-		data = EIR_TXERIF;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
-		data = ECON1_TXRTS;
-		efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
-	}
+    }
+    efm_eth_cs(0);
+    /* Start TX */
+    data = ECON1_TXRTS;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    /* Errata 12 */
+    if (efm_eth_readReg(EIR) & EIR_TXERIF)
+    {
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, ECON1, &data);
+        data = EIR_TXERIF;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_CLR, EIR, &data);
+        data = ECON1_TXRTS;
+        efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, ECON1, &data);
+    }
 
-	/* Waiting for a while */
-	rt_thread_delay(ETH_PERIOD_WAIT_INIT);
+    /* Waiting for a while */
+    rt_thread_delay(ETH_PERIOD_WAIT_INIT);
     /* Enable interrupts */
-	data = EIE_INTIE;
-	efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
+    data = EIE_INTIE;
+    efm_eth_sendCmd(ENC28J60_BIT_FIELD_SET, EIE, &data);
 
-	/* Unlock device */
+    /* Unlock device */
     rt_sem_release(&ethLock);
 
     return RT_EOK;
@@ -926,164 +926,164 @@ rt_err_t efm_eth_tx(rt_device_t dev, struct pbuf* p)
 
 /***************************************************************************//**
 * @brief
-*	Initialize all Ethernet related hardware and register the device to kernel
+*   Initialize all Ethernet related hardware and register the device to kernel
 *
 * @details
 *
 * @note
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t efm_hw_eth_init(void)
 {
-	struct efm32_usart_device_t *usart;
-	efm32_irq_hook_init_t 		hook;
+    struct efm32_usart_device_t *usart;
+    efm32_irq_hook_init_t       hook;
 
-	do
-	{
-		/* Find SPI device */
-		spi = rt_device_find(ETH_USING_DEVICE_NAME);
-		if (spi == RT_NULL)
-		{
-			eth_debug("ETH: Can't find device %s!\n",
-				ETH_USING_DEVICE_NAME);
-			break;
-		}
-		eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME);
+    do
+    {
+        /* Find SPI device */
+        spi = rt_device_find(ETH_USING_DEVICE_NAME);
+        if (spi == RT_NULL)
+        {
+            eth_debug("ETH: Can't find device %s!\n",
+                ETH_USING_DEVICE_NAME);
+            break;
+        }
+        eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME);
 
-		/* Config chip slect pin */
-		usart = (struct efm32_usart_device_t *)(spi->user_data);
-		if (!(usart->state & USART_STATE_AUTOCS))
-		{
-			GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1);
-			ethAutoCs = false;
-		}
-		/* Config reset pin */
-		GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0);
-		/* Config interrupt pin */
-		GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1);
+        /* Config chip slect pin */
+        usart = (struct efm32_usart_device_t *)(spi->user_data);
+        if (!(usart->state & USART_STATE_AUTOCS))
+        {
+            GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1);
+            ethAutoCs = false;
+        }
+        /* Config reset pin */
+        GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0);
+        /* Config interrupt pin */
+        GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1);
 
-		/* Config interrupt */
-		hook.type		= efm32_irq_type_gpio;
-		hook.unit		= ETH_INT_PIN;
-		hook.cbFunc 	= efm_eth_isr;
-		hook.userPtr	= RT_NULL;
-		efm32_irq_hook_register(&hook);
-		/* Clear pending interrupt */
-		BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL);
-		/* Set falling edge interrupt and clear/enable it */
-		GPIO_IntConfig(
-			ETH_INT_PORT,
-			ETH_INT_PIN,
-			false,
-			true,
-			true);
-		if ((rt_uint8_t)ETH_INT_PIN % 2)
-		{
-			NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
-			NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(GPIO_ODD_IRQn);
-		}
-		else
-		{
-			NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
-			NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(GPIO_EVEN_IRQn);
-		}
+        /* Config interrupt */
+        hook.type       = efm32_irq_type_gpio;
+        hook.unit       = ETH_INT_PIN;
+        hook.cbFunc     = efm_eth_isr;
+        hook.userPtr    = RT_NULL;
+        efm32_irq_hook_register(&hook);
+        /* Clear pending interrupt */
+        BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL);
+        /* Set falling edge interrupt and clear/enable it */
+        GPIO_IntConfig(
+            ETH_INT_PORT,
+            ETH_INT_PIN,
+            false,
+            true,
+            true);
+        if ((rt_uint8_t)ETH_INT_PIN % 2)
+        {
+            NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
+            NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(GPIO_ODD_IRQn);
+        }
+        else
+        {
+            NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
+            NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(GPIO_EVEN_IRQn);
+        }
 
-		/* Set SPI speed */
-		USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX);
+        /* Set SPI speed */
+        USART_BaudrateSyncSet(usart->usart_device, 0, ETH_CLK_MAX);
 
-		/* Initialize semaphore */
-		rt_sem_init(&ethLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO);
+        /* Initialize semaphore */
+        rt_sem_init(&ethLock, ETH_DEVICE_NAME, 1, RT_IPC_FLAG_FIFO);
 
-		/* Register Ethernet device */
-		eth_dev.parent.init 	= efm_eth_init;
-		eth_dev.parent.open 	= efm_eth_open;
-		eth_dev.parent.close 	= efm_eth_close;
-		eth_dev.parent.read 	= efm_eth_read;
-		eth_dev.parent.write 	= efm_eth_write;
-		eth_dev.parent.control 	= efm_eth_control;
-		eth_dev.eth_rx 			= efm_eth_rx;
-		eth_dev.eth_tx 			= efm_eth_tx;
-		eth_device_init(&eth_dev, ETH_DEVICE_NAME);
+        /* Register Ethernet device */
+        eth_dev.parent.init     = efm_eth_init;
+        eth_dev.parent.open     = efm_eth_open;
+        eth_dev.parent.close    = efm_eth_close;
+        eth_dev.parent.read     = efm_eth_read;
+        eth_dev.parent.write    = efm_eth_write;
+        eth_dev.parent.control  = efm_eth_control;
+        eth_dev.eth_rx          = efm_eth_rx;
+        eth_dev.eth_tx          = efm_eth_tx;
+        eth_device_init(&eth_dev, ETH_DEVICE_NAME);
 
-		/* Start device */
-		GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN);
+        /* Start device */
+        GPIO_PinOutSet(ETH_RESET_PORT, ETH_RESET_PIN);
 
-		eth_debug("ETH: HW init OK\n");
-		return RT_EOK;
-	} while (0);
+        eth_debug("ETH: HW init OK\n");
+        return RT_EOK;
+    } while (0);
 
-	/* Release buffer */
-	rt_kprintf("ETH: HW init failed!\n");
-	return -RT_ERROR;
+    /* Release buffer */
+    rt_kprintf("ETH: HW init failed!\n");
+    return -RT_ERROR;
 }
 
 /*******************************************************************************
- * 	Export to FINSH
+ *  Export to FINSH
  ******************************************************************************/
-#if	defined(EFM32_USING_ETH_UTILS)
+#if defined(EFM32_USING_ETH_UTILS)
 #ifdef RT_USING_FINSH
 #include <finsh.h>
 
 void list_eth(void)
 {
-	rt_uint16_t reg_phy;
-	rt_uint8_t data;
+    rt_uint16_t reg_phy;
+    rt_uint8_t data;
 
-	rt_kprintf("    ENC28J60 on %s\n", ETH_USING_DEVICE_NAME);
-	rt_kprintf(" ------------------------------\n");
-	reg_phy = efm_eth_readPhy(PHSTAT2);
-	if (reg_phy & PHSTAT2_PLRITY)
-	{
-		rt_kprintf(" Cable polarity is reversed\n");
-	}
-	else
-	{
-		rt_kprintf(" Cable polarity is correct\n");
-	}
-	if (reg_phy & PHSTAT2_DPXSTAT)
-	{
-		rt_kprintf(" Full-duplex mode\n");
-	}
-	else
-	{
-		rt_kprintf(" Half-duplex mode\n");
-	}
-	if (reg_phy & PHSTAT2_LSTAT)
-	{
-		rt_kprintf(" Link is up\n");
-	}
-	else
-	{
-		rt_kprintf(" Link is down\n");
-	}
-	if (reg_phy & PHSTAT2_COLSTAT)
-	{
-		rt_kprintf(" Collision is occuring\n");
-	}
-	else
-	{
-		rt_kprintf(" No collision\n");
-	}
-	if (reg_phy & PHSTAT2_RXSTAT)
-	{
-		rt_kprintf(" RX is busy\n");
-	}
-	else
-	{
-		rt_kprintf(" RX is idle\n");
-	}
-	if (reg_phy & PHSTAT2_TXSTAT)
-	{
-		rt_kprintf(" TX is busy\n");
-	}
-	else
-	{
-		rt_kprintf(" TX is idle\n");
-	}
+    rt_kprintf("    ENC28J60 on %s\n", ETH_USING_DEVICE_NAME);
+    rt_kprintf(" ------------------------------\n");
+    reg_phy = efm_eth_readPhy(PHSTAT2);
+    if (reg_phy & PHSTAT2_PLRITY)
+    {
+        rt_kprintf(" Cable polarity is reversed\n");
+    }
+    else
+    {
+        rt_kprintf(" Cable polarity is correct\n");
+    }
+    if (reg_phy & PHSTAT2_DPXSTAT)
+    {
+        rt_kprintf(" Full-duplex mode\n");
+    }
+    else
+    {
+        rt_kprintf(" Half-duplex mode\n");
+    }
+    if (reg_phy & PHSTAT2_LSTAT)
+    {
+        rt_kprintf(" Link is up\n");
+    }
+    else
+    {
+        rt_kprintf(" Link is down\n");
+    }
+    if (reg_phy & PHSTAT2_COLSTAT)
+    {
+        rt_kprintf(" Collision is occuring\n");
+    }
+    else
+    {
+        rt_kprintf(" No collision\n");
+    }
+    if (reg_phy & PHSTAT2_RXSTAT)
+    {
+        rt_kprintf(" RX is busy\n");
+    }
+    else
+    {
+        rt_kprintf(" RX is idle\n");
+    }
+    if (reg_phy & PHSTAT2_TXSTAT)
+    {
+        rt_kprintf(" TX is busy\n");
+    }
+    else
+    {
+        rt_kprintf(" TX is idle\n");
+    }
 }
 FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.)
 
@@ -1091,108 +1091,108 @@ FINSH_FUNCTION_EXPORT(list_eth, list the Ethernet device status.)
 
 rt_err_t get_ip(char *ip)
 {
-	err_t ret;
-	struct ip_addr server_ip;
-	struct netconn *conn;
-	struct netbuf *buf;
-	char *rq, *rq2;
-	u16_t len;
-	const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n";
-	const char find[] = "body";
+    err_t ret;
+    struct ip_addr server_ip;
+    struct netconn *conn;
+    struct netbuf *buf;
+    char *rq, *rq2;
+    u16_t len;
+    const char query[] = "GET / HTTP/1.0\r\nHOST: checkip.dyndns.com\r\n\r\n";
+    const char find[] = "body";
 
-	do
-	{
+    do
+    {
 #if defined(RT_LWIP_DNS)
-		ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_gethostbyname("checkip.dyndns.com", &server_ip);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 #else
-		IP4_ADDR(&server_ip, 216,146,38,70);	// IP address of "checkip.dyndns.com"
+        IP4_ADDR(&server_ip, 216,146,38,70);    // IP address of "checkip.dyndns.com"
 #endif
 
-		conn = netconn_new(NETCONN_TCP);
-		if (conn == NULL)
-		{
-			break;
-		}
+        conn = netconn_new(NETCONN_TCP);
+        if (conn == NULL)
+        {
+            break;
+        }
 
-		ret = netconn_connect(conn, &server_ip, 80);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_connect(conn, &server_ip, 80);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Send the query */
-		ret = netconn_write(conn, query, sizeof(query) - 1, 0);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        /* Send the query */
+        ret = netconn_write(conn, query, sizeof(query) - 1, 0);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		buf = netconn_recv(conn);
-		if (buf != NULL)
-		{
-			/* Get the response */
-			ret = netbuf_data(buf, (void **)&rq, &len);
-			if (ret != ERR_OK)
-			{
-				break;
-			}
+        buf = netconn_recv(conn);
+        if (buf != NULL)
+        {
+            /* Get the response */
+            ret = netbuf_data(buf, (void **)&rq, &len);
+            if (ret != ERR_OK)
+            {
+                break;
+            }
 
-			/* Find the IP address */
-			rq = rt_strstr(rq, find);
-			if (rq == RT_NULL)
-			{
-				break;
-			}
-			rq += 5;
-			rq2 = rq;
-			rq2 = rt_strstr(rq2, find);
-			if (rq2 == RT_NULL)
-			{
-				break;
-			}
-			rq2 -= 2;
-			*rq2 = 0x0;
-//			rt_kprintf("[%s]\n", rq);
-		}
-		else
-		{
-			break;
-		}
+            /* Find the IP address */
+            rq = rt_strstr(rq, find);
+            if (rq == RT_NULL)
+            {
+                break;
+            }
+            rq += 5;
+            rq2 = rq;
+            rq2 = rt_strstr(rq2, find);
+            if (rq2 == RT_NULL)
+            {
+                break;
+            }
+            rq2 -= 2;
+            *rq2 = 0x0;
+//          rt_kprintf("[%s]\n", rq);
+        }
+        else
+        {
+            break;
+        }
 
-		/* Copy the IP address to buffer */
-		if (ip != NULL)
-		{
-			while(*rq < '0' || *rq > '9')
-			{
-				rq++;
-			}
-			rt_memcpy(ip, rq, rq2 - rq + 1);
-		}
-		netconn_delete(conn);
-		netbuf_delete(buf);
-		return RT_EOK;
-	} while (0);
+        /* Copy the IP address to buffer */
+        if (ip != NULL)
+        {
+            while(*rq < '0' || *rq > '9')
+            {
+                rq++;
+            }
+            rt_memcpy(ip, rq, rq2 - rq + 1);
+        }
+        netconn_delete(conn);
+        netbuf_delete(buf);
+        return RT_EOK;
+    } while (0);
 
-	netconn_delete(conn);
-	netbuf_delete(buf);
-	return -RT_ERROR;
+    netconn_delete(conn);
+    netbuf_delete(buf);
+    return -RT_ERROR;
 }
 
 void list_myip(void)
 {
-	rt_uint8_t ip[20];
+    rt_uint8_t ip[20];
 
-	if (get_ip(ip) != RT_EOK)
-	{
-		rt_kprintf("Get IP failed!\n");
-		return;
-	}
+    if (get_ip(ip) != RT_EOK)
+    {
+        rt_kprintf("Get IP failed!\n");
+        return;
+    }
 
-	rt_kprintf("Current IP: [%s]\n", ip);
+    rt_kprintf("Current IP: [%s]\n", ip);
 }
 FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.)
 
@@ -1202,122 +1202,122 @@ FINSH_FUNCTION_EXPORT(list_myip, list the current IP address.)
 
 rt_err_t update_ip(char *ip)
 {
-	err_t ret;
-	struct ip_addr server_ip;
-	struct netconn *conn;
-	struct netbuf *buf;
-	char *rq;
-	u16_t len, len2;
-	char query[200] = "GET /nic/update?hostname=";
-	const char query2[] = "&myip=";
-	const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic ";
-	const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n";
-	const char find[] = "good";
+    err_t ret;
+    struct ip_addr server_ip;
+    struct netconn *conn;
+    struct netbuf *buf;
+    char *rq;
+    u16_t len, len2;
+    char query[200] = "GET /nic/update?hostname=";
+    const char query2[] = "&myip=";
+    const char query3[] = " HTTP/1.0\r\nHost: members.dyndns.org\r\nAuthorization: Basic ";
+    const char query4[] = "\r\nUser-Agent: onelife - EFM32 - 0.4\r\n\r\n";
+    const char find[] = "good";
 
-	/* Make the query */
-	len = rt_strlen(query);
-	len2 = sizeof(hostName) - 1;
-	rt_memcpy(&query[len], hostName, len2);
-	len += len2;
+    /* Make the query */
+    len = rt_strlen(query);
+    len2 = sizeof(hostName) - 1;
+    rt_memcpy(&query[len], hostName, len2);
+    len += len2;
 
-	len2 = sizeof(query2) - 1;
-	rt_memcpy(&query[len], query2, len2);
-	len += len2;
+    len2 = sizeof(query2) - 1;
+    rt_memcpy(&query[len], query2, len2);
+    len += len2;
 
-	len2 = rt_strlen(ip);
-	rt_memcpy(&query[len], ip, len2);
-	len += len2;
+    len2 = rt_strlen(ip);
+    rt_memcpy(&query[len], ip, len2);
+    len += len2;
 
-	len2 = sizeof(query3) - 1;
-	rt_memcpy(&query[len], query3, len2);
-	len += len2;
+    len2 = sizeof(query3) - 1;
+    rt_memcpy(&query[len], query3, len2);
+    len += len2;
 
-	len2 = sizeof(userPwdB64) - 1;
-	rt_memcpy(&query[len], userPwdB64, len2);
-	len += len2;
+    len2 = sizeof(userPwdB64) - 1;
+    rt_memcpy(&query[len], userPwdB64, len2);
+    len += len2;
 
-	len2 = sizeof(query4) - 1;
-	rt_memcpy(&query[len], query4, len2);
-	len += len2;
+    len2 = sizeof(query4) - 1;
+    rt_memcpy(&query[len], query4, len2);
+    len += len2;
 
-	query[len] = 0x0;
-//	rt_kprintf("Query: %s\n", &query[100]);
+    query[len] = 0x0;
+//  rt_kprintf("Query: %s\n", &query[100]);
 
-	do
-	{
+    do
+    {
 #if defined(RT_LWIP_DNS)
-		ret = netconn_gethostbyname("members.dyndns.org", &server_ip);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_gethostbyname("members.dyndns.org", &server_ip);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 #else
-		IP4_ADDR(&server_ip, 204,13,248,112);	// IP address of "members.dyndns.org"
+        IP4_ADDR(&server_ip, 204,13,248,112);   // IP address of "members.dyndns.org"
 #endif
 
-		conn = netconn_new(NETCONN_TCP);
-		if (conn == NULL)
-		{
-			break;
-		}
+        conn = netconn_new(NETCONN_TCP);
+        if (conn == NULL)
+        {
+            break;
+        }
 
-		ret = netconn_connect(conn, &server_ip, 80);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        ret = netconn_connect(conn, &server_ip, 80);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Send the query */
-		ret = netconn_write(conn, query, len, 0);
-		if (ret != ERR_OK)
-		{
-			break;
-		}
+        /* Send the query */
+        ret = netconn_write(conn, query, len, 0);
+        if (ret != ERR_OK)
+        {
+            break;
+        }
 
-		/* Get the response */
-		buf = netconn_recv(conn);
-		if (buf != NULL)
-		{
-			ret = netbuf_data(buf, (void **)&rq, &len);
-			if (ret != ERR_OK)
-			{
-				break;
-			}
+        /* Get the response */
+        buf = netconn_recv(conn);
+        if (buf != NULL)
+        {
+            ret = netbuf_data(buf, (void **)&rq, &len);
+            if (ret != ERR_OK)
+            {
+                break;
+            }
 
-			/* Find the result */
-			rq = rt_strstr(rq, find);
-			if (rq == RT_NULL)
-			{
-				break;
-			}
-//			rt_kprintf("[%s]\n", rq);
-		}
-		else
-		{
-			break;
-		}
+            /* Find the result */
+            rq = rt_strstr(rq, find);
+            if (rq == RT_NULL)
+            {
+                break;
+            }
+//          rt_kprintf("[%s]\n", rq);
+        }
+        else
+        {
+            break;
+        }
 
-		netconn_delete(conn);
-		netbuf_delete(buf);
-		return RT_EOK;
-	} while (0);
+        netconn_delete(conn);
+        netbuf_delete(buf);
+        return RT_EOK;
+    } while (0);
 
-	netconn_delete(conn);
-	netbuf_delete(buf);
-	return -RT_ERROR;
+    netconn_delete(conn);
+    netbuf_delete(buf);
+    return -RT_ERROR;
 }
 
 void update_myip(char *ip)
 {
-	rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip);
+    rt_kprintf("Update host, \"%s\", to new IP address %s: ", hostName, ip);
 
-	if (update_ip(ip) != RT_EOK)
-	{
-		rt_kprintf("failed!\n");
-		return;
-	}
+    if (update_ip(ip) != RT_EOK)
+    {
+        rt_kprintf("failed!\n");
+        return;
+    }
 
-	rt_kprintf("succeeded.\n", ip);
+    rt_kprintf("succeeded.\n", ip);
 }
 FINSH_FUNCTION_EXPORT(update_myip, update DDNS with specified IP address.)
 
diff --git a/bsp/efm32/drv_ethernet.h b/bsp/efm32/drv_ethernet.h
index 146182f86d..87e12493f6 100644
--- a/bsp/efm32/drv_ethernet.h
+++ b/bsp/efm32/drv_ethernet.h
@@ -1,11 +1,11 @@
 /***************************************************************************//**
- * @file 	drv_ethernet.h
- * @brief 	Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
+ * @file    drv_ethernet.h
+ * @brief   Ethernet driver (SPI mode) of RT-Thread RTOS for using EFM32 USART
  *  module
- * 	 This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
+ *   This driver is tested by using the Microchip ENC28J60 stand-alone Ethernet
  *  controller with SPI interface.
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -13,8 +13,8 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-06-22	onelife		Initial creation for using EFM32 USART module
+ * Date         Author      Notes
+ * 2011-06-22   onelife     Initial creation for using EFM32 USART module
  ******************************************************************************/
 #ifndef __DEV_ETHERNET_H__
 #define __DEV_ETHERNET_H__
@@ -25,18 +25,18 @@
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
-#define ETH_ADDR_LEN 			(6)
-#define ETH_CLK_MAX 			(10000000) 	/* Should be more than 8 Mz (Errata 1) */
+#define ETH_ADDR_LEN            (6)
+#define ETH_CLK_MAX             (10000000)  /* Should be more than 8 Mz (Errata 1) */
 //#define ETH_HALF_DUPLEX
 
-#define ETH_PERIOD_WAIT_INIT 	(RT_TICK_PER_SECOND/100)
-#define ETH_PERIOD_WAIT_TX 		(RT_TICK_PER_SECOND/100)
-#define ETH_SPI_RX_SKIP 		(1)
+#define ETH_PERIOD_WAIT_INIT    (RT_TICK_PER_SECOND/100)
+#define ETH_PERIOD_WAIT_TX      (RT_TICK_PER_SECOND/100)
+#define ETH_SPI_RX_SKIP         (1)
 
-#define ETH_RESET_PORT 			(gpioPortB)
-#define ETH_RESET_PIN 			(9)
-#define ETH_INT_PORT 			(gpioPortB)
-#define ETH_INT_PIN 			(10)
+#define ETH_RESET_PORT          (gpioPortB)
+#define ETH_RESET_PIN           (9)
+#define ETH_INT_PORT            (gpioPortB)
+#define ETH_INT_PIN             (10)
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_hw_eth_init(void);
diff --git a/bsp/efm32/drv_leuart.c b/bsp/efm32/drv_leuart.c
index 23addb48a9..7422956003 100644
--- a/bsp/efm32/drv_leuart.c
+++ b/bsp/efm32/drv_leuart.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_leuart.c
- * @brief 	LEUART driver of RT-Thread RTOS for EFM32
+ * @file    drv_leuart.c
+ * @brief   LEUART driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,9 +10,9 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-12-09	onelife		Initial creation for EFM32
- * 2011-12-27	onelife		Utilize "LEUART_PRESENT" and "LEUART_COUNT"
+ * Date         Author      Notes
+ * 2011-12-09   onelife     Initial creation for EFM32
+ * 2011-12-27   onelife     Utilize "LEUART_PRESENT" and "LEUART_COUNT"
  ******************************************************************************/
 
 /***************************************************************************//**
@@ -41,10 +41,10 @@
 /* Private variables ---------------------------------------------------------*/
 #if defined(RT_USING_LEUART0)
  #if (RT_USING_LEUART0 >= EFM32_LEUART_LOCATION_COUNT)
- 	#error "Wrong location number"
+    #error "Wrong location number"
  #endif
-	struct rt_device leuart0_device;
-	static struct rt_semaphore leuart0_lock;
+    struct rt_device leuart0_device;
+    static struct rt_semaphore leuart0_lock;
 #endif
 
 #if defined(RT_USING_LEUART1)
@@ -52,10 +52,10 @@
  #error "Wrong unit number"
  #endif
  #if (RT_USING_LEUART1 >= EFM32_LEUART_LOCATION_COUNT)
- 	#error "Wrong location number"
+    #error "Wrong location number"
  #endif
-	struct rt_device leuart1_device;
-	static struct rt_semaphore leuart1_lock;
+    struct rt_device leuart1_device;
+    static struct rt_semaphore leuart1_lock;
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -76,37 +76,37 @@
  ******************************************************************************/
 static rt_err_t rt_leuart_init (rt_device_t dev)
 {
-	struct efm32_leuart_device_t *leuart;
+    struct efm32_leuart_device_t *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-		if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			struct efm32_leuart_dma_mode_t *dma_tx;
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
+        if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            struct efm32_leuart_dma_mode_t *dma_tx;
 
-			dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+            dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
 
-			leuart->state |= LEUART_STATE_RX_BUSY;
-		}
+            leuart->state |= LEUART_STATE_RX_BUSY;
+        }
 
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-			int_rx->data_ptr = RT_NULL;
-		}
+            int_rx->data_ptr = RT_NULL;
+        }
 
-		/* Enable LEUART */
-		LEUART_Enable(leuart->leuart_device, leuartEnable);
+        /* Enable LEUART */
+        LEUART_Enable(leuart->leuart_device, leuartEnable);
 
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -128,68 +128,68 @@ static rt_err_t rt_leuart_init (rt_device_t dev)
  ******************************************************************************/
 static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_leuart_device_t	*leuart;
+    struct efm32_leuart_device_t    *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		IRQn_Type 					rxIrq;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        IRQn_Type                   rxIrq;
 
-		//if (leuart->state & LEUART_STATE_CONSOLE)
-		{	/* Allocate new RX buffer */
-			struct efm32_leuart_int_mode_t	*int_mode;
+        //if (leuart->state & LEUART_STATE_CONSOLE)
+        {   /* Allocate new RX buffer */
+            struct efm32_leuart_int_mode_t  *int_mode;
 
-			int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            int_mode = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-			if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-				return -RT_ENOMEM;
-			}
-			rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE);
-			int_mode->data_size = LEUART_RX_BUFFER_SIZE;
-			int_mode->read_index = 0;
-			int_mode->save_index = 0;
-		}
+            if ((int_mode->data_ptr = rt_malloc(LEUART_RX_BUFFER_SIZE)) == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                return -RT_ENOMEM;
+            }
+            rt_memset(int_mode->data_ptr, 0, LEUART_RX_BUFFER_SIZE);
+            int_mode->data_size = LEUART_RX_BUFFER_SIZE;
+            int_mode->read_index = 0;
+            int_mode->save_index = 0;
+        }
 
-		/* Enable RX interrupt */
-        leuart->leuart_device->IEN 	= LEUART_IEN_RXDATAV;
+        /* Enable RX interrupt */
+        leuart->leuart_device->IEN  = LEUART_IEN_RXDATAV;
 
-		/* Enable IRQ */
-		switch (leuart->unit)
-		{
-		case 0:
+        /* Enable IRQ */
+        switch (leuart->unit)
+        {
+        case 0:
             rxIrq   = LEUART0_IRQn;
-			break;
+            break;
 #if (LEUART_COUNT > 1)
-		case 1:
+        case 1:
             rxIrq   = LEUART1_IRQn;
-			break;
+            break;
 #endif
         }
-		if (oflag != RT_DEVICE_OFLAG_WRONLY)
-		{
-			NVIC_ClearPendingIRQ(rxIrq);
-			NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
-			NVIC_EnableIRQ(rxIrq);
-		}
-	}
+        if (oflag != RT_DEVICE_OFLAG_WRONLY)
+        {
+            NVIC_ClearPendingIRQ(rxIrq);
+            NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
+            NVIC_EnableIRQ(rxIrq);
+        }
+    }
 
     /* Clear Flag */
     leuart->leuart_device->IFC      = _LEUART_IFC_MASK;
 
-	if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
-	{
-		/* DMA IRQ is enabled by DMA_Init() */
-		NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
-	}
+    if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
+    {
+        /* DMA IRQ is enabled by DMA_Init() */
+        NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
+    }
 
-	leuart->counter++;
-	leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag);
-	return RT_EOK;
+    leuart->counter++;
+    leuart_debug("LEUART%d: Open with flag %x\n", leuart->unit, oflag);
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -208,26 +208,26 @@ static rt_err_t rt_leuart_open(rt_device_t dev, rt_uint16_t oflag)
  ******************************************************************************/
 static rt_err_t rt_leuart_close(rt_device_t dev)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_device_t    *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	if (--leuart->counter == 0)
-	{
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
+    if (--leuart->counter == 0)
+    {
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode;
+            int_rx = (struct efm32_leuart_int_mode_t *)leuart->rx_mode;
 
-			rt_free(int_rx->data_ptr);
-			int_rx->data_ptr = RT_NULL;
-		}
-	}
+            rt_free(int_rx->data_ptr);
+            int_rx->data_ptr = RT_NULL;
+        }
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /***************************************************************************//**
@@ -254,105 +254,105 @@ static rt_err_t rt_leuart_close(rt_device_t dev)
  *   Number of read bytes
  ******************************************************************************/
 static rt_size_t rt_leuart_read (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void 			*buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void            *buffer,
+    rt_size_t       size)
 {
-	struct efm32_leuart_device_t *leuart;
-	rt_uint8_t 	*ptr;
-	rt_err_t 	err_code;
-	rt_size_t 	read_len;
+    struct efm32_leuart_device_t *leuart;
+    rt_uint8_t  *ptr;
+    rt_err_t    err_code;
+    rt_size_t   read_len;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		rt_set_errno(err_code);
-		return 0;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        rt_set_errno(err_code);
+        return 0;
+    }
 
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		ptr = buffer;
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        ptr = buffer;
 
-		/* interrupt mode Rx */
-		while (size)
-		{
-			rt_base_t level;
-			struct efm32_leuart_int_mode_t *int_rx;
+        /* interrupt mode Rx */
+        while (size)
+        {
+            rt_base_t level;
+            struct efm32_leuart_int_mode_t *int_rx;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)\
-				(((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode);
+            int_rx = (struct efm32_leuart_int_mode_t *)\
+                (((struct efm32_leuart_device_t *)(dev->user_data))->rx_mode);
 
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
+            /* disable interrupt */
+            level = rt_hw_interrupt_disable();
 
-			if (int_rx->read_index != int_rx->save_index)
-			{
-				/* read a character */
-				*ptr++ = int_rx->data_ptr[int_rx->read_index];
-				size--;
+            if (int_rx->read_index != int_rx->save_index)
+            {
+                /* read a character */
+                *ptr++ = int_rx->data_ptr[int_rx->read_index];
+                size--;
 
-				/* move to next position */
-				int_rx->read_index ++;
-				if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
-				{
-					int_rx->read_index = 0;
-				}
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
+                /* move to next position */
+                int_rx->read_index ++;
+                if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
+                {
+                    int_rx->read_index = 0;
+                }
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
 
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+                break;
+            }
 
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
+            /* enable interrupt */
+            rt_hw_interrupt_enable(level);
+        }
 
-		read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-	}
-	else
-	{
-		LEUART_TypeDef *leuart_device;
+        read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+    }
+    else
+    {
+        LEUART_TypeDef *leuart_device;
 
-		leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-		leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device;
-		ptr = buffer;
+        leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+        leuart_device = ((struct efm32_leuart_device_t *)(dev->user_data))->leuart_device;
+        ptr = buffer;
 
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (leuart_device->STATUS & LEUART_STATUS_RXDATAV)
-			{
-				*ptr = leuart_device->RXDATA & 0xff;
-				ptr ++;
-			}
-		}
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (leuart_device->STATUS & LEUART_STATUS_RXDATAV)
+            {
+                *ptr = leuart_device->RXDATA & 0xff;
+                ptr ++;
+            }
+        }
 
-		read_len = size;
-	}
+        read_len = size;
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return read_len;
+    /* set error code */
+    rt_set_errno(err_code);
+    return read_len;
 }
 
 /***************************************************************************//**
@@ -379,504 +379,504 @@ static rt_size_t rt_leuart_read (
  *   Number of written bytes
  ******************************************************************************/
 static rt_size_t rt_leuart_write (
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	const void* 	buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    const void*     buffer,
+    rt_size_t       size)
 {
-	rt_err_t 						err_code;
-	rt_size_t 						write_size;
-	struct efm32_leuart_device_t* 	leuart;
+    rt_err_t                        err_code;
+    rt_size_t                       write_size;
+    struct efm32_leuart_device_t*   leuart;
 
-	write_size = 0;
-	leuart = (struct efm32_leuart_device_t*)(dev->user_data);
+    write_size = 0;
+    leuart = (struct efm32_leuart_device_t*)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		rt_set_errno(err_code);
-		return 0;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        rt_set_errno(err_code);
+        return 0;
+    }
 
-	if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2))
-	{	/* DMA mode Tx */
-		struct efm32_leuart_dma_mode_t *dma_tx;
+    if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (size > 2))
+    {   /* DMA mode Tx */
+        struct efm32_leuart_dma_mode_t *dma_tx;
 
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			if (*((rt_uint8_t *)buffer + size - 1) == '\n')
-			{
-				*((rt_uint8_t *)buffer + size - 1) = '\r';
-				*((rt_uint8_t *)buffer + size++) = '\n';
-				*((rt_uint8_t *)buffer + size) = 0;
-			}
-		}
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            if (*((rt_uint8_t *)buffer + size - 1) == '\n')
+            {
+                *((rt_uint8_t *)buffer + size - 1) = '\r';
+                *((rt_uint8_t *)buffer + size++) = '\n';
+                *((rt_uint8_t *)buffer + size) = 0;
+            }
+        }
 
-		dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
-		dma_tx->data_ptr = (rt_uint32_t *)buffer;
-		dma_tx->data_size = size;
+        dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+        dma_tx->data_ptr = (rt_uint32_t *)buffer;
+        dma_tx->data_size = size;
 
-		leuart->state |= LEUART_STATE_TX_BUSY;
+        leuart->state |= LEUART_STATE_TX_BUSY;
 
-		DMA_ActivateBasic(
-			dma_tx->dma_channel,
-			true,
-			false,
-			(void *)&(leuart->leuart_device->TXDATA),
-			(void *)buffer,
-			(rt_uint32_t)(size - 1));
+        DMA_ActivateBasic(
+            dma_tx->dma_channel,
+            true,
+            false,
+            (void *)&(leuart->leuart_device->TXDATA),
+            (void *)buffer,
+            (rt_uint32_t)(size - 1));
 
-		/* Wait, otherwise the TX buffer is overwrite */
-//		if (leuart->state & LEUART_STATE_CONSOLE)
-//		{
-			while(leuart->state & LEUART_STATE_TX_BUSY);
-//		}
-//		else
-//		{
-//			while(leuart->state & LEUART_STATE_TX_BUSY)
-//			{
-//				rt_thread_sleep(LEUART_WAIT_TIME_TX);
-//			}
-//		}
+        /* Wait, otherwise the TX buffer is overwrite */
+//      if (leuart->state & LEUART_STATE_CONSOLE)
+//      {
+            while(leuart->state & LEUART_STATE_TX_BUSY);
+//      }
+//      else
+//      {
+//          while(leuart->state & LEUART_STATE_TX_BUSY)
+//          {
+//              rt_thread_sleep(LEUART_WAIT_TIME_TX);
+//          }
+//      }
 // TODO: This function blocks the process
-		write_size = size;
-	}
-	else
-	{	/* polling mode */
-		rt_uint8_t *ptr = (rt_uint8_t *)buffer;
+        write_size = size;
+    }
+    else
+    {   /* polling mode */
+        rt_uint8_t *ptr = (rt_uint8_t *)buffer;
 
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* stream mode */
-			while (size)
-			{
-				if (*ptr == '\n')
-				{
-					while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-					leuart->leuart_device->TXDATA = '\r';
-				}
+        if (dev->flag & RT_DEVICE_FLAG_STREAM)
+        {
+            /* stream mode */
+            while (size)
+            {
+                if (*ptr == '\n')
+                {
+                    while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                    leuart->leuart_device->TXDATA = '\r';
+                }
 
-				while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-				leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
-				++ptr; --size;
-			}
-		}
-		else
-		{
-			/* write data directly */
-			while (size)
-			{
-				while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
-				leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
-				++ptr; --size;
-			}
-		}
+                while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
+                ++ptr; --size;
+            }
+        }
+        else
+        {
+            /* write data directly */
+            while (size)
+            {
+                while (!(leuart->leuart_device->STATUS & LEUART_STATUS_TXBL));
+                leuart->leuart_device->TXDATA = (rt_uint32_t)*ptr;
+                ++ptr; --size;
+            }
+        }
 
-		write_size = (rt_size_t)ptr - (rt_size_t)buffer;
-	}
+        write_size = (rt_size_t)ptr - (rt_size_t)buffer;
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	/* set error code */
-	rt_set_errno(err_code);
-	return write_size;
+    /* set error code */
+    rt_set_errno(err_code);
+    return write_size;
 }
 
 /***************************************************************************//**
 * @brief
-*	Configure LEUART device
+*   Configure LEUART device
 *
 * @details
 *
 * @note
 *
 * @param[in] dev
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] cmd
-*	IIC control command
+*   IIC control command
 *
 * @param[in] args
-*	Arguments
+*   Arguments
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 static rt_err_t rt_leuart_control (
-	rt_device_t 	dev,
-	rt_uint8_t 		cmd,
-	void 			*args)
+    rt_device_t     dev,
+    rt_uint8_t      cmd,
+    void            *args)
 {
-	RT_ASSERT(dev != RT_NULL);
+    RT_ASSERT(dev != RT_NULL);
 
-	rt_err_t	err_code;
-	struct efm32_leuart_device_t *leuart;
+    rt_err_t    err_code;
+    struct efm32_leuart_device_t *leuart;
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
 
-	/* Lock device */
-	if (rt_hw_interrupt_check())
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
-	}
-	else
-	{
-		err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
-	}
-	if (err_code != RT_EOK)
-	{
-		return err_code;
-	}
+    /* Lock device */
+    if (rt_hw_interrupt_check())
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_NO);
+    }
+    else
+    {
+        err_code = rt_sem_take(leuart->lock, RT_WAITING_FOREVER);
+    }
+    if (err_code != RT_EOK)
+    {
+        return err_code;
+    }
 
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* Suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		LEUART_Enable(leuart->leuart_device, leuartDisable);
-		break;
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* Suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        LEUART_Enable(leuart->leuart_device, leuartDisable);
+        break;
 
-	case RT_DEVICE_CTRL_RESUME:
-		/* Resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		LEUART_Enable(leuart->leuart_device, leuartEnable);
-		break;
+    case RT_DEVICE_CTRL_RESUME:
+        /* Resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        LEUART_Enable(leuart->leuart_device, leuartEnable);
+        break;
 
-	case RT_DEVICE_CTRL_LEUART_RBUFFER:
-		/* Set RX buffer */
-		{
-			struct efm32_leuart_int_mode_t *int_rx;
-			rt_uint8_t size;
+    case RT_DEVICE_CTRL_LEUART_RBUFFER:
+        /* Set RX buffer */
+        {
+            struct efm32_leuart_int_mode_t *int_rx;
+            rt_uint8_t size;
 
-			int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
-			size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
+            int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+            size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
 
-			/* Free previous RX buffer */
-			if (int_rx->data_ptr != RT_NULL)
-			{
-				if (size == 0)
-				{	/* Free RX buffer */
-					rt_free(int_rx->data_ptr);
-					int_rx->data_ptr = RT_NULL;
-				}
-				else if (size != int_rx->data_size)
-				{
-					/* Re-allocate RX buffer */
-					if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
-						== RT_NULL)
-					{
-						leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-						err_code = -RT_ENOMEM;
-						break;
-					}
-					// TODO: Is the following line necessary?
-					//rt_memset(int_rx->data_ptr, 0, size);
-				}
-			}
-			else
-			{
-				/* Allocate new RX buffer */
-				if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
-				{
-					leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
-					err_code = -RT_ENOMEM;
-					break;
-				}
-			}
-			int_rx->data_size = size;
-			int_rx->read_index = 0;
-			int_rx->save_index = 0;
-		}
-		break;
+            /* Free previous RX buffer */
+            if (int_rx->data_ptr != RT_NULL)
+            {
+                if (size == 0)
+                {   /* Free RX buffer */
+                    rt_free(int_rx->data_ptr);
+                    int_rx->data_ptr = RT_NULL;
+                }
+                else if (size != int_rx->data_size)
+                {
+                    /* Re-allocate RX buffer */
+                    if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
+                        == RT_NULL)
+                    {
+                        leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                        err_code = -RT_ENOMEM;
+                        break;
+                    }
+                    // TODO: Is the following line necessary?
+                    //rt_memset(int_rx->data_ptr, 0, size);
+                }
+            }
+            else
+            {
+                /* Allocate new RX buffer */
+                if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
+                {
+                    leuart_debug("LEUART%d err: no mem for RX BUF\n", leuart->unit);
+                    err_code = -RT_ENOMEM;
+                    break;
+                }
+            }
+            int_rx->data_size = size;
+            int_rx->read_index = 0;
+            int_rx->save_index = 0;
+        }
+        break;
 
-	}
+    }
 
-	/* Unlock device */
-	rt_sem_release(leuart->lock);
+    /* Unlock device */
+    rt_sem_release(leuart->lock);
 
-	return err_code;
+    return err_code;
 }
 
 /***************************************************************************//**
  * @brief
- *	LEUART RX data valid interrupt handler
+ *  LEUART RX data valid interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void rt_hw_leuart_rx_isr(rt_device_t dev)
 {
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_int_mode_t 	*int_rx;
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_int_mode_t  *int_rx;
     rt_uint32_t                     flag;
 
-	/* interrupt mode receive */
-	RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
+    /* interrupt mode receive */
+    RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-	int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    int_rx = (struct efm32_leuart_int_mode_t *)(leuart->rx_mode);
 
-	RT_ASSERT(int_rx->data_ptr != RT_NULL);
+    RT_ASSERT(int_rx->data_ptr != RT_NULL);
 
-	/* Set status */
-	leuart->state |= LEUART_STATE_RX_BUSY;
+    /* Set status */
+    leuart->state |= LEUART_STATE_RX_BUSY;
 
-	/* save into rx buffer */
-	while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV)
-	{
-		rt_base_t level;
+    /* save into rx buffer */
+    while (leuart->leuart_device->STATUS & LEUART_STATUS_RXDATAV)
+    {
+        rt_base_t level;
 
-		/* disable interrupt */
-		level = rt_hw_interrupt_disable();
+        /* disable interrupt */
+        level = rt_hw_interrupt_disable();
 
-		/* save character */
-		int_rx->data_ptr[int_rx->save_index] = \
-			(rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL);
-		int_rx->save_index ++;
-		if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE)
-			int_rx->save_index = 0;
+        /* save character */
+        int_rx->data_ptr[int_rx->save_index] = \
+            (rt_uint8_t)(leuart->leuart_device->RXDATA & 0xFFUL);
+        int_rx->save_index ++;
+        if (int_rx->save_index >= LEUART_RX_BUFFER_SIZE)
+            int_rx->save_index = 0;
 
-		/* if the next position is read index, discard this 'read char' */
-		if (int_rx->save_index == int_rx->read_index)
-		{
-			int_rx->read_index ++;
-			if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
-			{
-				int_rx->read_index = 0;
-			}
-		}
+        /* if the next position is read index, discard this 'read char' */
+        if (int_rx->save_index == int_rx->read_index)
+        {
+            int_rx->read_index ++;
+            if (int_rx->read_index >= LEUART_RX_BUFFER_SIZE)
+            {
+                int_rx->read_index = 0;
+            }
+        }
 
-		/* enable interrupt */
-		rt_hw_interrupt_enable(level);
-	}
+        /* enable interrupt */
+        rt_hw_interrupt_enable(level);
+    }
 
-	/* invoke callback */
-	if (dev->rx_indicate != RT_NULL)
-	{
-		rt_size_t rx_length;
+    /* invoke callback */
+    if (dev->rx_indicate != RT_NULL)
+    {
+        rt_size_t rx_length;
 
-		/* get rx length */
-		rx_length = int_rx->read_index > int_rx->save_index ?
-			LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
-			int_rx->save_index - int_rx->read_index;
+        /* get rx length */
+        rx_length = int_rx->read_index > int_rx->save_index ?
+            LEUART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
+            int_rx->save_index - int_rx->read_index;
 
-		dev->rx_indicate(dev, rx_length);
-	}
+        dev->rx_indicate(dev, rx_length);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- *	DMA for LEUART TX interrupt handler
+ *  DMA for LEUART TX interrupt handler
  *
  * @details
  *
  * @note
  *
  * @param[in] dev
- *	Pointer to device descriptor
+ *  Pointer to device descriptor
  ******************************************************************************/
 void rt_hw_leuart_dma_tx_isr(rt_device_t dev)
 {
-	/* DMA mode receive */
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_dma_mode_t 	*dma_tx;
+    /* DMA mode receive */
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_dma_mode_t  *dma_tx;
 
-	RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
+    RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
 
-	leuart = (struct efm32_leuart_device_t *)(dev->user_data);
-	dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
+    leuart = (struct efm32_leuart_device_t *)(dev->user_data);
+    dma_tx = (struct efm32_leuart_dma_mode_t *)(leuart->tx_mode);
 
-	/* invoke call to notify tx complete */
-	if (dev->tx_complete != RT_NULL)
-	{
-		dev->tx_complete(dev, dma_tx->data_ptr);
-	}
+    /* invoke call to notify tx complete */
+    if (dev->tx_complete != RT_NULL)
+    {
+        dev->tx_complete(dev, dma_tx->data_ptr);
+    }
 
-	/* Set status */
-	leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY;
+    /* Set status */
+    leuart->state &= ~(rt_uint32_t)LEUART_STATE_TX_BUSY;
 }
 
 /***************************************************************************//**
 * @brief
-*	Register LEUART device
+*   Register LEUART device
 *
 * @details
 *
 * @note
 *
 * @param[in] device
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] name
-*	Device name
+*   Device name
 *
 * @param[in] flag
-*	Configuration flags
+*   Configuration flags
 *
 * @param[in] leuart
-*	Pointer to LEUART device descriptor
+*   Pointer to LEUART device descriptor
 *
 * @return
-*	Error code
+*   Error code
 ******************************************************************************/
 rt_err_t rt_hw_leuart_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag,
-	struct efm32_leuart_device_t *leuart)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag,
+    struct efm32_leuart_device_t *leuart)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
-		(flag & RT_DEVICE_FLAG_INT_TX))
-	{
-		RT_ASSERT(0);
-	}
+    if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
+        (flag & RT_DEVICE_FLAG_INT_TX))
+    {
+        RT_ASSERT(0);
+    }
 
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_leuart_init;
-	device->open		= rt_leuart_open;
-	device->close		= rt_leuart_close;
-	device->read 		= rt_leuart_read;
-	device->write 		= rt_leuart_write;
-	device->control 	= rt_leuart_control;
-	device->user_data	= leuart;
+    device->type        = RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = rt_leuart_init;
+    device->open        = rt_leuart_open;
+    device->close       = rt_leuart_close;
+    device->read        = rt_leuart_read;
+    device->write       = rt_leuart_write;
+    device->control     = rt_leuart_control;
+    device->user_data   = leuart;
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 /***************************************************************************//**
 * @brief
-*	Initialize the specified LEUART unit
+*   Initialize the specified LEUART unit
 *
 * @details
 *
 * @note
 *
 * @param[in] device
-*	Pointer to device descriptor
+*   Pointer to device descriptor
 *
 * @param[in] unitNumber
-*	Unit number
+*   Unit number
 *
 * @param[in] location
-*	Pin location number
+*   Pin location number
 *
 * @param[in] flag
-*	Configuration flag
+*   Configuration flag
 *
 * @param[in] dmaChannel
-*	DMA channel number for TX
+*   DMA channel number for TX
 *
 * @param[in] console
-*	Indicate if using as console
+*   Indicate if using as console
 *
 * @return
-*	Pointer to LEUART device
+*   Pointer to LEUART device
 ******************************************************************************/
 static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
-	rt_device_t device,
-	rt_uint8_t 	unitNumber,
-	rt_uint8_t 	location,
-	rt_uint32_t flag,
-	rt_uint32_t	dmaChannel,
-	rt_uint8_t 	config)
+    rt_device_t device,
+    rt_uint8_t  unitNumber,
+    rt_uint8_t  location,
+    rt_uint32_t flag,
+    rt_uint32_t dmaChannel,
+    rt_uint8_t  config)
 {
-	struct efm32_leuart_device_t 	*leuart;
-	struct efm32_leuart_dma_mode_t	*dma_mode;
-	DMA_CB_TypeDef					*callback;
-	CMU_Clock_TypeDef				leuartClock;
-	rt_uint32_t						txDmaSelect;
-	GPIO_Port_TypeDef 				port_tx, port_rx, port_clk, port_cs;
-	rt_uint32_t 					pin_tx, pin_rx, pin_clk, pin_cs;
+    struct efm32_leuart_device_t    *leuart;
+    struct efm32_leuart_dma_mode_t  *dma_mode;
+    DMA_CB_TypeDef                  *callback;
+    CMU_Clock_TypeDef               leuartClock;
+    rt_uint32_t                     txDmaSelect;
+    GPIO_Port_TypeDef               port_tx, port_rx, port_clk, port_cs;
+    rt_uint32_t                     pin_tx, pin_rx, pin_clk, pin_cs;
     LEUART_Init_TypeDef             init = LEUART_INIT_DEFAULT;
-	efm32_irq_hook_init_t			hook;
+    efm32_irq_hook_init_t           hook;
 
-	do
-	{
-		/* Allocate device */
-		leuart = rt_malloc(sizeof(struct efm32_leuart_device_t));
-		if (leuart == RT_NULL)
-		{
-			leuart_debug("LEUART%d err: no mem\n", unitNumber);
-			break;
-		}
-		leuart->counter = 0;
-		leuart->unit    = unitNumber;
-		leuart->state   = config;
-		leuart->tx_mode = RT_NULL;
-		leuart->rx_mode = RT_NULL;
+    do
+    {
+        /* Allocate device */
+        leuart = rt_malloc(sizeof(struct efm32_leuart_device_t));
+        if (leuart == RT_NULL)
+        {
+            leuart_debug("LEUART%d err: no mem\n", unitNumber);
+            break;
+        }
+        leuart->counter = 0;
+        leuart->unit    = unitNumber;
+        leuart->state   = config;
+        leuart->tx_mode = RT_NULL;
+        leuart->rx_mode = RT_NULL;
 
-		/* Allocate TX */
-		dma_mode = RT_NULL;
-		if (flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t));
-			if (dma_mode == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber);
-				break;
-			}
-			dma_mode->dma_channel = dmaChannel;
-		}
+        /* Allocate TX */
+        dma_mode = RT_NULL;
+        if (flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            leuart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_leuart_dma_mode_t));
+            if (dma_mode == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for DMA TX\n", unitNumber);
+                break;
+            }
+            dma_mode->dma_channel = dmaChannel;
+        }
 
-		/* Allocate RX */
-		if (flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t));
-			if (leuart->rx_mode == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber");
-				break;
-			}
-		}
+        /* Allocate RX */
+        if (flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            leuart->rx_mode = rt_malloc(sizeof(struct efm32_leuart_int_mode_t));
+            if (leuart->rx_mode == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for INT RX\n, unitNumber");
+                break;
+            }
+        }
 
-		/* Initialization */
-		if (unitNumber >= LEUART_COUNT)
-		{
-			break;
-		}
-		switch (unitNumber)
-		{
-		case 0:
-			leuart->leuart_device    = LEUART0;
-			leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART0;
-			txDmaSelect             = DMAREQ_LEUART0_TXBL;
-			port_tx                 = AF_LEUART0_TX_PORT(location);
-			pin_tx                  = AF_LEUART0_TX_PIN(location);
-			port_rx                 = AF_LEUART0_RX_PORT(location);
-			pin_rx                  = AF_LEUART0_RX_PIN(location);
-			break;
+        /* Initialization */
+        if (unitNumber >= LEUART_COUNT)
+        {
+            break;
+        }
+        switch (unitNumber)
+        {
+        case 0:
+            leuart->leuart_device    = LEUART0;
+            leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART0;
+            txDmaSelect             = DMAREQ_LEUART0_TXBL;
+            port_tx                 = AF_LEUART0_TX_PORT(location);
+            pin_tx                  = AF_LEUART0_TX_PIN(location);
+            port_rx                 = AF_LEUART0_RX_PORT(location);
+            pin_rx                  = AF_LEUART0_RX_PIN(location);
+            break;
 #if (LEUART_COUNT > 1)
-		case 1:
-			leuart->leuart_device    = LEUART1;
-			leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART1;
-			txDmaSelect             = DMAREQ_LEUART1_TXBL;
-			port_tx                 = AF_LEUART1_TX_PORT(location);
-			pin_tx                  = AF_LEUART1_TX_PIN(location);
-			port_rx                 = AF_LEUART1_RX_PORT(location);
-			pin_rx                  = AF_LEUART1_RX_PIN(location);
-			break;
+        case 1:
+            leuart->leuart_device    = LEUART1;
+            leuartClock             = (CMU_Clock_TypeDef)cmuClock_LEUART1;
+            txDmaSelect             = DMAREQ_LEUART1_TXBL;
+            port_tx                 = AF_LEUART1_TX_PORT(location);
+            pin_tx                  = AF_LEUART1_TX_PIN(location);
+            port_rx                 = AF_LEUART1_RX_PORT(location);
+            pin_rx                  = AF_LEUART1_RX_PIN(location);
+            break;
 #endif
-		default:
-			break;
-		}
+        default:
+            break;
+        }
 
         /* Do not prescale clock */
         CMU_ClockDivSet(leuartClock, cmuClkDiv_1);
@@ -884,98 +884,98 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
         /* Enable LEUART clock */
         CMU_ClockEnable(leuartClock, true);
 
-		/* Config GPIO */
-		GPIO_PinModeSet(
-			port_tx,
-			pin_tx,
-			gpioModePushPull,
-			0);
-		GPIO_PinModeSet(
-			port_rx,
-			pin_rx,
-			gpioModeInputPull,
-			1);
+        /* Config GPIO */
+        GPIO_PinModeSet(
+            port_tx,
+            pin_tx,
+            gpioModePushPull,
+            0);
+        GPIO_PinModeSet(
+            port_rx,
+            pin_rx,
+            gpioModeInputPull,
+            1);
 
-		/* Config interrupt and NVIC */
-		if (flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			hook.type		= efm32_irq_type_leuart;
-			hook.unit		= unitNumber;
-			hook.cbFunc 	= rt_hw_leuart_rx_isr;
-			hook.userPtr	= device;
-			efm32_irq_hook_register(&hook);
-		}
+        /* Config interrupt and NVIC */
+        if (flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            hook.type       = efm32_irq_type_leuart;
+            hook.unit       = unitNumber;
+            hook.cbFunc     = rt_hw_leuart_rx_isr;
+            hook.userPtr    = device;
+            efm32_irq_hook_register(&hook);
+        }
 
-		/* Config DMA */
-		if (flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			DMA_CfgChannel_TypeDef	chnlCfg;
-			DMA_CfgDescr_TypeDef	descrCfg;
+        /* Config DMA */
+        if (flag & RT_DEVICE_FLAG_DMA_TX)
+        {
+            DMA_CfgChannel_TypeDef  chnlCfg;
+            DMA_CfgDescr_TypeDef    descrCfg;
 
-			hook.type 			= efm32_irq_type_dma;
-			hook.unit 			= dmaChannel;
-			hook.cbFunc			= rt_hw_leuart_dma_tx_isr;
-			hook.userPtr 		= device;
-			efm32_irq_hook_register(&hook);
+            hook.type           = efm32_irq_type_dma;
+            hook.unit           = dmaChannel;
+            hook.cbFunc         = rt_hw_leuart_dma_tx_isr;
+            hook.userPtr        = device;
+            efm32_irq_hook_register(&hook);
 
-			callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
-			if (callback == RT_NULL)
-			{
-				leuart_debug("LEUART%d err: no mem for callback\n", unitNumber);
-				break;
-			}
-			callback->cbFunc	= DMA_IRQHandler_All;
-			callback->userPtr	= RT_NULL;
-			callback->primary	= 0;
+            callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
+            if (callback == RT_NULL)
+            {
+                leuart_debug("LEUART%d err: no mem for callback\n", unitNumber);
+                break;
+            }
+            callback->cbFunc    = DMA_IRQHandler_All;
+            callback->userPtr   = RT_NULL;
+            callback->primary   = 0;
 
-			/* Setting up DMA channel */
-			chnlCfg.highPri		= false;	/* Can't use with peripherals */
-			chnlCfg.enableInt 	= true;		/* Interrupt for callback function */
-			chnlCfg.select 		= txDmaSelect;
-			chnlCfg.cb			= callback;
-			DMA_CfgChannel(dmaChannel, &chnlCfg);
+            /* Setting up DMA channel */
+            chnlCfg.highPri     = false;    /* Can't use with peripherals */
+            chnlCfg.enableInt   = true;     /* Interrupt for callback function */
+            chnlCfg.select      = txDmaSelect;
+            chnlCfg.cb          = callback;
+            DMA_CfgChannel(dmaChannel, &chnlCfg);
 
-			/* Setting up DMA channel descriptor */
-			descrCfg.dstInc 	= dmaDataIncNone;
-			descrCfg.srcInc 	= dmaDataInc1;
-			descrCfg.size 		= dmaDataSize1;
-			descrCfg.arbRate 	= dmaArbitrate1;
-			descrCfg.hprot 		= 0;
-			DMA_CfgDescr(dmaChannel, true, &descrCfg);
-		}
+            /* Setting up DMA channel descriptor */
+            descrCfg.dstInc     = dmaDataIncNone;
+            descrCfg.srcInc     = dmaDataInc1;
+            descrCfg.size       = dmaDataSize1;
+            descrCfg.arbRate    = dmaArbitrate1;
+            descrCfg.hprot      = 0;
+            DMA_CfgDescr(dmaChannel, true, &descrCfg);
+        }
 
-		/* Init specified LEUART unit */
+        /* Init specified LEUART unit */
         LEUART_Init(leuart->leuart_device, &init);
 
-		/* Enable RX and TX pins and set location */
-		leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \
-						(location << _LEUART_ROUTE_LOCATION_SHIFT);
+        /* Enable RX and TX pins and set location */
+        leuart->leuart_device->ROUTE = LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN | \
+                        (location << _LEUART_ROUTE_LOCATION_SHIFT);
 
-		/* Clear RX/TX buffers */
-		leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX;
+        /* Clear RX/TX buffers */
+        leuart->leuart_device->CMD = LEUART_CMD_CLEARRX | LEUART_CMD_CLEARTX;
 
-		return leuart;
-	} while(0);
+        return leuart;
+    } while(0);
 
-	if (leuart->rx_mode)
-	{
-		rt_free(leuart->rx_mode);
-	}
-	if (leuart->tx_mode)
-	{
-		rt_free(leuart->tx_mode);
-	}
-	if (leuart)
-	{
-		rt_free(leuart);
-	}
-	if (callback)
-	{
-		rt_free(leuart);
-	}
+    if (leuart->rx_mode)
+    {
+        rt_free(leuart->rx_mode);
+    }
+    if (leuart->tx_mode)
+    {
+        rt_free(leuart->tx_mode);
+    }
+    if (leuart)
+    {
+        rt_free(leuart);
+    }
+    if (callback)
+    {
+        rt_free(leuart);
+    }
 
     leuart_debug("LEUART%d err: init failed!\n", unitNumber);
-	return RT_NULL;
+    return RT_NULL;
 }
 
 /***************************************************************************//**
@@ -989,12 +989,12 @@ static struct efm32_leuart_device_t *rt_hw_leuart_unit_init(
 ******************************************************************************/
 void rt_hw_leuart_init(void)
 {
-	struct efm32_leuart_device_t    *leuart;
-	rt_uint32_t 				    flag;
-	rt_uint8_t					    config;
+    struct efm32_leuart_device_t    *leuart;
+    rt_uint32_t                     flag;
+    rt_uint8_t                      config;
 
-	do
-	{
+    do
+    {
 #ifdef RT_USING_LEUART0
         config = 0;
         flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
@@ -1073,11 +1073,11 @@ void rt_hw_leuart_init(void)
         }
 #endif
 
-		leuart_debug("LEUART: H/W init OK!\n");
-		return;
-	} while (0);
+        leuart_debug("LEUART: H/W init OK!\n");
+        return;
+    } while (0);
 
-	rt_kprintf("LEUART: H/W init failed!\n");
+    rt_kprintf("LEUART: H/W init failed!\n");
 }
 
 #endif /* (defined(RT_USING_LEUART0) || defined(RT_USING_LEUART1)) */
diff --git a/bsp/efm32/drv_leuart.h b/bsp/efm32/drv_leuart.h
index 692ff0d520..b7c24bb025 100644
--- a/bsp/efm32/drv_leuart.h
+++ b/bsp/efm32/drv_leuart.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	drv_leuart.h
- * @brief 	LEUART driver of RT-Thread RTOS for EFM32
+ * @file    drv_leuart.h
+ * @brief   LEUART driver of RT-Thread RTOS for EFM32
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-12-09	onelife		Initial creation for EFM32
+ * Date         Author      Notes
+ * 2011-12-09   onelife     Initial creation for EFM32
  ******************************************************************************/
 #ifndef __DRV_LEUSART_H__
 #define __DRV_LEUSART_H__
@@ -20,37 +20,37 @@
 /* Exported types ------------------------------------------------------------*/
 struct efm32_leuart_int_mode_t
 {
-	rt_uint8_t  		*data_ptr;
-	rt_uint8_t  		data_size;
-	rt_uint32_t 		read_index, save_index;
+    rt_uint8_t          *data_ptr;
+    rt_uint8_t          data_size;
+    rt_uint32_t         read_index, save_index;
 };
 
 struct efm32_leuart_dma_mode_t
 {
-	/* DMA Channel */
-	rt_uint32_t 		dma_channel;
+    /* DMA Channel */
+    rt_uint32_t         dma_channel;
 
-	/* buffer info */
-	rt_uint32_t 		*data_ptr;
-	rt_uint8_t  		data_size;
+    /* buffer info */
+    rt_uint32_t         *data_ptr;
+    rt_uint8_t          data_size;
 };
 
 struct efm32_leuart_device_t
 {
-	/* Counter */
-	rt_uint32_t 		counter;
-	/* Lock */
-	struct rt_semaphore	*lock;
-	/* Unit number */
-	rt_uint8_t 			unit;
-	/* State */
-	volatile rt_uint8_t	state;
-	/*  Pointer to LEUART device structure */
-	LEUART_TypeDef 		*leuart_device;
-	/* Pointer to RX structure */
-	void 				*rx_mode;
-	/* Pointer to TX structure */
-	void 				*tx_mode;
+    /* Counter */
+    rt_uint32_t         counter;
+    /* Lock */
+    struct rt_semaphore *lock;
+    /* Unit number */
+    rt_uint8_t          unit;
+    /* State */
+    volatile rt_uint8_t state;
+    /*  Pointer to LEUART device structure */
+    LEUART_TypeDef      *leuart_device;
+    /* Pointer to RX structure */
+    void                *rx_mode;
+    /* Pointer to TX structure */
+    void                *tx_mode;
 };
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/drv_rtc.c b/bsp/efm32/drv_rtc.c
index 16604a3919..75713fe3b4 100644
--- a/bsp/efm32/drv_rtc.c
+++ b/bsp/efm32/drv_rtc.c
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2009-01-05   Bernard     the first version
  * 2010-12-27   onelife     Modify for EFM32
  * 2011-06-16   onelife     Modify init function for efm32lib v2 upgrading
@@ -33,7 +33,7 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_RTC_DEBUG
-#define rtc_debug(format,args...) 			rt_kprintf(format, ##args)
+#define rtc_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define rtc_debug(format,args...)
 #endif
@@ -55,10 +55,10 @@ static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
 }
 
 static rt_size_t rt_rtc_read(
-	rt_device_t 	dev,
-	rt_off_t 		pos,
-	void* 			buffer,
-	rt_size_t 		size)
+    rt_device_t     dev,
+    rt_off_t        pos,
+    void*           buffer,
+    rt_size_t       size)
 {
     return 0;
 }
@@ -91,16 +91,16 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
     {
     case RT_DEVICE_CTRL_RTC_GET_TIME:
         *(rt_uint32_t *)args = rtc_time + RTC_CounterGet();
-		rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet());
+        rtc_debug("RTC: get rtc_time %x + %x\n", rtc_time, RTC_CounterGet());
         break;
 
     case RT_DEVICE_CTRL_RTC_SET_TIME:
     {
         rtc_time = *(rt_uint32_t *)args;
-		rtc_debug("RTC: set rtc_time %x\n", rtc_time);
+        rtc_debug("RTC: set rtc_time %x\n", rtc_time);
 
-		/* Reset counter */
-		RTC_CounterReset();
+        /* Reset counter */
+        RTC_CounterReset();
     }
     break;
     }
@@ -118,12 +118,12 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
  ******************************************************************************/
 void rt_hw_rtc_isr(rt_device_t device)
 {
-	if (RTC->IF & RTC_IFC_OF)
-	{
-		rtc_time += _RTC_CNT_MASK;
-	}
+    if (RTC->IF & RTC_IFC_OF)
+    {
+        rtc_time += _RTC_CNT_MASK;
+    }
 
-	RTC->IFC = _RTC_IFC_MASK;
+    RTC->IFC = _RTC_IFC_MASK;
 }
 
 /***************************************************************************//**
@@ -147,25 +147,25 @@ void rt_hw_rtc_isr(rt_device_t device)
  *  Error code
  ******************************************************************************/
 rt_err_t rt_hw_rtc_register(
-	rt_device_t		device,
-	const char		*name,
-	rt_uint32_t		flag)
+    rt_device_t     device,
+    const char      *name,
+    rt_uint32_t     flag)
 {
-	RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
 
-	device->type 		= RT_Device_Class_RTC;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= RT_NULL;
-	device->open		= rt_rtc_open;
-	device->close		= RT_NULL;
-	device->read 		= rt_rtc_read;
-	device->write 		= RT_NULL;
-	device->control 	= rt_rtc_control;
-	device->user_data	= RT_NULL; /* no private */
+    device->type        = RT_Device_Class_RTC;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init        = RT_NULL;
+    device->open        = rt_rtc_open;
+    device->close       = RT_NULL;
+    device->read        = rt_rtc_read;
+    device->write       = RT_NULL;
+    device->control     = rt_rtc_control;
+    device->user_data   = RT_NULL; /* no private */
 
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
 }
 
 
@@ -179,50 +179,50 @@ rt_err_t rt_hw_rtc_register(
  ******************************************************************************/
 void rt_hw_rtc_init(void)
 {
-	rt_uint32_t reset;
+    rt_uint32_t reset;
 
-	reset = RMU_ResetCauseGet();
+    reset = RMU_ResetCauseGet();
 
-	// TODO: What is the current reset mode?
-	if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST)
+    // TODO: What is the current reset mode?
+    if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST)
     {
-    	RTC_Init_TypeDef rtcInit;
-		efm32_irq_hook_init_t hook;
+        RTC_Init_TypeDef rtcInit;
+        efm32_irq_hook_init_t hook;
 
-		rtcInit.enable = true;
-		rtcInit.debugRun = false;
-		rtcInit.comp0Top = false;
+        rtcInit.enable = true;
+        rtcInit.debugRun = false;
+        rtcInit.comp0Top = false;
 
-		rtc_time = 0UL;
+        rtc_time = 0UL;
 
         rt_kprintf("rtc is not configured\n");
         rt_kprintf("please configure with set_date and set_time\n");
 
-		/* Configuring clock */
+        /* Configuring clock */
         CMU_ClockDivSet(cmuClock_RTC,cmuClkDiv_32768);
         CMU_ClockEnable(cmuClock_RTC, true);
 
-		/* Initialize and enable RTC */
-		RTC_Reset();
-		RTC_Init(&rtcInit);
+        /* Initialize and enable RTC */
+        RTC_Reset();
+        RTC_Init(&rtcInit);
 
-		hook.type		= efm32_irq_type_rtc;
-		hook.unit		= 0;
-		hook.cbFunc 	= rt_hw_rtc_isr;
-		hook.userPtr	= RT_NULL;
-		efm32_irq_hook_register(&hook);
+        hook.type       = efm32_irq_type_rtc;
+        hook.unit       = 0;
+        hook.cbFunc     = rt_hw_rtc_isr;
+        hook.userPtr    = RT_NULL;
+        efm32_irq_hook_register(&hook);
 
-		/* Enabling Interrupt from RTC */
-		RTC_IntEnable(RTC_IFC_OF);
-		RTC_IntClear(RTC_IFC_OF);
+        /* Enabling Interrupt from RTC */
+        RTC_IntEnable(RTC_IFC_OF);
+        RTC_IntClear(RTC_IFC_OF);
 
-		NVIC_ClearPendingIRQ(RTC_IRQn);
-		NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT);
-		NVIC_EnableIRQ(RTC_IRQn);
+        NVIC_ClearPendingIRQ(RTC_IRQn);
+        NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT);
+        NVIC_EnableIRQ(RTC_IRQn);
     }
 
     /* register rtc device */
-	rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA);
+    rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA);
 }
 
 #endif
diff --git a/bsp/efm32/drv_rtc.h b/bsp/efm32/drv_rtc.h
index 492fc59d56..7e33c03896 100644
--- a/bsp/efm32/drv_rtc.h
+++ b/bsp/efm32/drv_rtc.h
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2009-01-05   Bernard     the first version
  * 2010-12-27   onelife     Modification for EFM32
  *********************************************************************/
diff --git a/bsp/efm32/drv_sdcard.h b/bsp/efm32/drv_sdcard.h
index 17c94209c9..2c9a1bfc39 100644
--- a/bsp/efm32/drv_sdcard.h
+++ b/bsp/efm32/drv_sdcard.h
@@ -1,9 +1,9 @@
 /***************************************************************************//**
- * @file 	drv_sdcard.h
- * @brief 	Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32
+ * @file    drv_sdcard.h
+ * @brief   Memory card driver (SPI mode) of RT-Thread RTOS for using EFM32
  *  USART module
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -11,9 +11,9 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-05-13	onelife		Initial creation for using EFM32 USART module
- * 2011-07-07	onelife		Modify initialization function to return error code
+ * Date         Author      Notes
+ * 2011-05-13   onelife     Initial creation for using EFM32 USART module
+ * 2011-07-07   onelife     Modify initialization function to return error code
  ******************************************************************************/
 #ifndef __DEV_SDCARD_H__
 #define __DEV_SDCARD_H__
@@ -33,43 +33,43 @@
 #error "EFM32 SPI clock should not be more than (EFM32_HFXO_FREQUENCY/2)"
 #endif
 
-#define SD_SPEED_LOW 			(0)
-#define SD_SPEED_HIGH 			(1)
-#define SD_WAIT_PERIOD 			(RT_TICK_PER_SECOND)
+#define SD_SPEED_LOW            (0)
+#define SD_SPEED_HIGH           (1)
+#define SD_WAIT_PERIOD          (RT_TICK_PER_SECOND)
 
-#define SD_SECTOR_SIZE_SHIFT	(9)
-#define SD_SECTOR_SIZE 			(1 << SD_SECTOR_SIZE_SHIFT)
-#define SD_BLOCK_SIZE_CSD 		(16)
-#define SD_BLOCK_SIZE_CID 		(16)
-#define SD_BLOCK_SIZE_OCR 		(4)
-#define SD_BLOCK_SIZE_SDSTAT 	(64)
+#define SD_SECTOR_SIZE_SHIFT    (9)
+#define SD_SECTOR_SIZE          (1 << SD_SECTOR_SIZE_SHIFT)
+#define SD_BLOCK_SIZE_CSD       (16)
+#define SD_BLOCK_SIZE_CID       (16)
+#define SD_BLOCK_SIZE_OCR       (4)
+#define SD_BLOCK_SIZE_SDSTAT    (64)
 
 /* Card type definitions (CardType) */
-#define CT_MMC					(0x01)
-#define CT_SD1					(0x02)
-#define CT_SD2					(0x04)
-#define CT_SDC					(CT_SD1|CT_SD2)
-#define CT_BLOCK				(0x08)
+#define CT_MMC                  (0x01)
+#define CT_SD1                  (0x02)
+#define CT_SD2                  (0x04)
+#define CT_SDC                  (CT_SD1|CT_SD2)
+#define CT_BLOCK                (0x08)
 
 /* Definitions for MMC/SDC command */
-#define CMD0 					(0) 		/* GO_IDLE_STATE */
-#define CMD1 					(1) 		/* SEND_OP_COND */
-#define ACMD41 					(41|0x80) 	/* SEND_OP_COND (SDC) */
-#define CMD8 					(8) 		/* SEND_IF_COND */
-#define CMD9 					(9) 		/* SEND_CSD */
-#define CMD10 					(10) 		/* SEND_CID */
-#define CMD12 					(12) 		/* STOP_TRANSMISSION */
-#define ACMD13 					(13|0x80) 	/* SD_STATUS (SDC) */
-#define CMD16 					(16) 		/* SET_BLOCKLEN */
-#define CMD17 					(17) 		/* READ_SINGLE_BLOCK */
-#define CMD18 					(18) 		/* READ_MULTIPLE_BLOCK */
-#define CMD23 					(23) 		/* SET_BLOCK_COUNT */
-#define ACMD23 					(23|0x80) 	/* SET_WR_BLK_ERASE_COUNT (SDC) */
-#define CMD24 					(24) 		/* WRITE_BLOCK */
-#define CMD25 					(25) 		/* WRITE_MULTIPLE_BLOCK */
-#define CMD41 					(41) 		/* SEND_OP_COND (ACMD) */
-#define CMD55 					(55) 		/* APP_CMD */
-#define CMD58 					(58) 		/* READ_OCR */
+#define CMD0                    (0)         /* GO_IDLE_STATE */
+#define CMD1                    (1)         /* SEND_OP_COND */
+#define ACMD41                  (41|0x80)   /* SEND_OP_COND (SDC) */
+#define CMD8                    (8)         /* SEND_IF_COND */
+#define CMD9                    (9)         /* SEND_CSD */
+#define CMD10                   (10)        /* SEND_CID */
+#define CMD12                   (12)        /* STOP_TRANSMISSION */
+#define ACMD13                  (13|0x80)   /* SD_STATUS (SDC) */
+#define CMD16                   (16)        /* SET_BLOCKLEN */
+#define CMD17                   (17)        /* READ_SINGLE_BLOCK */
+#define CMD18                   (18)        /* READ_MULTIPLE_BLOCK */
+#define CMD23                   (23)        /* SET_BLOCK_COUNT */
+#define ACMD23                  (23|0x80)   /* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24                   (24)        /* WRITE_BLOCK */
+#define CMD25                   (25)        /* WRITE_MULTIPLE_BLOCK */
+#define CMD41                   (41)        /* SEND_OP_COND (ACMD) */
+#define CMD55                   (55)        /* APP_CMD */
+#define CMD58                   (58)        /* READ_OCR */
 
 /* Exported functions ------------------------------------------------------- */
 rt_err_t efm_spiSd_init(void);
diff --git a/bsp/efm32/drv_timer.c b/bsp/efm32/drv_timer.c
index ccfb96ab0e..12e347544c 100644
--- a/bsp/efm32/drv_timer.c
+++ b/bsp/efm32/drv_timer.c
@@ -10,7 +10,7 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-01-18   onelife     Initial creation for EFM32
  * 2011-06-17   onelife     Modify init function for efm32lib v2 upgrading
  ******************************************************************************/
diff --git a/bsp/efm32/drv_usart.c b/bsp/efm32/drv_usart.c
index 7cfb50b0a7..c511a31475 100644
--- a/bsp/efm32/drv_usart.c
+++ b/bsp/efm32/drv_usart.c
@@ -34,9 +34,9 @@
  * 2011-12-20   onelife     Add 9-bit SPI mode support
  * 2011-12-20   onelife     Change SPI write format (same as SPI read)
  * 2011-12-20   onelife     Change USART status format
- * 2011-12-27	onelife		Utilize "USART_PRESENT", "USART_COUNT",
+ * 2011-12-27   onelife     Utilize "USART_PRESENT", "USART_COUNT",
  *  "UART_PRESENT" and "UART_COUNT"
- * 2012-05-16	onelife		Fix a bug in rt_hw_usart_init()
+ * 2012-05-16   onelife     Fix a bug in rt_hw_usart_init()
  ******************************************************************************/
 
 /***************************************************************************//**
diff --git a/bsp/efm32/enc28j60.h b/bsp/efm32/enc28j60.h
index 1351e145a3..1c97d9e10c 100644
--- a/bsp/efm32/enc28j60.h
+++ b/bsp/efm32/enc28j60.h
@@ -197,9 +197,9 @@
 #define MACON3_FRMLNEN   0x02
 #define MACON3_FULDPX    0x01
 // ENC28J60 MACON4 Register Bit Definitions
-#define	MACON4_DEFER	(1<<6)
-#define	MACON4_BPEN		(1<<5)
-#define	MACON4_NOBKOFF	(1<<4)
+#define MACON4_DEFER    (1<<6)
+#define MACON4_BPEN     (1<<5)
+#define MACON4_NOBKOFF  (1<<4)
 // ENC28J60 MICMD Register Bit Definitions
 #define MICMD_MIISCAN    0x02
 #define MICMD_MIIRD      0x01
@@ -218,12 +218,12 @@
 #define PHSTAT1_LLSTAT   0x0004
 #define PHSTAT1_JBSTAT   0x0002
 /* ENC28J60 PHY PHSTAT2 Register Bit Definitions */
-#define PHSTAT2_TXSTAT	(1 << 13)
-#define PHSTAT2_RXSTAT	(1 << 12)
-#define PHSTAT2_COLSTAT	(1 << 11)
-#define PHSTAT2_LSTAT	(1 << 10)
-#define PHSTAT2_DPXSTAT	(1 << 9)
-#define PHSTAT2_PLRITY	(1 << 5)
+#define PHSTAT2_TXSTAT  (1 << 13)
+#define PHSTAT2_RXSTAT  (1 << 12)
+#define PHSTAT2_COLSTAT (1 << 11)
+#define PHSTAT2_LSTAT   (1 << 10)
+#define PHSTAT2_DPXSTAT (1 << 9)
+#define PHSTAT2_PLRITY  (1 << 5)
 // ENC28J60 PHY PHCON2 Register Bit Definitions
 #define PHCON2_FRCLINK   0x4000
 #define PHCON2_TXDIS     0x2000
@@ -282,13 +282,13 @@
 #define RSV_GETBIT(x, y)        (((x) & RSV_BITMASK(y)) ? 1 : 0)
 
 // SPI operation codes
-#define ENC28J60_READ_CTRL_REG 		(0x00)
-#define ENC28J60_READ_BUF_MEM 		(0x20 | 0x1A)
-#define ENC28J60_WRITE_CTRL_REG 	(0x40)
-#define ENC28J60_WRITE_BUF_MEM 		(0x60 | 0x1A)
-#define ENC28J60_BIT_FIELD_SET 		(0x80)
-#define ENC28J60_BIT_FIELD_CLR 		(0xA0)
-#define ENC28J60_SOFT_RESET 		(0xE0 | 0x1F)
+#define ENC28J60_READ_CTRL_REG      (0x00)
+#define ENC28J60_READ_BUF_MEM       (0x20 | 0x1A)
+#define ENC28J60_WRITE_CTRL_REG     (0x40)
+#define ENC28J60_WRITE_BUF_MEM      (0x60 | 0x1A)
+#define ENC28J60_BIT_FIELD_SET      (0x80)
+#define ENC28J60_BIT_FIELD_CLR      (0xA0)
+#define ENC28J60_SOFT_RESET         (0xE0 | 0x1F)
 
 // The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata
 // buffer boundaries applied to internal 8K ram
@@ -296,17 +296,17 @@
 //
 
 // start with recbuf at 0/
-#define RXSTART_INIT	0x0
+#define RXSTART_INIT    0x0
 // receive buffer end
-#define RXSTOP_INIT		(0x1FFF - 0x0600 - 1)
+#define RXSTOP_INIT     (0x1FFF - 0x0600 - 1)
 // start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes)
 
-#define TXSTART_INIT	(0x1FFF - 0x0600)
+#define TXSTART_INIT    (0x1FFF - 0x0600)
 // stp TX buffer at end of mem
-#define TXSTOP_INIT		0x1FFF
+#define TXSTOP_INIT     0x1FFF
 
 // max frame length which the conroller will accept:
-#define MAX_FRAMELEN	1518
+#define MAX_FRAMELEN    1518
 
 void rt_hw_enc28j60_init(void);
 
diff --git a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
index bb7b7b571b..f6a53d04f9 100644
--- a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
+++ b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119.h
@@ -127,11 +127,11 @@ EMSTATUS DMD_setClippingArea(uint16_t xStart, uint16_t yStart,
                              uint16_t width, uint16_t height);
 EMSTATUS DMD_writeData(uint16_t x, uint16_t y,
                        const uint8_t data[], uint32_t numPixels);
-EMSTATUS DMD_writeDataRLE(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen, 
+EMSTATUS DMD_writeDataRLE(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
                           const uint8_t *data);
-EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen, 
-			      const uint8_t *data,
-			      int red, int green, int blue, int weight);
+EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
+                  const uint8_t *data,
+                  int red, int green, int blue, int weight);
 EMSTATUS DMD_readData(uint16_t x, uint16_t y,
                       uint8_t data[], uint32_t numPixels);
 EMSTATUS DMD_writeColor(uint16_t x, uint16_t y, uint8_t red,
diff --git a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
index 73ba5b4ab5..7925891f95 100644
--- a/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
+++ b/bsp/efm32/graphics/dmd/ssd2119/dmd_ssd2119_16bit.c
@@ -425,8 +425,8 @@ EMSTATUS DMD_writeData(uint16_t x, uint16_t y, const uint8_t data[],
 *  DMD_OK on success, otherwise error code
 ******************************************************************************/
 EMSTATUS DMD_writeDataRLEFade(uint16_t x, uint16_t y, uint16_t xlen, uint16_t ylen,
-			      const uint8_t *data,
-			      int red, int green, int blue, int weight)
+                  const uint8_t *data,
+                  int red, int green, int blue, int weight)
 {
    uint32_t color = 0;
    int xpos, ypos;
diff --git a/bsp/efm32/graphics/tftspi.h b/bsp/efm32/graphics/tftspi.h
index 1399fc552e..27e8ce8078 100644
--- a/bsp/efm32/graphics/tftspi.h
+++ b/bsp/efm32/graphics/tftspi.h
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	tftspi.h
- * @brief 	Stub functions of EFM32 LCD driver
+ * @file    tftspi.h
+ * @brief   Stub functions of EFM32 LCD driver
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,7 +10,7 @@
  *  LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2011-12-20   onelife     Initial creation for EFM32
  ******************************************************************************/
 #ifndef __TFTSPI_H__
diff --git a/bsp/efm32/hdl_interrupt.c b/bsp/efm32/hdl_interrupt.c
index de91a9f9a0..8017414e55 100644
--- a/bsp/efm32/hdl_interrupt.c
+++ b/bsp/efm32/hdl_interrupt.c
@@ -13,10 +13,10 @@
  * Date         Author      Notes
  * 2010-12-29   onelife     Initial creation for EFM32
  * 2011-07-12   onelife     Disable interrupts in GPIO handler
- * 2011-12-09	onelife		Add giant gecko support
+ * 2011-12-09   onelife     Add giant gecko support
  * 2011-12-09   onelife     Add UART module support
  * 2011-12-09   onelife     Add LEUART module support
- * 2011-12-27	onelife		Utilize "XXX_PRESENT" and "XXX_COUNT"
+ * 2011-12-27   onelife     Utilize "XXX_PRESENT" and "XXX_COUNT"
  ******************************************************************************/
 
 /* Includes ------------------------------------------------------------------*/
@@ -32,20 +32,20 @@
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 #ifdef RT_IRQHDL_DEBUG
-#define hdl_debug(format,args...) 			rt_kprintf(format, ##args)
+#define hdl_debug(format,args...)           rt_kprintf(format, ##args)
 #else
 #define hdl_debug(format,args...)
 #endif
 
 /* Private variables ---------------------------------------------------------*/
-efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2]	= {RT_NULL};
-efm32_irq_hook_t timerCbTable[TIMER_COUNT] 		= {RT_NULL};
+efm32_irq_hook_t dmaCbTable[DMA_CHAN_COUNT * 2] = {RT_NULL};
+efm32_irq_hook_t timerCbTable[TIMER_COUNT]      = {RT_NULL};
 #if defined(LETIMER_PRESENT)
 efm32_irq_hook_t letimerCbTable[LETIMER_COUNT]  = {RT_NULL};
 #endif
-efm32_irq_hook_t rtcCbTable[RTC_COUNT] 			= {RT_NULL};
-efm32_irq_hook_t gpioCbTable[16] 				= {RT_NULL};
-efm32_irq_hook_t acmpCbTable[ACMP_COUNT] 		= {RT_NULL};
+efm32_irq_hook_t rtcCbTable[RTC_COUNT]          = {RT_NULL};
+efm32_irq_hook_t gpioCbTable[16]                = {RT_NULL};
+efm32_irq_hook_t acmpCbTable[ACMP_COUNT]        = {RT_NULL};
 #if defined(USART_PRESENT)
  #if defined(UART_PRESENT)
 efm32_irq_hook_t usartCbTable[USART_COUNT * 2 + UART_COUNT * 2] = {RT_NULL};
@@ -57,7 +57,7 @@ efm32_irq_hook_t usartCbTable[USART_COUNT * 2]  = {RT_NULL};
 efm32_irq_hook_t leuartCbTable[LEUART_COUNT]    = {RT_NULL};
 #endif
 #if defined(I2C_PRESENT)
-efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
+efm32_irq_hook_t iicCbTable[I2C_COUNT]          = {RT_NULL};
 #endif
 
 /* Private function prototypes -----------------------------------------------*/
@@ -65,7 +65,7 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
 
 /***************************************************************************//**
  * @brief
- *	NMI exception handler
+ *  NMI exception handler
  *
  * @details
  *
@@ -73,12 +73,12 @@ efm32_irq_hook_t iicCbTable[I2C_COUNT] 			= {RT_NULL};
  ******************************************************************************/
 void NMI_Handler(void)
 {
-	hdl_debug("[NMI_Handler: NOP]\n");
+    hdl_debug("[NMI_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- *	Memory manage exception handler
+ *  Memory manage exception handler
  *
  * @details
  *
@@ -86,13 +86,13 @@ void NMI_Handler(void)
  ******************************************************************************/
 void MemManage_Handler(void)
 {
-	hdl_debug("[MemManage_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[MemManage_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Bus fault exception handler
+ *  Bus fault exception handler
  *
  * @details
  *
@@ -100,13 +100,13 @@ void MemManage_Handler(void)
  ******************************************************************************/
 void BusFault_Handler(void)
 {
-	hdl_debug("[BusFault_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[BusFault_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Usage fault exception handler
+ *  Usage fault exception handler
  *
  * @details
  *
@@ -114,13 +114,13 @@ void BusFault_Handler(void)
  ******************************************************************************/
 void UsageFault_Handler(void)
 {
-	hdl_debug("[UsageFault_Handler: infinite loop]\n");
-	while (1);
+    hdl_debug("[UsageFault_Handler: infinite loop]\n");
+    while (1);
 }
 
 /***************************************************************************//**
  * @brief
- *	Supervisor call exception handler
+ *  Supervisor call exception handler
  *
  * @details
  *
@@ -128,12 +128,12 @@ void UsageFault_Handler(void)
  ******************************************************************************/
 void SVC_Handler(void)
 {
-	hdl_debug("[SVC_Handler: NOP]\n");
+    hdl_debug("[SVC_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- *	 Debug monitor exception handler
+ *   Debug monitor exception handler
  *
  * @details
  *
@@ -141,12 +141,12 @@ void SVC_Handler(void)
  ******************************************************************************/
 void DebugMon_Handler(void)
 {
-	hdl_debug("[DebugMon_Handler: NOP]\n");
+    hdl_debug("[DebugMon_Handler: NOP]\n");
 }
 
 /***************************************************************************//**
  * @brief
- * 	System tick timer interrupt handler
+ *  System tick timer interrupt handler
  *
  * @details
  *
@@ -155,13 +155,13 @@ void DebugMon_Handler(void)
  ******************************************************************************/
 void SysTick_Handler(void)
 {
-	/* enter interrupt */
-	rt_interrupt_enter();
+    /* enter interrupt */
+    rt_interrupt_enter();
 
-	rt_tick_increase();
+    rt_tick_increase();
 
-	/* leave interrupt */
-	rt_interrupt_leave();
+    /* leave interrupt */
+    rt_interrupt_leave();
 }
 
 /*******************************************************************************
@@ -173,7 +173,7 @@ void SysTick_Handler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common DMA interrupt handler
+ *  Common DMA interrupt handler
  *
  * @details
  *
@@ -185,11 +185,11 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	/* invoke callback function */
-	if (dmaCbTable[channel].cbFunc != RT_NULL)
-	{
-		(dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr);
-	}
+    /* invoke callback function */
+    if (dmaCbTable[channel].cbFunc != RT_NULL)
+    {
+        (dmaCbTable[channel].cbFunc)(dmaCbTable[channel].userPtr);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -197,95 +197,95 @@ void DMA_IRQHandler_All(rt_uint32_t channel, rt_bool_t primary, void *user)
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer0 interrupt handler
+ *  Common Timer0 interrupt handler
  *
  * @details
- * 	This function handles Timer0 counter overflow interrupt request
+ *  This function handles Timer0 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER0_IRQHandler(void)
 {
-	if (TIMER0->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[0].cbFunc != RT_NULL)
-		{
-			(timerCbTable[0].cbFunc)(timerCbTable[0].userPtr);
-		}
+    if (TIMER0->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[0].cbFunc != RT_NULL)
+        {
+            (timerCbTable[0].cbFunc)(timerCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER0->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer1 interrupt handler
+ *  Common Timer1 interrupt handler
  *
  * @details
- * 	This function handles Timer1 counter overflow interrupt request
+ *  This function handles Timer1 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER1_IRQHandler(void)
 {
-	if (TIMER1->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[1].cbFunc != RT_NULL)
-		{
-			(timerCbTable[1].cbFunc)(timerCbTable[1].userPtr);
-		}
+    if (TIMER1->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[1].cbFunc != RT_NULL)
+        {
+            (timerCbTable[1].cbFunc)(timerCbTable[1].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER1->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common Timer2 interrupt handler
+ *  Common Timer2 interrupt handler
  *
  * @details
- * 	This function handles Timer2 counter overflow interrupt request
+ *  This function handles Timer2 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void TIMER2_IRQHandler(void)
 {
-	if (TIMER2->IF & TIMER_IF_OF)
-	{
-		/* invoke callback function */
-		if (timerCbTable[2].cbFunc != RT_NULL)
-		{
-			(timerCbTable[2].cbFunc)(timerCbTable[2].userPtr);
-		}
+    if (TIMER2->IF & TIMER_IF_OF)
+    {
+        /* invoke callback function */
+        if (timerCbTable[2].cbFunc != RT_NULL)
+        {
+            (timerCbTable[2].cbFunc)(timerCbTable[2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(TIMER2->IFC), _TIMER_IF_OF_SHIFT, 0x1UL);
+    }
 }
 
 #if defined(LETIMER_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common Low Energy Timer0 interrupt handler
+ *  Common Low Energy Timer0 interrupt handler
  *
  * @details
- * 	This function handles Timer0 counter overflow interrupt request
+ *  This function handles Timer0 counter overflow interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LETIMER0_IRQHandler(void)
 {
-	if (LETIMER0->IF & LETIMER_IF_UF)
-	{
+    if (LETIMER0->IF & LETIMER_IF_UF)
+    {
         /* enter interrupt */
         rt_interrupt_enter();
 
@@ -294,24 +294,24 @@ void LETIMER0_IRQHandler(void)
         /* leave interrupt */
         rt_interrupt_leave();
 
-		/* invoke callback function */
-/*		if (letimerCbTable[0].cbFunc != RT_NULL)
-		{
-			(letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr);
-		}
+        /* invoke callback function */
+/*      if (letimerCbTable[0].cbFunc != RT_NULL)
+        {
+            (letimerCbTable[0].cbFunc)(letimerCbTable[0].userPtr);
+        }
 */
-		/* clear interrupt */
-		BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(LETIMER0->IFC), _LETIMER_IF_UF_SHIFT, 0x1UL);
+    }
 }
 #endif
 
 /***************************************************************************//**
  * @brief
- * 	Common RTC interrupt handler
+ *  Common RTC interrupt handler
  *
  * @details
- * 	This function handles RTC counter overflow interrupt request
+ *  This function handles RTC counter overflow interrupt request
  *
  * @note
  *
@@ -321,14 +321,14 @@ void RTC_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (RTC->IF & RTC_IF_OF)
-	{
-		/* invoke callback function */
-		if (rtcCbTable[0].cbFunc != RT_NULL)
-		{
-			(rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr);
-		}
-	}
+    if (RTC->IF & RTC_IF_OF)
+    {
+        /* invoke callback function */
+        if (rtcCbTable[0].cbFunc != RT_NULL)
+        {
+            (rtcCbTable[0].cbFunc)(rtcCbTable[0].userPtr);
+        }
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -336,7 +336,7 @@ void RTC_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common even number GPIO interrupt handler
+ *  Common even number GPIO interrupt handler
  *
  * @details
  *
@@ -345,36 +345,36 @@ void RTC_IRQHandler(void)
  ******************************************************************************/
 void GPIO_EVEN_IRQHandler(void)
 {
-	rt_uint16_t flag, n;
-	rt_base_t level;
+    rt_uint16_t flag, n;
+    rt_base_t level;
 
-	/* Disable interrupt */
-	level = rt_hw_interrupt_disable();
+    /* Disable interrupt */
+    level = rt_hw_interrupt_disable();
     /* Enter ISR */
     rt_interrupt_enter();
 
-	 /* invoke callback function */
-	flag = (rt_uint16_t)(GPIO->IF & 0xFFFF);
-	for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2)
-	{
-		if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
-		{
-			(gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
-		}
-	}
+     /* invoke callback function */
+    flag = (rt_uint16_t)(GPIO->IF & 0xFFFF);
+    for ( n = 0; flag > 0; flag = flag >> 2, n = n + 2)
+    {
+        if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
+        {
+            (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
+        }
+    }
 
-	/* clear interrupt */
-	GPIO->IFC = 0x5555UL;
+    /* clear interrupt */
+    GPIO->IFC = 0x5555UL;
 
     /* Leave ISR */
-	rt_interrupt_leave();
-	/* Enable interrupt */
+    rt_interrupt_leave();
+    /* Enable interrupt */
     rt_hw_interrupt_enable(level);
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common odd number GPIO interrupt handler
+ *  Common odd number GPIO interrupt handler
  *
  * @details
  *
@@ -383,39 +383,39 @@ void GPIO_EVEN_IRQHandler(void)
  ******************************************************************************/
 void GPIO_ODD_IRQHandler(void)
 {
-	rt_uint16_t flag, n;
-	rt_base_t level;
+    rt_uint16_t flag, n;
+    rt_base_t level;
 
-	/* Disable interrupt */
-	level = rt_hw_interrupt_disable();
-	/* Enter ISR */
+    /* Disable interrupt */
+    level = rt_hw_interrupt_disable();
+    /* Enter ISR */
     rt_interrupt_enter();
 
-	 /* invoke callback function */
-	flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1;
-	for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2)
-	{
-		if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
-		{
-			(gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
-		}
-	}
+     /* invoke callback function */
+    flag = (rt_uint16_t)(GPIO->IF & 0xFFFF) >> 1;
+    for ( n = 1; flag > 0; flag = flag >> 2, n = n + 2)
+    {
+        if ((flag & 0x0001) && (gpioCbTable[n].cbFunc != RT_NULL))
+        {
+            (gpioCbTable[n].cbFunc)(gpioCbTable[n].userPtr);
+        }
+    }
 
-	/* clear interrupt */
-	GPIO->IFC = 0xAAAAUL;
+    /* clear interrupt */
+    GPIO->IFC = 0xAAAAUL;
 
     /* Leave ISR */
-	rt_interrupt_leave();
-	/* Enable interrupt */
+    rt_interrupt_leave();
+    /* Enable interrupt */
     rt_hw_interrupt_enable(level);
 }
 
 /***************************************************************************//**
  * @brief
- * 	Common ACMP interrupt handler
+ *  Common ACMP interrupt handler
  *
  * @details
- * 	This function handles ACMP edge trigger interrupt request
+ *  This function handles ACMP edge trigger interrupt request
  *
  * @note
  *
@@ -425,29 +425,29 @@ void ACMP0_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (ACMP0->IF & ACMP_IF_EDGE)
-	{
-		/* invoke callback function */
-		if (acmpCbTable[0].cbFunc != RT_NULL)
-		{
-			(acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr);
-		}
+    if (ACMP0->IF & ACMP_IF_EDGE)
+    {
+        /* invoke callback function */
+        if (acmpCbTable[0].cbFunc != RT_NULL)
+        {
+            (acmpCbTable[0].cbFunc)(acmpCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(ACMP0->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
+    }
 
-	if (ACMP1->IF & ACMP_IF_EDGE)
-	{
-		/* invoke callback function */
-		if (acmpCbTable[1].cbFunc != RT_NULL)
-		{
-			(acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr);
-		}
+    if (ACMP1->IF & ACMP_IF_EDGE)
+    {
+        /* invoke callback function */
+        if (acmpCbTable[1].cbFunc != RT_NULL)
+        {
+            (acmpCbTable[1].cbFunc)(acmpCbTable[1].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(ACMP1->IFC), _ACMP_IF_EDGE_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -456,10 +456,10 @@ void ACMP0_IRQHandler(void)
 #if defined(USART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common USART0 TX interrupt handler
+ *  Common USART0 TX interrupt handler
  *
  * @details
- * 	This function handles USART0 TX complete interrupt request
+ *  This function handles USART0 TX complete interrupt request
  *
  * @note
  *
@@ -469,17 +469,17 @@ void USART0_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART0->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[0].cbFunc != RT_NULL)
-		{
-			(usartCbTable[0].cbFunc)(usartCbTable[0].userPtr);
-		}
+    if (USART0->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[0].cbFunc != RT_NULL)
+        {
+            (usartCbTable[0].cbFunc)(usartCbTable[0].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART0->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -487,34 +487,34 @@ void USART0_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART0 RX interrupt handler
+ *  Common USART0 RX interrupt handler
  *
  * @details
- * 	This function handles USART0 RX data valid interrupt request
+ *  This function handles USART0 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART0_RX_IRQHandler(void)
 {
-	if (USART0->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[1].cbFunc != RT_NULL)
-		{
-			(usartCbTable[1].cbFunc)(usartCbTable[1].userPtr);
-		}
-	}
+    if (USART0->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[1].cbFunc != RT_NULL)
+        {
+            (usartCbTable[1].cbFunc)(usartCbTable[1].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(USART_PRESENT) && (USART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common USART1 TX interrupt handler
+ *  Common USART1 TX interrupt handler
  *
  * @details
- * 	This function handles USART1 TX complete interrupt request
+ *  This function handles USART1 TX complete interrupt request
  *
  * @note
  *
@@ -524,17 +524,17 @@ void USART1_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART1->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[2].cbFunc)(usartCbTable[2].userPtr);
-		}
+    if (USART1->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[2].cbFunc)(usartCbTable[2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART1->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -542,34 +542,34 @@ void USART1_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART1 RX interrupt handler
+ *  Common USART1 RX interrupt handler
  *
  * @details
- * 	This function handles USART1 RX data valid interrupt request
+ *  This function handles USART1 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART1_RX_IRQHandler(void)
 {
-	if (USART1->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[3].cbFunc != RT_NULL)
-		{
-			(usartCbTable[3].cbFunc)(usartCbTable[3].userPtr);
-		}
-	}
+    if (USART1->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[3].cbFunc != RT_NULL)
+        {
+            (usartCbTable[3].cbFunc)(usartCbTable[3].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(USART_PRESENT) && (USART_COUNT > 2))
 /***************************************************************************//**
  * @brief
- * 	Common USART2 TX interrupt handler
+ *  Common USART2 TX interrupt handler
  *
  * @details
- * 	This function handles USART2 TX complete interrupt request
+ *  This function handles USART2 TX complete interrupt request
  *
  * @note
  *
@@ -579,17 +579,17 @@ void USART2_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (USART2->IF & USART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[4].cbFunc != RT_NULL)
-		{
-			(usartCbTable[4].cbFunc)(usartCbTable[4].userPtr);
-		}
+    if (USART2->IF & USART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[4].cbFunc != RT_NULL)
+        {
+            (usartCbTable[4].cbFunc)(usartCbTable[4].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(USART2->IFC), _USART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -597,34 +597,34 @@ void USART2_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common USART2 RX interrupt handler
+ *  Common USART2 RX interrupt handler
  *
  * @details
- * 	This function handles USART2 RX data valid interrupt request
+ *  This function handles USART2 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void USART2_RX_IRQHandler(void)
 {
-	if (USART2->IF & USART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[5].cbFunc != RT_NULL)
-		{
-			(usartCbTable[5].cbFunc)(usartCbTable[5].userPtr);
-		}
-	}
+    if (USART2->IF & USART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[5].cbFunc != RT_NULL)
+        {
+            (usartCbTable[5].cbFunc)(usartCbTable[5].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(UART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common UART0 TX interrupt handler
+ *  Common UART0 TX interrupt handler
  *
  * @details
- * 	This function handles UART0 TX complete interrupt request
+ *  This function handles UART0 TX complete interrupt request
  *
  * @note
  *
@@ -634,17 +634,17 @@ void UART0_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (UART0->IF & UART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr);
-		}
+    if (UART0->IF & UART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2].cbFunc)(usartCbTable[USART_COUNT * 2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(UART0->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -652,34 +652,34 @@ void UART0_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common UART0 RX interrupt handler
+ *  Common UART0 RX interrupt handler
  *
  * @details
- * 	This function handles UART0 RX data valid interrupt request
+ *  This function handles UART0 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void UART0_RX_IRQHandler(void)
 {
-	if (UART0->IF & UART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr);
-		}
-	}
+    if (UART0->IF & UART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 1].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 1].cbFunc)(usartCbTable[USART_COUNT * 2 + 1].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(UART_PRESENT) && (UART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common UART1 TX interrupt handler
+ *  Common UART1 TX interrupt handler
  *
  * @details
- * 	This function handles UART1 TX complete interrupt request
+ *  This function handles UART1 TX complete interrupt request
  *
  * @note
  *
@@ -689,17 +689,17 @@ void UART1_TX_IRQHandler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-	if (UART1->IF & UART_IF_TXC)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr);
-		}
+    if (UART1->IF & UART_IF_TXC)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 2].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 2].cbFunc)(usartCbTable[USART_COUNT * 2 + 2].userPtr);
+        }
 
-		/* clear interrupt */
-		BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
-	}
+        /* clear interrupt */
+        BITBAND_Peripheral(&(UART1->IFC), _UART_IF_TXC_SHIFT, 0x1UL);
+    }
 
     /* leave interrupt */
     rt_interrupt_leave();
@@ -707,106 +707,106 @@ void UART1_TX_IRQHandler(void)
 
 /***************************************************************************//**
  * @brief
- * 	Common UART1 RX interrupt handler
+ *  Common UART1 RX interrupt handler
  *
  * @details
- * 	This function handles UART1 RX data valid interrupt request
+ *  This function handles UART1 RX data valid interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void UART1_RX_IRQHandler(void)
 {
-	if (UART1->IF & UART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL)
-		{
-			(usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr);
-		}
-	}
+    if (UART1->IF & UART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (usartCbTable[USART_COUNT * 2 + 3].cbFunc != RT_NULL)
+        {
+            (usartCbTable[USART_COUNT * 2 + 3].cbFunc)(usartCbTable[USART_COUNT * 2 + 3].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(LEUART_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common LEUART0 interrupt handler
+ *  Common LEUART0 interrupt handler
  *
  * @details
- * 	This function handles LEUART0 interrupt request
+ *  This function handles LEUART0 interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LEUART0_IRQHandler(void)
 {
-	if (LEUART0->IF & LEUART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (leuartCbTable[0].cbFunc != RT_NULL)
-		{
-			(leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr);
-		}
-	}
+    if (LEUART0->IF & LEUART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (leuartCbTable[0].cbFunc != RT_NULL)
+        {
+            (leuartCbTable[0].cbFunc)(leuartCbTable[0].userPtr);
+        }
+    }
 }
 #endif
 
 #if (defined(LEUART_PRESENT) && (LEUART_COUNT > 1))
 /***************************************************************************//**
  * @brief
- * 	Common LEUART1 interrupt handler
+ *  Common LEUART1 interrupt handler
  *
  * @details
- * 	This function handles LEUART1 interrupt request
+ *  This function handles LEUART1 interrupt request
  *
  * @note
  *
  ******************************************************************************/
 void LEUART1_IRQHandler(void)
 {
-	if (LEUART1->IF & LEUART_IF_RXDATAV)
-	{
-		/* invoke callback function */
-		if (leuartCbTable[1].cbFunc != RT_NULL)
-		{
-			(leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr);
-		}
-	}
+    if (LEUART1->IF & LEUART_IF_RXDATAV)
+    {
+        /* invoke callback function */
+        if (leuartCbTable[1].cbFunc != RT_NULL)
+        {
+            (leuartCbTable[1].cbFunc)(leuartCbTable[1].userPtr);
+        }
+    }
 }
 #endif
 
 #if defined(I2C_PRESENT)
 /***************************************************************************//**
  * @brief
- * 	Common IIC0 interrupt handler
+ *  Common IIC0 interrupt handler
  *
  * @details
- * 	This function handles IIC0 slave mode interrupt requests
+ *  This function handles IIC0 slave mode interrupt requests
  *
  * @note
  *
  ******************************************************************************/
 void I2C0_IRQHandler(void)
 {
-	if ((I2C0->IF & I2C_IF_ADDR) || \
-		(I2C0->IF & I2C_IF_RXDATAV) || \
-		(I2C0->IF & I2C_IF_SSTOP))
-	{
-		/* invoke callback function */
-		if (iicCbTable[0].cbFunc != RT_NULL)
-		{
-			(iicCbTable[0].cbFunc)(iicCbTable[0].userPtr);
-		}
-	}
+    if ((I2C0->IF & I2C_IF_ADDR) || \
+        (I2C0->IF & I2C_IF_RXDATAV) || \
+        (I2C0->IF & I2C_IF_SSTOP))
+    {
+        /* invoke callback function */
+        if (iicCbTable[0].cbFunc != RT_NULL)
+        {
+            (iicCbTable[0].cbFunc)(iicCbTable[0].userPtr);
+        }
+    }
 
-	I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP);
+    I2C_IntClear(I2C0, I2C_IFC_ADDR | I2C_IFC_SSTOP);
 }
 #endif
 
 /***************************************************************************//**
  * @brief
- * 	EFM32 common interrupt handlers register function
+ *  EFM32 common interrupt handlers register function
  *
  * @details
  *
@@ -815,42 +815,42 @@ void I2C0_IRQHandler(void)
  ******************************************************************************/
 void efm32_irq_hook_register(efm32_irq_hook_init_t *hook)
 {
-	switch (hook->type)
-	{
-	case efm32_irq_type_dma:
-		dmaCbTable[hook->unit].cbFunc = hook->cbFunc;
-		dmaCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    switch (hook->type)
+    {
+    case efm32_irq_type_dma:
+        dmaCbTable[hook->unit].cbFunc = hook->cbFunc;
+        dmaCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_rtc:
-		rtcCbTable[hook->unit].cbFunc = hook->cbFunc;
-		rtcCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_rtc:
+        rtcCbTable[hook->unit].cbFunc = hook->cbFunc;
+        rtcCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_timer:
-		timerCbTable[hook->unit].cbFunc = hook->cbFunc;
-		timerCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_timer:
+        timerCbTable[hook->unit].cbFunc = hook->cbFunc;
+        timerCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_letimer:
-		letimerCbTable[hook->unit].cbFunc = hook->cbFunc;
-		letimerCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_letimer:
+        letimerCbTable[hook->unit].cbFunc = hook->cbFunc;
+        letimerCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_gpio:
-		gpioCbTable[hook->unit].cbFunc = hook->cbFunc;
-		gpioCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_gpio:
+        gpioCbTable[hook->unit].cbFunc = hook->cbFunc;
+        gpioCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 
-	case efm32_irq_type_acmp:
-		acmpCbTable[hook->unit].cbFunc = hook->cbFunc;
-		acmpCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_acmp:
+        acmpCbTable[hook->unit].cbFunc = hook->cbFunc;
+        acmpCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #if defined(USART_PRESENT)
-	case efm32_irq_type_usart:
-		usartCbTable[hook->unit].cbFunc = hook->cbFunc;
-		usartCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_usart:
+        usartCbTable[hook->unit].cbFunc = hook->cbFunc;
+        usartCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #endif
 #if defined(LEUART_PRESENT)
     case efm32_irq_type_leuart:
@@ -859,17 +859,17 @@ void efm32_irq_hook_register(efm32_irq_hook_init_t *hook)
         break;
 #endif
 #if defined(I2C_PRESENT)
-	case efm32_irq_type_iic:
-		iicCbTable[hook->unit].cbFunc = hook->cbFunc;
-		iicCbTable[hook->unit].userPtr = hook->userPtr;
-		break;
+    case efm32_irq_type_iic:
+        iicCbTable[hook->unit].cbFunc = hook->cbFunc;
+        iicCbTable[hook->unit].userPtr = hook->userPtr;
+        break;
 #endif
-	default:
-		break;
-	}
+    default:
+        break;
+    }
 
-	hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \
-		hook->type, hook->unit, hook->cbFunc, hook->userPtr);
+    hdl_debug("Hook Registered: type: %s, unit: %x, cbFunc: %x, userPtr: %x\n", \
+        hook->type, hook->unit, hook->cbFunc, hook->userPtr);
 }
 
 /***************************************************************************//**
diff --git a/bsp/efm32/hdl_interrupt.h b/bsp/efm32/hdl_interrupt.h
index 01f7adf9f8..d2f73bda57 100644
--- a/bsp/efm32/hdl_interrupt.h
+++ b/bsp/efm32/hdl_interrupt.h
@@ -21,31 +21,31 @@
 /* Exported types ------------------------------------------------------------*/
 enum efm32_irq_hook_type_t
 {
-	efm32_irq_type_dma = 0,
-	efm32_irq_type_rtc,
-	efm32_irq_type_timer,
+    efm32_irq_type_dma = 0,
+    efm32_irq_type_rtc,
+    efm32_irq_type_timer,
     efm32_irq_type_letimer,
-	efm32_irq_type_gpio,
-	efm32_irq_type_acmp,
-	efm32_irq_type_usart,
-	efm32_irq_type_leuart,
-	efm32_irq_type_iic
+    efm32_irq_type_gpio,
+    efm32_irq_type_acmp,
+    efm32_irq_type_usart,
+    efm32_irq_type_leuart,
+    efm32_irq_type_iic
 };
 
 typedef void (*efm32_irq_callback_t)(rt_device_t device);
 
 typedef struct
 {
-	enum efm32_irq_hook_type_t type;
-	rt_uint8_t unit;
-	efm32_irq_callback_t cbFunc;
-	void *userPtr;
+    enum efm32_irq_hook_type_t type;
+    rt_uint8_t unit;
+    efm32_irq_callback_t cbFunc;
+    void *userPtr;
 } efm32_irq_hook_init_t;
 
 typedef struct
 {
-	efm32_irq_callback_t cbFunc;
-	void *userPtr;
+    efm32_irq_callback_t cbFunc;
+    void *userPtr;
 } efm32_irq_hook_t;
 
 /* Exported constants --------------------------------------------------------*/
diff --git a/bsp/efm32/httpd.c b/bsp/efm32/httpd.c
index c7094d509a..02c81be84d 100644
--- a/bsp/efm32/httpd.c
+++ b/bsp/efm32/httpd.c
@@ -1,8 +1,8 @@
 /***************************************************************************//**
- * @file 	httpd.c
- * @brief 	Simple http server demo application
+ * @file    httpd.c
+ * @brief   Simple http server demo application
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -10,8 +10,8 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-07-04	onelife		Derive from Energy Micro demo application
+ * Date         Author      Notes
+ * 2011-07-04   onelife     Derive from Energy Micro demo application
  ******************************************************************************/
 
 /**************************************************************************//**
@@ -94,29 +94,29 @@
 static int temp, vdd;
 static char indexdata[700];
 static const char indexdata1[] =
-	"HTTP/1.0 200 OK\r\n\
-	Content-type: text/html\r\n\
-	Pragma: no-cache\r\n\
-	Refresh: 5\r\n\
-	\r\n\
-	<html>\
-	<head><title>EFM32 HTTPD DEMO</title><head>\
-	<body>\
-	<h1>This is a simple http server</h1>\
-	<br><br><B>Ethernet controller: ENC28J60</B>\
-	<br><br><B>Refreshing timers: ";
+    "HTTP/1.0 200 OK\r\n\
+    Content-type: text/html\r\n\
+    Pragma: no-cache\r\n\
+    Refresh: 5\r\n\
+    \r\n\
+    <html>\
+    <head><title>EFM32 HTTPD DEMO</title><head>\
+    <body>\
+    <h1>This is a simple http server</h1>\
+    <br><br><B>Ethernet controller: ENC28J60</B>\
+    <br><br><B>Refreshing timers: ";
 
 static const char indexdata2[] =
-	"<br><br><B>Current Vdd: ";
+    "<br><br><B>Current Vdd: ";
 
 static const char indexdata3[] =
-	" V</B>\
-	<br><br><B>Current temperature: ";
+    " V</B>\
+    <br><br><B>Current temperature: ";
 
 static const char indexdata4[] =
-	" C</B>\
-	</body>\
-	</html>";
+    " C</B>\
+    </body>\
+    </html>";
 
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
@@ -169,9 +169,9 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err
         counter++;
       }
 
-	  vdd = rt_hw_get_vdd();
-	  rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100);
-	  counter += 4;
+      vdd = rt_hw_get_vdd();
+      rt_sprintf(&indexdata[counter], "%1d.%02d", vdd / 100, vdd % 100);
+      counter += 4;
 
       for (i = 0; i < sizeof(indexdata3) - 1; i++)
       {
@@ -179,15 +179,15 @@ static err_t http_recv(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err
         counter++;
       }
 
-	  temp = rt_hw_get_temp();
+      temp = rt_hw_get_temp();
       /*Set temperature sign*/
       if (temp < 0)
       {
         indexdata[counter] = '-';
         counter++;
       }
-	  rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100);
-	  counter += 5;
+      rt_sprintf(&indexdata[counter], "%02d.%02d\n", temp / 100, temp % 100);
+      counter += 5;
 
       for (i = 0; i < sizeof(indexdata4); i++)
       {
diff --git a/bsp/efm32/mma7455l.h b/bsp/efm32/mma7455l.h
index 2ea2cdf34e..c746fd45da 100644
--- a/bsp/efm32/mma7455l.h
+++ b/bsp/efm32/mma7455l.h
@@ -1,9 +1,9 @@
 /***************************************************************************//**
- * @file 	mma7455l.c
- * @brief 	Header file of Freescale MMA7455L 3 axis Low-g digital output
+ * @file    mma7455l.c
+ * @brief   Header file of Freescale MMA7455L 3 axis Low-g digital output
  *  accelerometer
  *  COPYRIGHT (C) 2012, RT-Thread Development Team
- * @author 	onelife
+ * @author  onelife
  * @version 1.0
  *******************************************************************************
  * @section License
@@ -11,101 +11,101 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
- * 2011-08-02	onelife		Initial creation
+ * Date         Author      Notes
+ * 2011-08-02   onelife     Initial creation
  ******************************************************************************/
 #ifndef __MMA7455L_H__
 #define __MMA7455L_H__
 
-#define XOUTL 		0x00 	//00  10 bits output value X LSB (Read only)
-#define XOUTH 		0x01 	//01  10 bits output value X MSB (Read only)
-#define YOUTL 		0x02 	//02  10 bits output value Y LSB (Read only)
-#define YOUTH 		0x03 	//03  10 bits output value Y MSB (Read only)
-#define ZOUTL 		0x04 	//04  10 bits output value Z LSB (Read only)
-#define ZOUTH 		0x05 	//05  10 bits output value Z MSB (Read only)
-#define XOUT8 		0x06 	//06   8 bits Output value X (Read only)
-#define YOUT8 		0x07 	//07   8 bits Output value Y (Read only)
-#define ZOUT8 		0x08 	//08   8 bits Output value Z (Read only)
-#define STATUS 		0x09 	//09  Status registers (Read only)
-#define DETSRC 		0x0A 	//10  Detection source registers (Read only)
-#define TOUT 		0x0B 	//11  Temperature output value (Optional)
-#define RESERVED1 	0x0C 	//12  Reserved
-#define I2CAD 		0x0D 	//13  I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write)
-#define USRINF 		0x0E 	//14  User information  (Optional, Read only)
-#define WHOAMI 		0x0F 	//15  Who am I value (Optional, Read only)
-#define XOFFL 		0x10 	//16  Offset drift X value (LSB) (Read/Write)
-#define XOFFH 		0x11 	//17  Offset drift X value (MSB) (Read/Write)
-#define YOFFL 		0x12 	//18  Offset drift Y value (LSB) (Read/Write)
-#define YOFFH 		0x13 	//19  Offset drift Y value (MSB) (Read/Write)
-#define ZOFFL 		0x14 	//20  Offset drift Z value (LSB) (Read/Write)
-#define ZOFFH 		0x15 	//21  Offset drift Z value (MSB) (Read/Write)
-#define MCTL  		0x16 	//22  Mode control (Read/Write)
-#define INTRST 		0x17 	//23  Interrupt latch reset (Read/Write)
-#define CTL1 		0x18 	//24  Control 1 (Read/Write)
-#define CTL2 		0x19 	//25  Control 2 (Read/Write)
-#define LDTH 		0x1A 	//26  Level detection threshold limit value (Read/Write)
-#define PDTH 		0x1B 	//27  Pulse detection threshold limit value (Read/Write)
-#define PW 			0x1C 	//28  Pulse duration value (Read/Write)
-#define LT 			0x1D 	//29  Latency time value  (Read/Write)
-#define TW 			0x1E 	//30  Time window for second pulse value(Read/Write)
-#define RESERVED2 	0x1F 	//31 Reserved
+#define XOUTL       0x00    //00  10 bits output value X LSB (Read only)
+#define XOUTH       0x01    //01  10 bits output value X MSB (Read only)
+#define YOUTL       0x02    //02  10 bits output value Y LSB (Read only)
+#define YOUTH       0x03    //03  10 bits output value Y MSB (Read only)
+#define ZOUTL       0x04    //04  10 bits output value Z LSB (Read only)
+#define ZOUTH       0x05    //05  10 bits output value Z MSB (Read only)
+#define XOUT8       0x06    //06   8 bits Output value X (Read only)
+#define YOUT8       0x07    //07   8 bits Output value Y (Read only)
+#define ZOUT8       0x08    //08   8 bits Output value Z (Read only)
+#define STATUS      0x09    //09  Status registers (Read only)
+#define DETSRC      0x0A    //10  Detection source registers (Read only)
+#define TOUT        0x0B    //11  Temperature output value (Optional)
+#define RESERVED1   0x0C    //12  Reserved
+#define I2CAD       0x0D    //13  I2C device address (Bit[6:0]: Read only, Bit[7]: Read/Write)
+#define USRINF      0x0E    //14  User information  (Optional, Read only)
+#define WHOAMI      0x0F    //15  Who am I value (Optional, Read only)
+#define XOFFL       0x10    //16  Offset drift X value (LSB) (Read/Write)
+#define XOFFH       0x11    //17  Offset drift X value (MSB) (Read/Write)
+#define YOFFL       0x12    //18  Offset drift Y value (LSB) (Read/Write)
+#define YOFFH       0x13    //19  Offset drift Y value (MSB) (Read/Write)
+#define ZOFFL       0x14    //20  Offset drift Z value (LSB) (Read/Write)
+#define ZOFFH       0x15    //21  Offset drift Z value (MSB) (Read/Write)
+#define MCTL        0x16    //22  Mode control (Read/Write)
+#define INTRST      0x17    //23  Interrupt latch reset (Read/Write)
+#define CTL1        0x18    //24  Control 1 (Read/Write)
+#define CTL2        0x19    //25  Control 2 (Read/Write)
+#define LDTH        0x1A    //26  Level detection threshold limit value (Read/Write)
+#define PDTH        0x1B    //27  Pulse detection threshold limit value (Read/Write)
+#define PW          0x1C    //28  Pulse duration value (Read/Write)
+#define LT          0x1D    //29  Latency time value  (Read/Write)
+#define TW          0x1E    //30  Time window for second pulse value(Read/Write)
+#define RESERVED2   0x1F    //31 Reserved
 
 /* For DETSRC */
-#define DETSRC_INT_1		 		(0x01 << 0)
-#define DETSRC_INT_2		 		(0x01 << 1)
-#define DETSRC_PULSE_Z		 		(0x01 << 2)
-#define DETSRC_PULSE_Y		 		(0x01 << 3)
-#define DETSRC_PULSE_X		 		(0x01 << 4)
-#define DETSRC_LEVEL_Z		 		(0x01 << 5)
-#define DETSRC_LEVEL_Y		 		(0x01 << 6)
-#define DETSRC_LEVEL_X		 		(0x01 << 7)
+#define DETSRC_INT_1                (0x01 << 0)
+#define DETSRC_INT_2                (0x01 << 1)
+#define DETSRC_PULSE_Z              (0x01 << 2)
+#define DETSRC_PULSE_Y              (0x01 << 3)
+#define DETSRC_PULSE_X              (0x01 << 4)
+#define DETSRC_LEVEL_Z              (0x01 << 5)
+#define DETSRC_LEVEL_Y              (0x01 << 6)
+#define DETSRC_LEVEL_X              (0x01 << 7)
 
 /* For MCTL */
-#define MCTL_SHIFT_MODE 			(0)
-#define MCTL_SHIFT_G 				(2)
-#define MCTL_MASK_MODE 				(0x03)
-#define MCTL_MASK_G 				(0x0c)
-#define MCTL_MODE_STANDBY 			(0x00 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_MEASUREMENT 		(0x01 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_LEVEL 			(0x02 << MCTL_SHIFT_MODE)
-#define MCTL_MODE_PULSE 			(0x03 << MCTL_SHIFT_MODE)
-#define MCTL_RANGE_8G				(0x00 << MCTL_SHIFT_G)
-#define MCTL_RANGE_4G				(0x02 << MCTL_SHIFT_G)
-#define MCTL_RANGE_2G				(0x01 << MCTL_SHIFT_G)
-#define MCTL_PIN_INT1				(0x01 << 6)
+#define MCTL_SHIFT_MODE             (0)
+#define MCTL_SHIFT_G                (2)
+#define MCTL_MASK_MODE              (0x03)
+#define MCTL_MASK_G                 (0x0c)
+#define MCTL_MODE_STANDBY           (0x00 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_MEASUREMENT       (0x01 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_LEVEL             (0x02 << MCTL_SHIFT_MODE)
+#define MCTL_MODE_PULSE             (0x03 << MCTL_SHIFT_MODE)
+#define MCTL_RANGE_8G               (0x00 << MCTL_SHIFT_G)
+#define MCTL_RANGE_4G               (0x02 << MCTL_SHIFT_G)
+#define MCTL_RANGE_2G               (0x01 << MCTL_SHIFT_G)
+#define MCTL_PIN_INT1               (0x01 << 6)
 
 /* For INTRST */
-#define INTRST_INT_1 				(0x01 << 0)
-#define INTRST_INT_2 				(0x01 << 1)
+#define INTRST_INT_1                (0x01 << 0)
+#define INTRST_INT_2                (0x01 << 1)
 
 /* For CTL1 */
-#define CTL1_SHIFT_INTPIN 			(0)
-#define CTL1_SHIFT_INT 				(1)
-#define CTL1_SHIFT_AXES 			(3)
-#define CTL1_SHIFT_THRESHOLD 		(6)
-#define CTL1_SHIFT_BANDWIDTH 		(7)
-#define CTL1_MASK_AXES 				(0x38)
-#define CTL1_INTPIN_INVERSE 		(0x01 << CTL1_SHIFT_INTPIN)
-#define CTL1_INT_LEVEL_PULSE 		(0x00 << CTL1_SHIFT_INT)
-#define CTL1_INT_PULSE_LEVEL 		(0x01 << CTL1_SHIFT_INT)
-#define CTL1_INT_SINGLE_DOUBLE 		(0x02 << CTL1_SHIFT_INT)
-#define CTL1_X_DISABLE 				(0x01 << CTL1_SHIFT_AXES)
-#define CTL1_Y_DISABLE 				(0x02 << CTL1_SHIFT_AXES)
-#define CTL1_Z_DISABLE 				(0x04 << CTL1_SHIFT_AXES)
-#define CTL1_THRESHOLD_ABSOLUTE		(0x00 << CTL1_SHIFT_THRESHOLD)
-#define CTL1_THRESHOLD_INTEGER		(0x01 << CTL1_SHIFT_THRESHOLD)
-#define CTL1_BANDWIDTH_62_5HZ 		(0x00 << CTL1_SHIFT_BANDWIDTH)
-#define CTL1_BANDWIDTH_125HZ 		(0x01 << CTL1_SHIFT_BANDWIDTH)
+#define CTL1_SHIFT_INTPIN           (0)
+#define CTL1_SHIFT_INT              (1)
+#define CTL1_SHIFT_AXES             (3)
+#define CTL1_SHIFT_THRESHOLD        (6)
+#define CTL1_SHIFT_BANDWIDTH        (7)
+#define CTL1_MASK_AXES              (0x38)
+#define CTL1_INTPIN_INVERSE         (0x01 << CTL1_SHIFT_INTPIN)
+#define CTL1_INT_LEVEL_PULSE        (0x00 << CTL1_SHIFT_INT)
+#define CTL1_INT_PULSE_LEVEL        (0x01 << CTL1_SHIFT_INT)
+#define CTL1_INT_SINGLE_DOUBLE      (0x02 << CTL1_SHIFT_INT)
+#define CTL1_X_DISABLE              (0x01 << CTL1_SHIFT_AXES)
+#define CTL1_Y_DISABLE              (0x02 << CTL1_SHIFT_AXES)
+#define CTL1_Z_DISABLE              (0x04 << CTL1_SHIFT_AXES)
+#define CTL1_THRESHOLD_ABSOLUTE     (0x00 << CTL1_SHIFT_THRESHOLD)
+#define CTL1_THRESHOLD_INTEGER      (0x01 << CTL1_SHIFT_THRESHOLD)
+#define CTL1_BANDWIDTH_62_5HZ       (0x00 << CTL1_SHIFT_BANDWIDTH)
+#define CTL1_BANDWIDTH_125HZ        (0x01 << CTL1_SHIFT_BANDWIDTH)
 
 /* For CTL2 */
-#define CTL1_SHIFT_LEVEL			(0)
-#define CTL1_SHIFT_PULSE			(1)
-#define CTL1_SHIFT_DRIVE			(2)
-#define CTL2_LEVEL_OR		 		(0x00 << CTL1_SHIFT_LEVEL)
-#define CTL2_LEVEL_AND		 		(0x01 << CTL1_SHIFT_LEVEL)
-#define CTL2_PULSE_OR		 		(0x00 << CTL1_SHIFT_PULSE)
-#define CTL2_PULSE_AND		 		(0x01 << CTL1_SHIFT_PULSE)
-#define CTL2_DRIVE_STANDARD	 		(0x00 << CTL1_SHIFT_DRIVE)
-#define CTL2_DRIVE_STRONG	 		(0x01 << CTL1_SHIFT_DRIVE)
+#define CTL1_SHIFT_LEVEL            (0)
+#define CTL1_SHIFT_PULSE            (1)
+#define CTL1_SHIFT_DRIVE            (2)
+#define CTL2_LEVEL_OR               (0x00 << CTL1_SHIFT_LEVEL)
+#define CTL2_LEVEL_AND              (0x01 << CTL1_SHIFT_LEVEL)
+#define CTL2_PULSE_OR               (0x00 << CTL1_SHIFT_PULSE)
+#define CTL2_PULSE_AND              (0x01 << CTL1_SHIFT_PULSE)
+#define CTL2_DRIVE_STANDARD         (0x00 << CTL1_SHIFT_DRIVE)
+#define CTL2_DRIVE_STRONG           (0x01 << CTL1_SHIFT_DRIVE)
 
 #endif /* __MMA7455L_H__ */
diff --git a/bsp/efm32/rtconfig.h b/bsp/efm32/rtconfig.h
index 58159f90b3..3f62ec7195 100644
--- a/bsp/efm32/rtconfig.h
+++ b/bsp/efm32/rtconfig.h
@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file    rtconfig.h
  * @brief   RT-Thread config file
- * 	COPYRIGHT (C) 2009, RT-Thread Development Team
+ *  COPYRIGHT (C) 2009, RT-Thread Development Team
  * @author
  * @version 1.0
  *******************************************************************************
@@ -22,23 +22,23 @@
 #define EFM32GG_DK3750
 
 /* RT_NAME_MAX */
-#define RT_NAME_MAX					(8)
+#define RT_NAME_MAX                 (8)
 
 /* RT_ALIGN_SIZE */
-#define RT_ALIGN_SIZE				(4)
+#define RT_ALIGN_SIZE               (4)
 
 /* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX		(32)
+#define RT_THREAD_PRIORITY_MAX      (32)
 
 /* Tick per Second */
-#define RT_TICK_PER_SECOND			(100)
+#define RT_TICK_PER_SECOND          (100)
 
 /* SECTION: RT_DEBUG */
 #define RT_DEBUG
 #define RT_DEBUG_COLOR
-//#define RT_DEBUG_MEM 				(1)
-//#define RT_DEBUG_SCHEDULER 			(1)
-//#define RT_DEBUG_IPC 				(1)
+//#define RT_DEBUG_MEM              (1)
+//#define RT_DEBUG_SCHEDULER            (1)
+//#define RT_DEBUG_IPC              (1)
 //#define THREAD_DEBUG
 //#define IRQ_DEBUG
 #define RT_USING_OVERFLOW_CHECK
@@ -69,9 +69,9 @@
 
 /* Using Software Timer */
 /* #define RT_USING_TIMER_SOFT */
-#define RT_TIMER_THREAD_PRIO		(4)
-#define RT_TIMER_THREAD_STACK_SIZE	(512)
-#define RT_TIMER_TICK_PER_SECOND	(10)
+#define RT_TIMER_THREAD_PRIO        (4)
+#define RT_TIMER_THREAD_STACK_SIZE  (512)
+#define RT_TIMER_TICK_PER_SECOND    (10)
 
 /* SECTION: IPC */
 /* Using Semaphore*/
@@ -134,10 +134,10 @@
 #define EFM32_SPI_CLK_MODE(mode)    (mode << 3) /* clock mode */
 
 #if defined(EFM32_G8XX_STK)
-//#define RT_USING_USART0				(0x0UL)
-//#define RT_USART0_SYNC_MODE			(EFM32_SPI_MASTER)
-//#define RT_USART0_NAME				"spi0"
-//#define RT_USART0_USING_DMA			(0x1UL)
+//#define RT_USING_USART0               (0x0UL)
+//#define RT_USART0_SYNC_MODE           (EFM32_SPI_MASTER)
+//#define RT_USART0_NAME                "spi0"
+//#define RT_USART0_USING_DMA           (0x1UL)
 #elif defined(EFM32_GXXX_DK)
 #define RT_USING_USART0             (0x2UL)
 #define RT_USART0_SYNC_MODE         (EFM32_SPI_MASTER | EFM32_SPI_AUTOCS | \
@@ -165,28 +165,28 @@
 #endif
 
 /* SECTION: IIC options */
-//#define RT_USING_IIC0				0x3UL
-#define RT_IIC0_NAME				"iic0"
+//#define RT_USING_IIC0             0x3UL
+#define RT_IIC0_NAME                "iic0"
 
 /* SECTION: ACMP options */
 //#define RT_USING_ACMP0
-#define RT_ACMP0_NAME 				"acmp0"
+#define RT_ACMP0_NAME               "acmp0"
 
 /* SECTION: ADC options */
 #define RT_USING_ADC0
-#define RT_ADC0_NAME 				"adc0"
+#define RT_ADC0_NAME                "adc0"
 #if defined(RT_USING_ADC0)
 #define RT_USING_MISC
 #endif
 
 /* SECTION: TIMER options */
-//#define RT_USING_TIMER2				(0x00) 		/* Continuous mode */
-#define RT_TIMER2_NAME				"tmr2"
+//#define RT_USING_TIMER2               (0x00)      /* Continuous mode */
+#define RT_TIMER2_NAME              "tmr2"
 
 /* SECTION: RTC options */
 #if (defined(EFM32_G8XX_STK) || defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750))
 #define RT_USING_RTC
-#define RT_RTC_NAME 				"rtc"
+#define RT_RTC_NAME                 "rtc"
 #endif
 
 /* SECTION: Serial options */
@@ -199,9 +199,9 @@
 #define EFM_LEUART1                 (0x21UL)
 
 #if defined(EFM32_G8XX_STK)
-#define RT_CONSOLE_DEVICE			(EFM_USART1)
+#define RT_CONSOLE_DEVICE           (EFM_USART1)
 #elif defined(EFM32_GXXX_DK)
-#define RT_CONSOLE_DEVICE			(EFM_USART1)
+#define RT_CONSOLE_DEVICE           (EFM_USART1)
 #elif defined(EFM32GG_DK3750)
  #if defined(EFM32GG_DK3750_USING_LEUART1)
  #define RT_CONSOLE_DEVICE          (EFM_LEUART1)
@@ -217,7 +217,7 @@
 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE			(128)
+#define RT_CONSOLEBUF_SIZE          (128)
 
 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -226,12 +226,12 @@
 #define FINSH_USING_DESCRIPTION
 
 /* SECTION: Peripheral devices */
-#define EFM32_INTERFACE_ADC 		(0)
-#define EFM32_INTERFACE_IIC 		(1)
-#define EFM32_INTERFACE_SPI 		(2)
+#define EFM32_INTERFACE_ADC         (0)
+#define EFM32_INTERFACE_IIC         (1)
+#define EFM32_INTERFACE_SPI         (2)
 #if (defined(EFM32_GXXX_DK) || defined(EFM32GG_DK3750))
-//#define EFM32_USING_ACCEL 			EFM32_INTERFACE_IIC	/* Three axis accelerometer */
-//#define EFM32_USING_SFLASH 							/* SPI Flash */
+//#define EFM32_USING_ACCEL             EFM32_INTERFACE_IIC /* Three axis accelerometer */
+//#define EFM32_USING_SFLASH                            /* SPI Flash */
 #define EFM32_USING_SPISD                       /* MicroSD card */
 //#define EFM32_USING_ETHERNET                    /* Ethernet controller */
 //#define EFM32_USING_LCD                         /* TFT LCD */
@@ -240,30 +240,30 @@
 
 #if defined(EFM32_USING_ACCEL)
 #if (EFM32_USING_ACCEL == EFM32_INTERFACE_ADC)
-#define ACCEL_USING_DEVICE_NAME 	RT_ADC0_NAME
-#define ACCEL_USING_DMA				(0x3UL) 			/* For multiple channels scan mode */
+#define ACCEL_USING_DEVICE_NAME     RT_ADC0_NAME
+#define ACCEL_USING_DMA             (0x3UL)             /* For multiple channels scan mode */
 #elif (EFM32_USING_ACCEL == EFM32_INTERFACE_IIC)
-#define ACCEL_USING_DEVICE_NAME 	RT_IIC0_NAME
+#define ACCEL_USING_DEVICE_NAME     RT_IIC0_NAME
 #endif
 #endif
 
 #if defined(EFM32_USING_SFLASH)
-#define SFLASH_USING_DEVICE_NAME 	RT_USART0_NAME
+#define SFLASH_USING_DEVICE_NAME    RT_USART0_NAME
 #endif
 
 #if defined(EFM32_USING_SPISD)
-#define SPISD_USING_DEVICE_NAME 	RT_USART0_NAME
-#define SPISD_DEVICE_NAME 			"spiSd"
+#define SPISD_USING_DEVICE_NAME     RT_USART0_NAME
+#define SPISD_DEVICE_NAME           "spiSd"
 #endif
 
 #if defined(EFM32_USING_ETHERNET)
  #if defined(EFM32_GXXX_DK)
- #define ETH_USING_DEVICE_NAME 		RT_USART2_NAME
+ #define ETH_USING_DEVICE_NAME      RT_USART2_NAME
  #elif defined(EFM32GG_DK3750)
- #define ETH_USING_DEVICE_NAME 		RT_USART1_NAME
+ #define ETH_USING_DEVICE_NAME      RT_USART1_NAME
  #endif
-#define ETH_DEVICE_NAME 			"spiEth"
-#define ETH_ADDR_DEFAULT 			{0x00, 0x01, 0x02, 0x03, 0x04, 0x05}
+#define ETH_DEVICE_NAME             "spiEth"
+#define ETH_ADDR_DEFAULT            {0x00, 0x01, 0x02, 0x03, 0x04, 0x05}
 #endif
 
 /* SECTION: device filesystem */
@@ -271,9 +271,9 @@
 #define RT_USING_DFS
 /* the max number of mounted filesystem */
 #define DFS_FILESYSTEMS_MAX         (2)
-/* the max number of opened files 		*/
+/* the max number of opened files       */
 #define DFS_FD_MAX                  (4)
-/* the max number of cached sector 		*/
+/* the max number of cached sector      */
 #define DFS_CACHE_MAX_NUM           (4)
 #endif /* defined(RT_USING_NEWLIB) || defined(EFM32_USING_SPISD) */
 #if defined(EFM32_USING_SPISD)
@@ -288,8 +288,8 @@
 #if defined(EFM32_USING_ETHERNET)
 #define EFM32_USING_ETH_HTTPD
 //#define EFM32_USING_ETH_UTILS
-//#define hostName 					"onelife.dyndns.org"
-//#define userPwdB64 					"dXNlcjpwYXNzd2Q="
+//#define hostName                  "onelife.dyndns.org"
+//#define userPwdB64                    "dXNlcjpwYXNzd2Q="
 
 //#define RT_USING_LWIP
 //#define RT_USING_NETUTILS
@@ -308,37 +308,37 @@
 //#define RT_LWIP_DNS
 
 /* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM			(2)
+#define RT_LWIP_TCP_PCB_NUM         (2)
 
 /* ip address of target*/
-#define RT_LWIP_IPADDR0				(192)
-#define RT_LWIP_IPADDR1				(168)
-#define RT_LWIP_IPADDR2				(1)
-#define RT_LWIP_IPADDR3				(118)
+#define RT_LWIP_IPADDR0             (192)
+#define RT_LWIP_IPADDR1             (168)
+#define RT_LWIP_IPADDR2             (1)
+#define RT_LWIP_IPADDR3             (118)
 /* gateway address of target*/
-#define RT_LWIP_GWADDR0				(192)
-#define RT_LWIP_GWADDR1				(168)
-#define RT_LWIP_GWADDR2				(1)
-#define RT_LWIP_GWADDR3				(1)
+#define RT_LWIP_GWADDR0             (192)
+#define RT_LWIP_GWADDR1             (168)
+#define RT_LWIP_GWADDR2             (1)
+#define RT_LWIP_GWADDR3             (1)
 /* mask address of target*/
-#define RT_LWIP_MSKADDR0 			(255)
-#define RT_LWIP_MSKADDR1 			(255)
-#define RT_LWIP_MSKADDR2 			(255)
-#define RT_LWIP_MSKADDR3 			(0)
+#define RT_LWIP_MSKADDR0            (255)
+#define RT_LWIP_MSKADDR1            (255)
+#define RT_LWIP_MSKADDR2            (255)
+#define RT_LWIP_MSKADDR3            (0)
 
 /* tcp thread options */
-#define RT_LWIP_TCPTHREAD_PRIORITY	(12)
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	(4)
-#define RT_LWIP_TCPTHREAD_STACKSIZE	(1024)
+#define RT_LWIP_TCPTHREAD_PRIORITY  (12)
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE (4)
+#define RT_LWIP_TCPTHREAD_STACKSIZE (1024)
 /* ethernet if thread options */
-#define RT_LWIP_ETHTHREAD_PRIORITY 	(15)
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	(4)
-#define RT_LWIP_ETHTHREAD_STACKSIZE	(512)
+#define RT_LWIP_ETHTHREAD_PRIORITY  (15)
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE (4)
+#define RT_LWIP_ETHTHREAD_STACKSIZE (512)
 #endif /* defined(EFM32_USING_ETHERNET) */
 
 /* SECTION: RTGUI support */
 #if defined(EFM32_USING_LCD)
-#define LCD_USING_DEVICE_NAME 	    RT_USART1_NAME
+#define LCD_USING_DEVICE_NAME       RT_USART1_NAME
 #define LCD_DEVICE_NAME             "lcd"
 /* using RTGUI support */
 // #define RT_USING_RTGUI
diff --git a/bsp/efm32/startup.c b/bsp/efm32/startup.c
index 9a70f1278a..d769bbf99c 100644
--- a/bsp/efm32/startup.c
+++ b/bsp/efm32/startup.c
@@ -10,12 +10,12 @@
  * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  *******************************************************************************
  * @section Change Logs
- * Date			Author		Notes
+ * Date         Author      Notes
  * 2006-08-31   Bernard     first implementation
  * 2010-12-29   onelife     Modify for EFM32
  * 2011-12-20   onelife     Add RTGUI initialization routine
  * 2012-02-21   onelife     Add energy management initialization routine
- * 2012-05-15	onelife		Modified to compatible with CMSIS v3
+ * 2012-05-15   onelife     Modified to compatible with CMSIS v3
  ******************************************************************************/
 
 /***************************************************************************//**
diff --git a/bsp/hc32f4a0/board/board.h b/bsp/hc32f4a0/board/board.h
index 927f7d78f2..a35747f13c 100644
--- a/bsp/hc32f4a0/board/board.h
+++ b/bsp/hc32f4a0/board/board.h
@@ -6,8 +6,8 @@
  * Change Logs:
  * Date           Author       Notes
  * 2020-10-30     CDT          first version
+ * 2021-01-18     CDT          MOdify SRAM_SIZE
  */
- 
 
 #ifndef __BOARD_H__
 #define __BOARD_H__
@@ -18,7 +18,7 @@
 
 /* board configuration */
 #define SRAM_BASE 0x1FFE0000
-#define SRAM_SIZE 0x20000
+#define SRAM_SIZE 0x80000
 #define SRAM_END (SRAM_BASE + SRAM_SIZE)
 
 /* High speed sram. */
diff --git a/bsp/hc32f4a0/drivers/drv_soft_i2c.c b/bsp/hc32f4a0/drivers/drv_soft_i2c.c
index 38258ba7ee..4ee69b8de2 100644
--- a/bsp/hc32f4a0/drivers/drv_soft_i2c.c
+++ b/bsp/hc32f4a0/drivers/drv_soft_i2c.c
@@ -6,9 +6,9 @@
  * Change Logs:
  * Date           Author       Notes
  * 2020-10-30     CDT          first version
+ * 2021-01-18     CDT          modify i2c gpio init
  */
 
-
 /*******************************************************************************
  * Include files
  ******************************************************************************/
@@ -65,10 +65,8 @@ static const struct hc32_soft_i2c_config soft_i2c_config[] =
 #endif
 };
 
-
 static struct hc32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
 
-
 /*******************************************************************************
  * Function implementation - global ('extern') and local ('static')
  ******************************************************************************/
@@ -81,8 +79,8 @@ static void hc32_i2c_gpio_init(struct hc32_i2c *i2c)
 {
     struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)i2c->ops.data;
 
-    rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT);
-    rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT);
+    rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT_OD);
+    rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT_OD);
 
     rt_pin_write(cfg->scl_pin, PIN_HIGH);
     rt_pin_write(cfg->sda_pin, PIN_HIGH);
@@ -98,8 +96,6 @@ static void hc32_set_sda(void *data, rt_int32_t state)
 {
     struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
 
-    rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT);
-
     if (state)
         rt_pin_write(cfg->sda_pin, PIN_HIGH);
     else
@@ -116,8 +112,6 @@ static void hc32_set_scl(void *data, rt_int32_t state)
 {
     struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
 
-    rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT);
-
     if (state)
         rt_pin_write(cfg->scl_pin, PIN_HIGH);
     else
@@ -133,8 +127,6 @@ static rt_int32_t hc32_get_sda(void *data)
 {
     struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
 
-    rt_pin_mode(cfg->sda_pin, PIN_MODE_INPUT);
-
     return rt_pin_read(cfg->sda_pin);
 }
 
@@ -147,8 +139,6 @@ static rt_int32_t hc32_get_scl(void *data)
 {
     struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data;
 
-    rt_pin_mode(cfg->scl_pin, PIN_MODE_INPUT);
-
     return rt_pin_read(cfg->scl_pin);
 }
 
@@ -210,7 +200,6 @@ int hc32_hw_i2c_init(void)
 }
 INIT_BOARD_EXPORT(hc32_hw_i2c_init);
 
-
 #endif /* RT_USING_I2C */
 
 /*******************************************************************************
diff --git a/bsp/nrf5x/nrf52832/rtconfig.py b/bsp/nrf5x/nrf52832/rtconfig.py
index 3be0db8de1..e8a959bc85 100644
--- a/bsp/nrf5x/nrf52832/rtconfig.py
+++ b/bsp/nrf5x/nrf52832/rtconfig.py
@@ -84,3 +84,11 @@ elif PLATFORM == 'armcc':
         CFLAGS += ' -O2'
 
     POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
diff --git a/bsp/nrf5x/nrf52840/rtconfig.py b/bsp/nrf5x/nrf52840/rtconfig.py
index 219d20d303..4ef29e332f 100644
--- a/bsp/nrf5x/nrf52840/rtconfig.py
+++ b/bsp/nrf5x/nrf52840/rtconfig.py
@@ -82,3 +82,11 @@ elif PLATFORM == 'armcc':
         CFLAGS += ' -O2'
 
     POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
diff --git a/bsp/nrf5x/tools/sdk_dist.py b/bsp/nrf5x/tools/sdk_dist.py
new file mode 100644
index 0000000000..d9fe5aa1f8
--- /dev/null
+++ b/bsp/nrf5x/tools/sdk_dist.py
@@ -0,0 +1,17 @@
+import os
+import sys
+import shutil
+cwd_path = os.getcwd()
+sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools'))
+
+# BSP dist function
+def dist_do_building(BSP_ROOT, dist_dir):
+    from mkdist import bsp_copy_files
+    import rtconfig
+
+    library_dir  = os.path.join(dist_dir, 'libraries')
+
+    print("=> copy nrf52 bsp libraries")
+    library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries')
+
+    bsp_copy_files(library_path, library_dir)
diff --git a/bsp/rx/ReadMe.txt b/bsp/rx/README.md
index 956e2e00a1..956e2e00a1 100644
--- a/bsp/rx/ReadMe.txt
+++ b/bsp/rx/README.md
diff --git a/bsp/rx/applications/application.c b/bsp/rx/applications/application.c
index 4a6e250429..2013a3c69a 100644
--- a/bsp/rx/applications/application.c
+++ b/bsp/rx/applications/application.c
@@ -1,11 +1,7 @@
 /*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -14,7 +10,7 @@
  */
 
 /**
- * @addtogroup STM32
+ * @addtogroup
  */
 /*@{*/
 
diff --git a/bsp/rx/applications/startup.c b/bsp/rx/applications/startup.c
index 4b195492f6..92d415c620 100644
--- a/bsp/rx/applications/startup.c
+++ b/bsp/rx/applications/startup.c
@@ -1,11 +1,7 @@
 /*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -90,7 +86,7 @@ int main(void)
 {
 
   rt_hw_system_freq_init();
-   
+
   __enable_interrupt();
     /* disable interrupt first */
     rt_hw_interrupt_disable();
diff --git a/bsp/rx/drivers/Uart.h b/bsp/rx/drivers/Uart.h
index 9354861ca3..cc8aeaf5df 100644
--- a/bsp/rx/drivers/Uart.h
+++ b/bsp/rx/drivers/Uart.h
@@ -1,3 +1,11 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
 
 #ifndef __UART_H__
 #define __UART_H__
diff --git a/bsp/rx/drivers/board.c b/bsp/rx/drivers/board.c
index 4e02325325..aa80014066 100644
--- a/bsp/rx/drivers/board.c
+++ b/bsp/rx/drivers/board.c
@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
 #include <rthw.h>
 #include <rtthread.h>
 #include "board.h"
@@ -17,7 +26,7 @@
  *
  */
 #pragma vector = VECT_CMT0_CMI0
-__interrupt 
+__interrupt
 void SysTick_Handler(void)
 {
    // __enable_interrupt();
@@ -56,7 +65,7 @@ void  rt_hw_systick_init(void)
 }
 
 void rt_hw_system_freq_init(void)
-{ 
+{
    /* Declare error flag */
   bool err = true;
 
@@ -69,15 +78,15 @@ void rt_hw_system_freq_init(void)
     24E6,
     PDL_NO_DATA
     );
-  /* 
+  /*
   Clock Description              Frequency
   ----------------------------------------
   Input Clock Frequency..............12MHz
-  Internal Clock Frequency...........96MHz    
+  Internal Clock Frequency...........96MHz
   Peripheral Clock Frequency.........48MHz
   External Bus Clock Frequency.......24MHz */
 
-  /* Halt in while loop when RPDL errors detected */    
+  /* Halt in while loop when RPDL errors detected */
   while (!err);
 }
 
@@ -86,8 +95,8 @@ void rt_hw_system_freq_init(void)
  */
 void rt_hw_board_init()
 {
-    
-    rt_hw_system_freq_init();               
+
+    rt_hw_system_freq_init();
     rt_hw_systick_init();
     rt_hw_uart_init();
 #ifdef RT_USING_CONSOLE
diff --git a/bsp/rx/drivers/board.h b/bsp/rx/drivers/board.h
index 870e805a99..117521d033 100644
--- a/bsp/rx/drivers/board.h
+++ b/bsp/rx/drivers/board.h
@@ -1,11 +1,21 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+
 #ifndef __BOARD_H__
 #define __BOARD_H__
 
 
-#define		XTAL_FREQUENCY (12000000L)
-#define		ICLK_MUL (8)
-#define		PCLK_MUL (4)
-#define		BCLK_MUL (2)
+#define     XTAL_FREQUENCY (12000000L)
+#define     ICLK_MUL (8)
+#define     PCLK_MUL (4)
+#define     BCLK_MUL (2)
 
 #define RX62N_SRAM_END 0x0000ffff
 
diff --git a/bsp/rx/drivers/uart.c b/bsp/rx/drivers/uart.c
index 9e304ac95c..37d65ba8c0 100644
--- a/bsp/rx/drivers/uart.c
+++ b/bsp/rx/drivers/uart.c
@@ -1,9 +1,11 @@
 /*
-*********************************************************************************************************
-* Filename      : uart.c
-*********************************************************************************************************
-*/
-
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
 
 #include <rthw.h>
 #include <rtthread.h>
@@ -22,18 +24,18 @@
 
 
                           /* Clock selection control */
-#define SCI_CKS_MIN		0
-#define SCI_CKS_MAX		3
-#define SCI_CKS_STEP	1
+#define SCI_CKS_MIN     0
+#define SCI_CKS_MAX     3
+#define SCI_CKS_STEP    1
 
 
-#define	IPR_ADDRESS(a) ((volatile unsigned char *)&ICU.IPR[IPR_SCI0_ + a])
+#define IPR_ADDRESS(a) ((volatile unsigned char *)&ICU.IPR[IPR_SCI0_ + a])
 //#define IER_ADDRESS(a) ((volatile unsigned char *)&(ICU.IER[IER_SCI0_ERI0 + a])/sizeof(unsigned char))
-#define	ERI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	IER_ADDRESS(a) ((volatile unsigned char *)&ICU.IER[IER_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	RXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_RXI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	TXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TXI0] + ((4 * a) / sizeof(unsigned char)) )
-#define	TEI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TEI0] + ((4 * a) / sizeof(unsigned char)) )
+#define ERI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
+#define IER_ADDRESS(a) ((volatile unsigned char *)&ICU.IER[IER_SCI0_ERI0] + ((4 * a) / sizeof(unsigned char)) )
+#define RXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_RXI0] + ((4 * a) / sizeof(unsigned char)) )
+#define TXI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TXI0] + ((4 * a) / sizeof(unsigned char)) )
+#define TEI_ADDRESS(a) ((volatile unsigned char *)&ICU.IR[IR_SCI0_TEI0] + ((4 * a) / sizeof(unsigned char)) )
 #define  RXI_DTCER_ADDRESS(a) (( volatile unsigned char *)&ICU.DTCER[IR_SCI0_RXI0]+ ((4*a)/sizeof(unsigned char)))
 #define  TXI_DTCER_ADDRESS(a) (( volatile unsigned char *)&ICU.DTCER[IR_SCI0_TXI0]+ ((4*a) / sizeof(unsigned char)))
 //#define SCI1_USE_B
@@ -44,8 +46,8 @@
 #define SourceClk 12000000
 #define rpdl_CGC_f_pclk SourceClk * 4
 /* Idle output options */
-#define SPACE	0
-#define MARK	1
+#define SPACE   0
+#define MARK    1
 
 typedef int UART_ID_Type;
 typedef int IRQn_Type;
@@ -55,14 +57,14 @@ typedef int IRQn_Type;
 struct rx_uart
 {
     UART_ID_Type UART;
-    volatile struct st_sci __sfr * sci;    
+    volatile struct st_sci __sfr * sci;
 };
 
 static rt_err_t rx_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
     #if 1
     struct rx_uart *uart;
-    
+
     unsigned char smr_copy;
     unsigned char semr_copy;
     unsigned char scr_copy;
@@ -81,7 +83,7 @@ static rt_err_t rx_configure(struct rt_serial_device *serial, struct serial_conf
     semr_copy = 0x00u;
     scmr_copy = 0x72u;
     brr_divider = 0;
-    
+
     switch (uart->UART) {
 case 0:
         SYSTEM.MSTPCRB.BIT.MSTPB31 = 0;
@@ -257,11 +259,11 @@ case 0:
     }
 
     /*parity*/
-    if (cfg->parity == PARITY_ODD) 
+    if (cfg->parity == PARITY_ODD)
         smr_copy |= BIT_5;
-        else if (cfg->parity == PARITY_EVEN) 
+        else if (cfg->parity == PARITY_EVEN)
             smr_copy |= BIT_4 | BIT_5;
-    
+
 
 
     brr_divider = rpdl_CGC_f_pclk / cfg->baud_rate;
@@ -304,13 +306,13 @@ case 0:
     }while (bit_interval_counter != 0);
 
     scr_copy = 0x00u;
-	
+
     /*enable rx an tx*/
     scr_copy |= BIT_5  | BIT_4 ;
 
     uart->sci->SCR.BYTE &= 0x5B;
     uart->sci->SCR.BYTE |= scr_copy;
-                             
+
     *(IPR_ADDRESS(uart->UART)) = 5;
     uart->sci->SSR.BYTE = 0xC0;
     uart->sci->SSR.BYTE &= INV_BIT_5;
@@ -363,9 +365,9 @@ case 0:
           break;
   }
 
-  flag |= PDL_SCI_ASYNC | 
-      PDL_SCI_TX_CONNECTED | 
-      PDL_SCI_RX_CONNECTED | 
+  flag |= PDL_SCI_ASYNC |
+      PDL_SCI_TX_CONNECTED |
+      PDL_SCI_RX_CONNECTED |
       PDL_SCI_CLK_INT_IO ;
   /* Configure the RS232 port */
   err &=    R_SCI_Create(
@@ -373,12 +375,12 @@ case 0:
     flag,
     cfg->baud_rate,
     5);
-                  
+
   uart->sci->SCR.BYTE |= BIT_4|BIT_5;
 
  __enable_interrupt();
     #endif
-                          
+
     switch (uart->UART) {
     case 0:
 
@@ -430,7 +432,7 @@ case 0:
 
         break;
     }
-    
+
     return RT_EOK;
 }
 
@@ -464,7 +466,7 @@ static int rx_putc(struct rt_serial_device *serial, char c)
     uart = (struct rx_uart *)serial->parent.user_data;
     while (uart->sci->SSR.BIT.TDRE == 0);
     uart->sci->TDR = c;
-    return 1; 
+    return 1;
 }
 
 static int rx_getc(struct rt_serial_device *serial)
@@ -528,15 +530,15 @@ void rt_hw_uart_init(void)
     config.parity    = PARITY_NONE;
     config.stop_bits = STOP_BITS_1;
     config.invert    = NRZ_NORMAL;
-	config.bufsz     = RT_SERIAL_RB_BUFSZ;
+    config.bufsz     = RT_SERIAL_RB_BUFSZ;
 
     serial2.ops    = &rx_uart_ops;
     serial2.config = config;
 
     /* register UART1 device */
     rt_hw_serial_register(&serial2, "uart2",
-                          RT_DEVICE_FLAG_RDWR | 
-                          RT_DEVICE_FLAG_INT_RX | 
+                          RT_DEVICE_FLAG_RDWR |
+                          RT_DEVICE_FLAG_INT_RX |
                           RT_DEVICE_FLAG_STREAM,
                           uart);
 #endif
diff --git a/bsp/rx/rtconfig.h b/bsp/rx/rtconfig.h
index 6f055dce1a..57524271da 100644
--- a/bsp/rx/rtconfig.h
+++ b/bsp/rx/rtconfig.h
@@ -3,16 +3,16 @@
 #define __RTTHREAD_CFG_H__
 
 /* RT_NAME_MAX*/
-#define RT_NAME_MAX	8
+#define RT_NAME_MAX 8
 
 /* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
+#define RT_ALIGN_SIZE   4
 
 /* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	32
+#define RT_THREAD_PRIORITY_MAX  32
 
 /* Tick per Second */
-#define RT_TICK_PER_SECOND	100
+#define RT_TICK_PER_SECOND  100
 
 /* SECTION: RT_DEBUG */
 /* Thread Debug */
@@ -27,9 +27,9 @@
 
 /* Using Software Timer */
 /* #define RT_USING_TIMER_SOFT */
-#define RT_TIMER_THREAD_PRIO		4
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	10
+#define RT_TIMER_THREAD_PRIO        4
+#define RT_TIMER_THREAD_STACK_SIZE  512
+#define RT_TIMER_TICK_PER_SECOND    10
 
 /* SECTION: IPC */
 /* Using Semaphore*/
@@ -72,9 +72,9 @@
 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE	        128
+#define RT_CONSOLEBUF_SIZE          128
 // <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
-#define RT_CONSOLE_DEVICE_NAME	    "uart2"
+#define RT_CONSOLE_DEVICE_NAME      "uart2"
 
 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -89,17 +89,17 @@
 /* Reentrancy (thread safe) of the FatFs module.  */
 #define RT_DFS_ELM_REENTRANT
 /* Number of volumes (logical drives) to be used. */
-#define RT_DFS_ELM_DRIVES			2
-/* #define RT_DFS_ELM_USE_LFN			1 */
-/* #define RT_DFS_ELM_CODE_PAGE			936 */
-#define RT_DFS_ELM_MAX_LFN			255
+#define RT_DFS_ELM_DRIVES           2
+/* #define RT_DFS_ELM_USE_LFN           1 */
+/* #define RT_DFS_ELM_CODE_PAGE         936 */
+#define RT_DFS_ELM_MAX_LFN          255
 /* Maximum sector size to be handled. */
 #define RT_DFS_ELM_MAX_SECTOR_SIZE  512
 
 /* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX			2
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					4
+#define DFS_FILESYSTEMS_MAX         2
+/* the max number of opened files       */
+#define DFS_FD_MAX                  4
 
 /* SECTION: lwip, a lighwight TCP/IP protocol stack */
 /* #define RT_USING_LWIP */
@@ -113,49 +113,49 @@
 #define RT_LWIP_DNS
 
 /* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
+#define RT_LWIP_TCP_PCB_NUM 5
 
 /* Using DHCP */
 /* #define RT_LWIP_DHCP */
 
 /* ip address of target*/
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
+#define RT_LWIP_IPADDR0 192
+#define RT_LWIP_IPADDR1 168
+#define RT_LWIP_IPADDR2 1
+#define RT_LWIP_IPADDR3 30
 
 /* gateway address of target*/
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
+#define RT_LWIP_GWADDR0 192
+#define RT_LWIP_GWADDR1 168
+#define RT_LWIP_GWADDR2 1
+#define RT_LWIP_GWADDR3 1
 
 /* mask address of target*/
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
+#define RT_LWIP_MSKADDR0    255
+#define RT_LWIP_MSKADDR1    255
+#define RT_LWIP_MSKADDR2    255
+#define RT_LWIP_MSKADDR3    0
 
 /* tcp thread options */
-#define RT_LWIP_TCPTHREAD_PRIORITY		12
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE		10
-#define RT_LWIP_TCPTHREAD_STACKSIZE		1024
+#define RT_LWIP_TCPTHREAD_PRIORITY      12
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE     10
+#define RT_LWIP_TCPTHREAD_STACKSIZE     1024
 
 /* ethernet if thread options */
-#define RT_LWIP_ETHTHREAD_PRIORITY		15
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE		10
-#define RT_LWIP_ETHTHREAD_STACKSIZE		512
+#define RT_LWIP_ETHTHREAD_PRIORITY      15
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE     10
+#define RT_LWIP_ETHTHREAD_STACKSIZE     512
 
 /* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF	8192
+#define RT_LWIP_TCP_SND_BUF 8192
 /* TCP receive window. */
-#define RT_LWIP_TCP_WND		8192
+#define RT_LWIP_TCP_WND     8192
 
 /* SECTION: RT-Thread/GUI */
 /* #define RT_USING_RTGUI */
 
 /* name length of RTGUI object */
-#define RTGUI_NAME_MAX		12
+#define RTGUI_NAME_MAX      12
 /* support 16 weight font */
 #define RTGUI_USING_FONT16
 /* support Chinese font */
@@ -171,7 +171,7 @@
 /* use mouse cursor */
 /* #define RTGUI_USING_MOUSE_CURSOR */
 /* default font size in RTGUI */
-#define RTGUI_DEFAULT_FONT_SIZE	16
+#define RTGUI_DEFAULT_FONT_SIZE 16
 
 /* image support */
 /* #define RTGUI_IMAGE_XPM */
diff --git a/bsp/simulator/.config b/bsp/simulator/.config
index 2e2423ea39..c7e94f08ad 100644
--- a/bsp/simulator/.config
+++ b/bsp/simulator/.config
@@ -72,8 +72,10 @@ CONFIG_RT_VER_NUM=0x40003
 #
 # RT-Thread Components
 #
-# CONFIG_RT_USING_COMPONENTS_INIT is not set
-# CONFIG_RT_USING_USER_MAIN is not set
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
 
 #
 # C++ features
@@ -133,8 +135,6 @@ CONFIG_RT_DFS_ELM_REENTRANT=y
 CONFIG_RT_USING_DFS_DEVFS=y
 # CONFIG_RT_USING_DFS_ROMFS is not set
 # CONFIG_RT_USING_DFS_RAMFS is not set
-# CONFIG_RT_USING_DFS_UFFS is not set
-# CONFIG_RT_USING_DFS_JFFS2 is not set
 
 #
 # Device Drivers
@@ -285,8 +285,6 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
@@ -301,6 +299,10 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_BTSTACK is not set
 # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
 # CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
 
 #
 # security packages
@@ -382,6 +384,8 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
@@ -409,6 +413,7 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
 # CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
 
 #
 # peripheral libraries and drivers
@@ -471,6 +476,23 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
 # CONFIG_PKG_USING_VDEVICE is not set
 # CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
 
 #
 # miscellaneous packages
@@ -502,25 +524,23 @@ CONFIG_RT_LIBC_USING_TIME=y
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
 # CONFIG_PKG_USING_KI is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
 
 #
-# games: games run on RT-Thread console
+# entertainment: terminal games and other interesting software packages
 #
 # CONFIG_PKG_USING_THREES is not set
 # CONFIG_PKG_USING_2048 is not set
 # CONFIG_PKG_USING_SNAKE is not set
 # CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_ACLOCK is not set
 # CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
 # CONFIG_PKG_USING_STATE_MACHINE is not set
 # CONFIG_PKG_USING_MCURSES is not set
 # CONFIG_PKG_USING_COWSAY is not set
+CONFIG_SOC_SIMULATOR=y
 CONFIG_RT_USING_DFS_WINSHAREDIR=y
diff --git a/bsp/simulator/Kconfig b/bsp/simulator/Kconfig
index 1832033b4e..c5e4618d76 100644
--- a/bsp/simulator/Kconfig
+++ b/bsp/simulator/Kconfig
@@ -18,8 +18,16 @@ config PKGS_DIR
 source "$RTT_DIR/Kconfig"
 source "$PKGS_DIR/Kconfig"
 
+config SOC_SIMULATOR
+    bool 
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
 if RT_USING_DFS
     config RT_USING_DFS_WINSHAREDIR
     bool "Enable shared file system between windows"
     default n
 endif
+
+
diff --git a/bsp/simulator/SConstruct b/bsp/simulator/SConstruct
index b9854bb343..e165ce6fef 100755
--- a/bsp/simulator/SConstruct
+++ b/bsp/simulator/SConstruct
@@ -86,6 +86,19 @@ def ObjRemove(objs, remove):
              objs.remove(item)
     return
 
+def ProjectRemove(group, remove):
+    global Projects
+    for item in Projects:
+        if item['name'] == group:
+            for src in item['src']:
+                if os.path.basename(str(src)) in remove:
+                    # print(type(src), os.path.basename(str(src)) )
+                    item['src'].remove(src)
+    return
+
+ObjRemove(objs, ['components.obj', 'components.o', 'components.c'])
+ProjectRemove('Kernel', ['components.obj', 'components.o', 'components.c'])
+
 # build program  -shared
 if GetDepend('RT_USING_MODULE'):
     # Remove module.c in $RTT_ROOT/src
diff --git a/bsp/simulator/applications/application.c b/bsp/simulator/applications/application.c
index dcbca14dee..7fb2109693 100755
--- a/bsp/simulator/applications/application.c
+++ b/bsp/simulator/applications/application.c
@@ -11,37 +11,8 @@
 #include <stdio.h>
 #include <board.h>
 
-extern int platform_init(void);
-extern int platform_post_init(void);
-extern int mnt_init(void);
-
-void rt_init_thread_entry(void *parameter)
+int main(void)
 {
     rt_kprintf("Hello RT-Thread!\n");
-
-    platform_init();
-    mnt_init();
-
-    platform_post_init();
-
-#if defined(PKG_USING_GUIENGINE) && defined(GUIENGINE_USING_DEMO)
-    {
-        extern int rt_gui_demo_init(void);
-        rt_gui_demo_init();
-    }
-#endif
-}
-
-int rt_application_init()
-{
-    rt_thread_t tid;
-
-    tid = rt_thread_create("init",
-                           rt_init_thread_entry, RT_NULL,
-                           2048, RT_THREAD_PRIORITY_MAX / 3, 20);
-
-    if (tid != RT_NULL)
-        rt_thread_startup(tid);
-
     return 0;
 }
diff --git a/bsp/simulator/applications/mnt.c b/bsp/simulator/applications/mnt.c
index 39879d5817..4401a5ed94 100644
--- a/bsp/simulator/applications/mnt.c
+++ b/bsp/simulator/applications/mnt.c
@@ -15,8 +15,6 @@
 
 int mnt_init(void)
 {
-    dfs_init();
-
 #ifdef RT_USING_DFS_WINSHAREDIR
     extern int dfs_win32_init(void);
     extern rt_err_t rt_win_sharedir_init(const char *name);
@@ -54,5 +52,5 @@ int mnt_init(void)
 
     return 0;
 }
-
+INIT_COMPONENT_EXPORT(mnt_init);
 #endif
diff --git a/bsp/simulator/applications/platform.c b/bsp/simulator/applications/platform.c
index a6bd636e4f..1b7127e370 100644
--- a/bsp/simulator/applications/platform.c
+++ b/bsp/simulator/applications/platform.c
@@ -13,8 +13,6 @@
 
 int platform_init(void)
 {
-    finsh_system_init();
-
 #ifdef RT_USING_LWIP
 #ifdef RT_USING_TAPNETIF
     tap_netif_hw_init();
@@ -39,6 +37,7 @@ int platform_init(void)
 
     return 0;
 }
+INIT_COMPONENT_EXPORT(platform_init);
 
 int platform_post_init(void)
 {
@@ -51,6 +50,6 @@ int platform_post_init(void)
         rt_hw_sdl_start();
     }
 #endif
-
     return 0;
 }
+INIT_COMPONENT_EXPORT(platform_post_init);
diff --git a/bsp/simulator/applications/startup.c b/bsp/simulator/applications/startup.c
deleted file mode 100644
index 7ae5374c77..0000000000
--- a/bsp/simulator/applications/startup.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2012-09-03     prife        first implementation
- */
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "board.h"
-
-/**
- * @addtogroup win32
- */
-
-/*@{*/
-
-extern int  rt_application_init(void);
-extern rt_uint8_t *heap;
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-    /* init board */
-    rt_hw_board_init();
-
-    /* show version */
-    rt_show_version();
-
-    /* init timer system */
-    rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-    /* init memory system */
-    rt_system_heap_init((void *)heap, (void *)&heap[RT_HEAP_SIZE - 1]);
-#endif
-
-    /* init scheduler system */
-    rt_system_scheduler_init();
-
-    /* init application */
-    rt_application_init();
-
-    /* init timer thread */
-    rt_system_timer_thread_init();
-
-    /* init idle thread */
-    rt_thread_idle_init();
-
-    /* start scheduler */
-    rt_system_scheduler_start();
-
-    /* never reach here */
-    return ;
-}
-
-int main(void)
-{
-    /* disable interrupt first */
-    rt_hw_interrupt_disable();
-
-    /* startup RT-Thread RTOS */
-    rtthread_startup();
-
-    return 0;
-}
-
-/*@}*/
diff --git a/bsp/simulator/drivers/board.c b/bsp/simulator/drivers/board.c
index b5037d6575..4facdfa1b2 100755
--- a/bsp/simulator/drivers/board.c
+++ b/bsp/simulator/drivers/board.c
@@ -18,7 +18,6 @@
 /**
  * @addtogroup simulator on win32
  */
-rt_uint8_t *heap;
 
 rt_uint8_t *rt_hw_sram_init(void)
 {
@@ -33,6 +32,10 @@ rt_uint8_t *rt_hw_sram_init(void)
         exit(1);
 #endif
     }
+#ifdef RT_USING_HEAP
+    /* init memory system */
+    rt_system_heap_init((void*)heap, (void*)&heap[RT_HEAP_SIZE - 1]);
+#endif
     return heap;
 }
 
@@ -87,10 +90,10 @@ FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_exit, __cmd_quit, exit rt-thread);
 /**
  * This function will initial win32
  */
-void rt_hw_board_init()
+int rt_hw_board_init(void)
 {
     /* init system memory */
-    heap = rt_hw_sram_init();
+    rt_hw_sram_init();
 
     uart_console_init();
 
@@ -101,5 +104,10 @@ void rt_hw_board_init()
 #if defined(RT_USING_CONSOLE)
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
 #endif
+    /* init board */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+    return 0;
 }
 /*@}*/
diff --git a/bsp/simulator/drivers/board.h b/bsp/simulator/drivers/board.h
index 1643b0de5a..7f2e2d2782 100644
--- a/bsp/simulator/drivers/board.h
+++ b/bsp/simulator/drivers/board.h
@@ -9,7 +9,7 @@
  */
 #ifndef __BOARD_H__
 #define __BOARD_H__
-void rt_hw_board_init(void);
+int rt_hw_board_init(void);
 rt_uint8_t *rt_hw_sram_init(void);
 
 /* SD Card init function */
diff --git a/bsp/simulator/drivers/sd_sim.c b/bsp/simulator/drivers/sd_sim.c
index 41c495403a..adc489be20 100755
--- a/bsp/simulator/drivers/sd_sim.c
+++ b/bsp/simulator/drivers/sd_sim.c
@@ -133,7 +133,6 @@ static rt_err_t rt_sdcard_control(rt_device_t dev, int cmd, void *args)
     return RT_EOK;
 }
 
-
 rt_err_t rt_hw_sdcard_init(const char *spi_device_name)
 {
     int size;
@@ -144,6 +143,11 @@ rt_err_t rt_hw_sdcard_init(const char *spi_device_name)
     device = &(sd->parent);
 
     lock = rt_mutex_create("lock", RT_IPC_FLAG_FIFO);
+    if (lock == RT_NULL) 
+    {
+        LOG_E("Create mutex in rt_hw_sdcard_init failed!");
+        return -RT_ERROR;
+    }
 
     /* open sd card file, if not exist, then create it  */
     sd->file = fopen(SDCARD_SIM, "rb+");
diff --git a/bsp/simulator/drivers/sdl_fb.c b/bsp/simulator/drivers/sdl_fb.c
index 986c3139de..7b25da9c3c 100755
--- a/bsp/simulator/drivers/sdl_fb.c
+++ b/bsp/simulator/drivers/sdl_fb.c
@@ -221,6 +221,10 @@ static void sdlfb_hw_init(void)
     rt_device_register(RT_DEVICE(&_device), "sdl", RT_DEVICE_FLAG_RDWR);
 
     sdllock = rt_mutex_create("fb", RT_IPC_FLAG_FIFO);
+    if (sdllock == RT_NULL) 
+    {
+        LOG_E("Create mutex for sdlfb failed!");
+    }
 }
 
 #ifdef _WIN32
diff --git a/bsp/simulator/rtconfig.h b/bsp/simulator/rtconfig.h
index 9765b4c2e1..6b5f356593 100755
--- a/bsp/simulator/rtconfig.h
+++ b/bsp/simulator/rtconfig.h
@@ -43,6 +43,10 @@
 
 /* RT-Thread Components */
 
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
 
 /* C++ features */
 
@@ -157,14 +161,18 @@
 /* peripheral libraries and drivers */
 
 
+/* AI packages */
+
+
 /* miscellaneous packages */
 
 
 /* samples: kernel and components samples */
 
 
-/* games: games run on RT-Thread console */
+/* entertainment: terminal games and other interesting software packages */
 
+#define SOC_SIMULATOR
 #define RT_USING_DFS_WINSHAREDIR
 #include "rtconfig_project.h"
 
diff --git a/bsp/stm32/libraries/STM32WBxx_HAL/SConscript b/bsp/stm32/libraries/STM32WBxx_HAL/SConscript
index e4fe5d3259..75372b529e 100644
--- a/bsp/stm32/libraries/STM32WBxx_HAL/SConscript
+++ b/bsp/stm32/libraries/STM32WBxx_HAL/SConscript
@@ -24,6 +24,7 @@ STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c
 STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c
 STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rng.c
 STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
+STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c
 ''')
   
 if GetDepend(['RT_USING_SERIAL']):
diff --git a/bsp/stm32/stm32f072-st-nucleo/applications/main.c b/bsp/stm32/stm32f072-st-nucleo/applications/main.c
index 486ed61283..1d48ded64d 100644
--- a/bsp/stm32/stm32f072-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f072-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f091-st-nucleo/applications/main.c b/bsp/stm32/stm32f091-st-nucleo/applications/main.c
index 9783d01e55..61981d49b0 100644
--- a/bsp/stm32/stm32f091-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f091-st-nucleo/applications/main.c
@@ -17,19 +17,16 @@
 
 int main(void)
 {
-    int count = 1;
-
     /* set LED2 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
 
 
diff --git a/bsp/stm32/stm32f103-atk-nano/applications/main.c b/bsp/stm32/stm32f103-atk-nano/applications/main.c
index be493624c1..8569ce27bd 100644
--- a/bsp/stm32/stm32f103-atk-nano/applications/main.c
+++ b/bsp/stm32/stm32f103-atk-nano/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c
index 55c2b62023..8de9bd81e9 100644
--- a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c
+++ b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c
@@ -19,13 +19,12 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_pin_write(LED1_PIN, PIN_HIGH);
@@ -34,6 +33,4 @@ int main(void)
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-blue-pill/applications/main.c b/bsp/stm32/stm32f103-blue-pill/applications/main.c
index 9be4cd59b1..1fcf936a48 100644
--- a/bsp/stm32/stm32f103-blue-pill/applications/main.c
+++ b/bsp/stm32/stm32f103-blue-pill/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-dofly-M3S/applications/main.c b/bsp/stm32/stm32f103-dofly-M3S/applications/main.c
index 0ec4930664..3101374062 100644
--- a/bsp/stm32/stm32f103-dofly-M3S/applications/main.c
+++ b/bsp/stm32/stm32f103-dofly-M3S/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c b/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c
index dc4e9cbb7e..ce702bb417 100644
--- a/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c
+++ b/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c b/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c
index 7ddaa5ee96..e3078f4e82 100644
--- a/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c
+++ b/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c b/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c
index bf9e60aae9..a2ffe21b45 100644
--- a/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c
+++ b/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED4_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED4_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c b/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c
index 096b4df406..5ba5873b52 100644
--- a/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c
+++ b/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-onenet-nbiot/applications/main.c b/bsp/stm32/stm32f103-onenet-nbiot/applications/main.c
index be493624c1..8569ce27bd 100644
--- a/bsp/stm32/stm32f103-onenet-nbiot/applications/main.c
+++ b/bsp/stm32/stm32f103-onenet-nbiot/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f103-yf-ufun/applications/main.c b/bsp/stm32/stm32f103-yf-ufun/applications/main.c
index ffe4955e19..8f9c5c7a07 100644
--- a/bsp/stm32/stm32f103-yf-ufun/applications/main.c
+++ b/bsp/stm32/stm32f103-yf-ufun/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED3_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED3_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED3_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f107-uc-eval/applications/main.c b/bsp/stm32/stm32f107-uc-eval/applications/main.c
index 9dca242b10..9f1a27444d 100644
--- a/bsp/stm32/stm32f107-uc-eval/applications/main.c
+++ b/bsp/stm32/stm32f107-uc-eval/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f401-st-nucleo/applications/main.c b/bsp/stm32/stm32f401-st-nucleo/applications/main.c
index 48009f1c78..d4200202ed 100644
--- a/bsp/stm32/stm32f401-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f401-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c b/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c
index 47358c8a61..9f52445b11 100644
--- a/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c
+++ b/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f407-atk-explorer/applications/main.c b/bsp/stm32/stm32f407-atk-explorer/applications/main.c
index 2fc9307caf..9fb7ebf153 100644
--- a/bsp/stm32/stm32f407-atk-explorer/applications/main.c
+++ b/bsp/stm32/stm32f407-atk-explorer/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f407-st-discovery/applications/main.c b/bsp/stm32/stm32f407-st-discovery/applications/main.c
index 2651a75073..ecc3464e69 100644
--- a/bsp/stm32/stm32f407-st-discovery/applications/main.c
+++ b/bsp/stm32/stm32f407-st-discovery/applications/main.c
@@ -17,11 +17,10 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
diff --git a/bsp/stm32/stm32f410-st-nucleo/applications/main.c b/bsp/stm32/stm32f410-st-nucleo/applications/main.c
index 05ab0e2504..0de22d3ffd 100644
--- a/bsp/stm32/stm32f410-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f410-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f411-atk-nano/applications/main.c b/bsp/stm32/stm32f411-atk-nano/applications/main.c
index df457f4760..351b59dc19 100644
--- a/bsp/stm32/stm32f411-atk-nano/applications/main.c
+++ b/bsp/stm32/stm32f411-atk-nano/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f411-st-nucleo/applications/main.c b/bsp/stm32/stm32f411-st-nucleo/applications/main.c
index 0e109663ae..9f36615507 100644
--- a/bsp/stm32/stm32f411-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f411-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f411-weact-MiniF4/applications/main.c b/bsp/stm32/stm32f411-weact-MiniF4/applications/main.c
index be6a8af867..f28cc62dd2 100644
--- a/bsp/stm32/stm32f411-weact-MiniF4/applications/main.c
+++ b/bsp/stm32/stm32f411-weact-MiniF4/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f412-st-nucleo/applications/main.c b/bsp/stm32/stm32f412-st-nucleo/applications/main.c
index 2cf35c5bc6..3bc5104ea7 100644
--- a/bsp/stm32/stm32f412-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f412-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f413-st-nucleo/applications/main.c b/bsp/stm32/stm32f413-st-nucleo/applications/main.c
index 799dc6797d..ddd672e739 100644
--- a/bsp/stm32/stm32f413-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f413-st-nucleo/applications/main.c
@@ -23,16 +23,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f427-robomaster-a/applications/main.c b/bsp/stm32/stm32f427-robomaster-a/applications/main.c
index 6cef3cbb34..f63f29396c 100644
--- a/bsp/stm32/stm32f427-robomaster-a/applications/main.c
+++ b/bsp/stm32/stm32f427-robomaster-a/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f429-armfly-v6/applications/main.c b/bsp/stm32/stm32f429-armfly-v6/applications/main.c
index 21b7c14ec0..152a11bab1 100644
--- a/bsp/stm32/stm32f429-armfly-v6/applications/main.c
+++ b/bsp/stm32/stm32f429-armfly-v6/applications/main.c
@@ -15,20 +15,16 @@
 
 int main(void)
 {
-    int count = 1;
-
     HC574_SetPin(LED1,0);
     HC574_SetPin(LED2,0);
     HC574_SetPin(LED3,0);
     HC574_SetPin(LED4,0);
 
-    while (count++)
+    while (1)
     {
         HC574_SetPin(LED1,1);
         rt_thread_mdelay(500);
         HC574_SetPin(LED1,0);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f429-atk-apollo/applications/main.c b/bsp/stm32/stm32f429-atk-apollo/applications/main.c
index 6d19a46edb..609b4e63b4 100644
--- a/bsp/stm32/stm32f429-atk-apollo/applications/main.c
+++ b/bsp/stm32/stm32f429-atk-apollo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f429-fire-challenger/applications/main.c b/bsp/stm32/stm32f429-fire-challenger/applications/main.c
index 64e40b75c8..27c28e0cb2 100644
--- a/bsp/stm32/stm32f429-fire-challenger/applications/main.c
+++ b/bsp/stm32/stm32f429-fire-challenger/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f429-st-disco/applications/main.c b/bsp/stm32/stm32f429-st-disco/applications/main.c
index 992f2b5d74..48f43fd6fa 100644
--- a/bsp/stm32/stm32f429-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f429-st-disco/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f446-st-nucleo/applications/main.c b/bsp/stm32/stm32f446-st-nucleo/applications/main.c
index 897c6eec1c..b419a79449 100644
--- a/bsp/stm32/stm32f446-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f446-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED2 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f469-st-disco/applications/main.c b/bsp/stm32/stm32f469-st-disco/applications/main.c
index 759572d376..e5a331ad8c 100644
--- a/bsp/stm32/stm32f469-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f469-st-disco/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f746-st-disco/applications/main.c b/bsp/stm32/stm32f746-st-disco/applications/main.c
index 0024ce1c0a..d98649e9c6 100644
--- a/bsp/stm32/stm32f746-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f746-st-disco/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f767-atk-apollo/applications/main.c b/bsp/stm32/stm32f767-atk-apollo/applications/main.c
index 71e6132ea2..bec589c403 100644
--- a/bsp/stm32/stm32f767-atk-apollo/applications/main.c
+++ b/bsp/stm32/stm32f767-atk-apollo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f767-fire-challenger/applications/main.c b/bsp/stm32/stm32f767-fire-challenger/applications/main.c
index 4cf67f2e9e..3570c667c9 100644
--- a/bsp/stm32/stm32f767-fire-challenger/applications/main.c
+++ b/bsp/stm32/stm32f767-fire-challenger/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f767-st-nucleo/applications/main.c b/bsp/stm32/stm32f767-st-nucleo/applications/main.c
index a0967c1326..e270c27a91 100644
--- a/bsp/stm32/stm32f767-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32f767-st-nucleo/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32f769-st-disco/applications/main.c b/bsp/stm32/stm32f769-st-disco/applications/main.c
index d61afe14c3..396afa994a 100644
--- a/bsp/stm32/stm32f769-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f769-st-disco/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED1 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32g070-st-nucleo/applications/main.c b/bsp/stm32/stm32g070-st-nucleo/applications/main.c
index 5f22fcae65..a438b9e67d 100644
--- a/bsp/stm32/stm32g070-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32g070-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32g071-st-nucleo/applications/main.c b/bsp/stm32/stm32g071-st-nucleo/applications/main.c
index 5f22fcae65..a438b9e67d 100644
--- a/bsp/stm32/stm32g071-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32g071-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32g431-st-nucleo/applications/main.c b/bsp/stm32/stm32g431-st-nucleo/applications/main.c
index fa4fd35a6e..5524d24935 100644
--- a/bsp/stm32/stm32g431-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32g431-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED2 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32h743-atk-apollo/applications/main.c b/bsp/stm32/stm32h743-atk-apollo/applications/main.c
index 376d3c78ff..c52580b1b1 100644
--- a/bsp/stm32/stm32h743-atk-apollo/applications/main.c
+++ b/bsp/stm32/stm32h743-atk-apollo/applications/main.c
@@ -17,16 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32h743-st-nucleo/applications/main.c b/bsp/stm32/stm32h743-st-nucleo/applications/main.c
index 9a8ac51bb5..ef1884d3bc 100644
--- a/bsp/stm32/stm32h743-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32h743-st-nucleo/applications/main.c
@@ -17,16 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32h747-st-discovery/applications/main.c b/bsp/stm32/stm32h747-st-discovery/applications/main.c
index 3904f7b3bc..2a91e93091 100644
--- a/bsp/stm32/stm32h747-st-discovery/applications/main.c
+++ b/bsp/stm32/stm32h747-st-discovery/applications/main.c
@@ -17,16 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c b/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c
index b19e338dc5..90a52049e4 100644
--- a/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c
+++ b/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c
@@ -17,16 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32h750-artpi-h750/applications/main.c b/bsp/stm32/stm32h750-artpi-h750/applications/main.c
index 6ab088b624..d4b0bb98a6 100644
--- a/bsp/stm32/stm32h750-artpi-h750/applications/main.c
+++ b/bsp/stm32/stm32h750-artpi-h750/applications/main.c
@@ -17,16 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l010-st-nucleo/applications/main.c b/bsp/stm32/stm32l010-st-nucleo/applications/main.c
index 5f22fcae65..a438b9e67d 100644
--- a/bsp/stm32/stm32l010-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l010-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l053-st-nucleo/applications/main.c b/bsp/stm32/stm32l053-st-nucleo/applications/main.c
index 5f22fcae65..a438b9e67d 100644
--- a/bsp/stm32/stm32l053-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l053-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l412-st-nucleo/applications/main.c b/bsp/stm32/stm32l412-st-nucleo/applications/main.c
index b22a9d1ba3..296c33d352 100644
--- a/bsp/stm32/stm32l412-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l412-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LD4 pin mode to output */
     rt_pin_mode(LD4_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LD4_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LD4_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l431-BearPi/.config b/bsp/stm32/stm32l431-BearPi/.config
index 9ede141fd9..3f4c90a8ba 100644
--- a/bsp/stm32/stm32l431-BearPi/.config
+++ b/bsp/stm32/stm32l431-BearPi/.config
@@ -134,7 +134,12 @@ CONFIG_RT_USING_RTC=y
 # CONFIG_RT_USING_ALARM is not set
 # CONFIG_RT_USING_SOFT_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
-# CONFIG_RT_USING_SPI is not set
+CONFIG_RT_USING_SPI=y
+# CONFIG_RT_USING_QSPI is not set
+# CONFIG_RT_USING_SPI_MSD is not set
+# CONFIG_RT_USING_SFUD is not set
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
 CONFIG_RT_USING_WDT=y
 # CONFIG_RT_USING_AUDIO is not set
 # CONFIG_RT_USING_SENSOR is not set
@@ -316,6 +321,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
@@ -331,6 +337,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_CPU_USAGE is not set
 # CONFIG_PKG_USING_GBK2UTF8 is not set
 # CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
 
 #
 # system packages
@@ -370,6 +377,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_PPOOL is not set
 # CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_PRINTF is not set
 
 #
 # peripheral libraries and drivers
@@ -378,6 +386,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
@@ -430,6 +439,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_NES is not set
 # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
 # CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
 
 #
 # miscellaneous packages
@@ -494,6 +504,16 @@ CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART1=y
 # CONFIG_BSP_UART1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_I2C is not set
+CONFIG_BSP_USING_SPI=y
+CONFIG_BSP_USING_SPI2=y
+# CONFIG_BSP_SPI2_TX_USING_DMA is not set
+# CONFIG_BSP_SPI2_RX_USING_DMA is not set
 # CONFIG_BSP_USING_CRC is not set
 # CONFIG_BSP_USING_RNG is not set
 # CONFIG_BSP_USING_UDID is not set
+
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_SPI_LCD=y
diff --git a/bsp/stm32/stm32l431-BearPi/applications/main.c b/bsp/stm32/stm32l431-BearPi/applications/main.c
index 9222b842fc..b5409814f6 100644
--- a/bsp/stm32/stm32l431-BearPi/applications/main.c
+++ b/bsp/stm32/stm32l431-BearPi/applications/main.c
@@ -17,19 +17,15 @@
 
 int main(void)
 {
-  int count = 1;
+    rt_kprintf("---Welcome use BearPi---\n");
+    /* set LED pin mode to output */
+    rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-  rt_kprintf("---Welcome use BearPi---\n");
-  /* set LED pin mode to output */
-  rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
-
-  while (count++)
-  {
-    rt_pin_write(LED0_PIN, PIN_HIGH);
-    rt_thread_mdelay(500);
-    rt_pin_write(LED0_PIN, PIN_LOW);
-    rt_thread_mdelay(500);
-  }
-
-  return RT_EOK;
+    while (1)
+    {
+        rt_pin_write(LED0_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED0_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
 }
diff --git a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/.mxproject
index 568f4ba3ec..77c9bb99d3 100644
--- a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/.mxproject
+++ b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/.mxproject
@@ -1,14 +1,14 @@
 [PreviousGenFiles]
-HeaderPath=D:/Users/rtt/Desktop/CubeMX_Config/Inc
+HeaderPath=D:/Rtt_doc/rt-thread/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Inc
 HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h;
-SourcePath=D:/Users/rtt/Desktop/CubeMX_Config/Src
+SourcePath=D:/Rtt_doc/rt-thread/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src
 SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c;
 
 [PreviousLibFiles]
-LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l431xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l431xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
 
 [PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\\Src/system_stm32l4xx.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\\Src/system_stm32l4xx.c;..\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
+SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;..\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;;
 HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
 CDefines=USE_HAL_DRIVER;STM32L431xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
 
diff --git a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/CubeMX_Config.ioc
index 79ec749333..ce0175ce52 100644
--- a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/CubeMX_Config.ioc
+++ b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/CubeMX_Config.ioc
@@ -5,19 +5,22 @@ KeepUserPlacement=false
 Mcu.Family=STM32L4
 Mcu.IP0=NVIC
 Mcu.IP1=RCC
-Mcu.IP2=SYS
-Mcu.IP3=USART1
-Mcu.IPNb=4
+Mcu.IP2=SPI2
+Mcu.IP3=SYS
+Mcu.IP4=USART1
+Mcu.IPNb=5
 Mcu.Name=STM32L431R(B-C)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PC14-OSC32_IN (PC14)
 Mcu.Pin1=PC15-OSC32_OUT (PC15)
 Mcu.Pin2=PH0-OSC_IN (PH0)
 Mcu.Pin3=PH1-OSC_OUT (PH1)
-Mcu.Pin4=PA9
-Mcu.Pin5=PA10
-Mcu.Pin6=VP_SYS_VS_Systick
-Mcu.PinsNb=7
+Mcu.Pin4=PC3
+Mcu.Pin5=PB13
+Mcu.Pin6=PA9
+Mcu.Pin7=PA10
+Mcu.Pin8=VP_SYS_VS_Systick
+Mcu.PinsNb=9
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32L431RCTx
@@ -40,12 +43,18 @@ PA10.Signal=USART1_RX
 PA9.Locked=true
 PA9.Mode=Asynchronous
 PA9.Signal=USART1_TX
+PB13.Locked=true
+PB13.Mode=Simplex_Bidirectional_Master
+PB13.Signal=SPI2_SCK
 PC14-OSC32_IN\ (PC14).Locked=true
 PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
 PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
 PC15-OSC32_OUT\ (PC15).Locked=true
 PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator
 PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT
+PC3.Locked=true
+PC3.Mode=Simplex_Bidirectional_Master
+PC3.Signal=SPI2_MOSI
 PH0-OSC_IN\ (PH0).Locked=true
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
@@ -121,6 +130,11 @@ RCC.USART3Freq_Value=80000000
 RCC.VCOInputFreq_Value=4000000
 RCC.VCOOutputFreq_Value=160000000
 RCC.VCOSAI1OutputFreq_Value=32000000
+SPI2.CalculateBaudRate=40.0 MBits/s
+SPI2.Direction=SPI_DIRECTION_1LINE
+SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
+SPI2.Mode=SPI_MODE_MASTER
+SPI2.VirtualType=VM_MASTER
 USART1.IPParameters=VirtualMode-Asynchronous
 USART1.VirtualMode-Asynchronous=VM_ASYNC
 VP_SYS_VS_Systick.Mode=SysTick
diff --git a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h
index 347da3fe30..b425dbbe58 100644
--- a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h
+++ b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h
@@ -5,7 +5,7 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT(c) 2021 STMicroelectronics</center></h2>
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -86,7 +86,7 @@
 /*#define HAL_SD_MODULE_ENABLED   */
 /*#define HAL_SMBUS_MODULE_ENABLED   */
 /*#define HAL_SMARTCARD_MODULE_ENABLED   */
-/*#define HAL_SPI_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
 /*#define HAL_SRAM_MODULE_ENABLED   */
 /*#define HAL_SWPMI_MODULE_ENABLED   */
 /*#define HAL_TIM_MODULE_ENABLED   */
diff --git a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/main.c
index f3fe151ae7..bdd3967d6a 100644
--- a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/main.c
+++ b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/main.c
@@ -41,6 +41,8 @@
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
+SPI_HandleTypeDef hspi2;
+
 UART_HandleTypeDef huart1;
 
 /* USER CODE BEGIN PV */
@@ -50,6 +52,7 @@ UART_HandleTypeDef huart1;
 /* Private function prototypes -----------------------------------------------*/
 void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
+static void MX_SPI2_Init(void);
 static void MX_USART1_UART_Init(void);
 /* USER CODE BEGIN PFP */
 
@@ -88,6 +91,7 @@ int main(void)
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
+  MX_SPI2_Init();
   MX_USART1_UART_Init();
   /* USER CODE BEGIN 2 */
 
@@ -167,6 +171,46 @@ void SystemClock_Config(void)
 }
 
 /**
+  * @brief SPI2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI2_Init(void)
+{
+
+  /* USER CODE BEGIN SPI2_Init 0 */
+
+  /* USER CODE END SPI2_Init 0 */
+
+  /* USER CODE BEGIN SPI2_Init 1 */
+
+  /* USER CODE END SPI2_Init 1 */
+  /* SPI2 parameter configuration*/
+  hspi2.Instance = SPI2;
+  hspi2.Init.Mode = SPI_MODE_MASTER;
+  hspi2.Init.Direction = SPI_DIRECTION_1LINE;
+  hspi2.Init.DataSize = SPI_DATASIZE_4BIT;
+  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
+  hspi2.Init.NSS = SPI_NSS_SOFT;
+  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
+  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
+  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+  hspi2.Init.CRCPolynomial = 7;
+  hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
+  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  if (HAL_SPI_Init(&hspi2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SPI2_Init 2 */
+
+  /* USER CODE END SPI2_Init 2 */
+
+}
+
+/**
   * @brief USART1 Initialization Function
   * @param None
   * @retval None
@@ -212,6 +256,7 @@ static void MX_GPIO_Init(void)
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
 
 }
diff --git a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c
index 45d1b1a9e2..943aadf254 100644
--- a/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c
+++ b/bsp/stm32/stm32l431-BearPi/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c
@@ -78,6 +78,81 @@ void HAL_MspInit(void)
 }
 
 /**
+* @brief SPI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hspi->Instance==SPI2)
+  {
+  /* USER CODE BEGIN SPI2_MspInit 0 */
+
+  /* USER CODE END SPI2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI2_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**SPI2 GPIO Configuration    
+    PC3     ------> SPI2_MOSI
+    PB13     ------> SPI2_SCK 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN SPI2_MspInit 1 */
+
+  /* USER CODE END SPI2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief SPI MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
+{
+  if(hspi->Instance==SPI2)
+  {
+  /* USER CODE BEGIN SPI2_MspDeInit 0 */
+
+  /* USER CODE END SPI2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SPI2_CLK_DISABLE();
+  
+    /**SPI2 GPIO Configuration    
+    PC3     ------> SPI2_MOSI
+    PB13     ------> SPI2_SCK 
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
+
+  /* USER CODE BEGIN SPI2_MspDeInit 1 */
+
+  /* USER CODE END SPI2_MspDeInit 1 */
+  }
+
+}
+
+/**
 * @brief UART MSP Initialization
 * This function configures the hardware resources used in this example
 * @param huart: UART handle pointer
diff --git a/bsp/stm32/stm32l431-BearPi/board/Kconfig b/bsp/stm32/stm32l431-BearPi/board/Kconfig
index 49cc8cadc9..1c8e42c3fd 100644
--- a/bsp/stm32/stm32l431-BearPi/board/Kconfig
+++ b/bsp/stm32/stm32l431-BearPi/board/Kconfig
@@ -29,8 +29,37 @@ menu "On-chip Peripheral Drivers"
                 default n
         endif
 
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI BUS"
+        default n
+        select RT_USING_SPI
+        if BSP_USING_SPI
+            config BSP_USING_SPI2
+                bool "Enable SPI2 BUS"
+                default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+                
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
+        endif
+
     source "../libraries/HAL_Drivers/Kconfig"
     
 endmenu
 
+menu "Onboard Peripheral Drivers"
+    config BSP_USING_SPI_LCD
+        bool "Enable LCD (spi2)"
+        select BSP_USING_SPI
+        select BSP_USING_SPI2
+        default n
+endmenu
+
 endmenu
diff --git a/bsp/stm32/stm32l431-BearPi/board/SConscript b/bsp/stm32/stm32l431-BearPi/board/SConscript
index c95510d979..aade0f780a 100644
--- a/bsp/stm32/stm32l431-BearPi/board/SConscript
+++ b/bsp/stm32/stm32l431-BearPi/board/SConscript
@@ -12,9 +12,12 @@ board.c
 CubeMX_Config/Src/stm32l4xx_hal_msp.c
 ''')
 
+if GetDepend('BSP_USING_SPI_LCD'):
+    src += ['ports/lcd/drv_lcd.c']
+
 path =  [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
-
+path += [cwd + '/ports/lcd']
 startup_path_prefix = SDK_LIB
 
 if rtconfig.CROSS_TOOL == 'gcc':
@@ -33,7 +36,7 @@ elif rtconfig.CROSS_TOOL == 'iar':
 # STM32L4R7xx || STM32L4R9xx || STM32L4S5xx
 # STM32L4S7xx || STM32L4S9xx
 # You can select chips from the list above	
-CPPDEFINES = ['STM32L432xx']
+CPPDEFINES = ['STM32L431xx']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 
 Return('group')
diff --git a/bsp/stm32/stm32l431-BearPi/board/ports/SConscript b/bsp/stm32/stm32l431-BearPi/board/ports/SConscript
new file mode 100644
index 0000000000..ca95be14e2
--- /dev/null
+++ b/bsp/stm32/stm32l431-BearPi/board/ports/SConscript
@@ -0,0 +1,12 @@
+import os
+from building import *
+
+objs = []
+cwd  = GetCurrentDir()
+list = os.listdir(cwd)
+
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')
diff --git a/bsp/stm32/stm32l431-BearPi/board/ports/lcd/SConscript b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/SConscript
new file mode 100644
index 0000000000..2f243d9b00
--- /dev/null
+++ b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/SConscript
@@ -0,0 +1,13 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+
+src += Glob('*.c')
+
+CPPPATH = [cwd]
+
+group = DefineGroup('devices', src, depend = ['BSP_USING_SPI_LCD'], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.c b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.c
new file mode 100644
index 0000000000..6150a5b184
--- /dev/null
+++ b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.c
@@ -0,0 +1,821 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2021-01-05     RiceChen          the first version
+ */
+
+#include <rtdevice.h>
+#include "drv_spi.h"
+#include "drv_lcd.h"
+#include "drv_lcd_font.h"
+#include "drv_gpio.h"
+
+#define DBG_SECTION_NAME    "LCD"
+#define DBG_COLOR
+#define DBG_LEVEL           DBG_LOG
+#include <rtdbg.h>
+
+#define LCD_PWR_PIN           GET_PIN(B, 15)
+#define LCD_DC_PIN            GET_PIN(C, 6)
+#define LCD_RES_PIN           GET_PIN(C, 7)
+#define LCD_CLEAR_SEND_NUMBER 5760
+
+rt_uint16_t BACK_COLOR = WHITE, FORE_COLOR = BLACK;
+
+static struct rt_spi_device *spi_dev_lcd;
+
+static int rt_hw_lcd_config(void)
+{
+    spi_dev_lcd = (struct rt_spi_device *)rt_device_find("lcd");
+
+    /* config spi */
+    {
+        struct rt_spi_configuration cfg;
+        cfg.data_width = 8;
+        cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_3 | RT_SPI_MSB;
+        cfg.max_hz = 42 * 1000 * 1000; /* 42M,SPI max 42MHz,lcd 4-wire spi */
+
+        rt_spi_configure(spi_dev_lcd, &cfg);
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t lcd_write_cmd(const rt_uint8_t cmd)
+{
+    rt_size_t len;
+
+    rt_pin_write(LCD_DC_PIN, PIN_LOW);
+
+    len = rt_spi_send(spi_dev_lcd, &cmd, 1);
+
+    if (len != 1)
+    {
+        LOG_I("lcd_write_cmd error. %d", len);
+        return -RT_ERROR;
+    }
+    else
+    {
+        return RT_EOK;
+    }
+}
+
+static rt_err_t lcd_write_data(const rt_uint8_t data)
+{
+    rt_size_t len;
+
+    rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+
+    len = rt_spi_send(spi_dev_lcd, &data, 1);
+
+    if (len != 1)
+    {
+        LOG_I("lcd_write_data error. %d", len);
+        return -RT_ERROR;
+    }
+    else
+    {
+        return RT_EOK;
+    }
+}
+
+static rt_err_t lcd_write_half_word(const rt_uint16_t da)
+{
+    rt_size_t len;
+    char data[2] = {0};
+
+    data[0] = da >> 8;
+    data[1] = da;
+
+    rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+    len = rt_spi_send(spi_dev_lcd, data, 2);
+    if (len != 2)
+    {
+        LOG_I("lcd_write_half_word error. %d", len);
+        return -RT_ERROR;
+    }
+    else
+    {
+        return RT_EOK;
+    }
+}
+
+static void lcd_gpio_init(void)
+{
+    rt_hw_lcd_config();
+
+    rt_pin_mode(LCD_DC_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(LCD_RES_PIN, PIN_MODE_OUTPUT);
+
+    rt_pin_mode(LCD_PWR_PIN, PIN_MODE_OUTPUT);
+    rt_pin_write(LCD_PWR_PIN, PIN_LOW);
+
+    rt_pin_write(LCD_RES_PIN, PIN_LOW);
+    //wait at least 100ms for reset
+    rt_thread_delay(RT_TICK_PER_SECOND / 10);
+    rt_pin_write(LCD_RES_PIN, PIN_HIGH);
+}
+
+static int rt_hw_lcd_init(void)
+{
+    rt_hw_spi_device_attach("spi2", "lcd", GPIOC, GPIO_PIN_3);
+    lcd_gpio_init();
+    /* Memory Data Access Control */
+    lcd_write_cmd(0x36);
+    lcd_write_data(0x00);
+    /* RGB 5-6-5-bit  */
+    lcd_write_cmd(0x3A);
+    lcd_write_data(0x65);
+    /* Porch Setting */
+    lcd_write_cmd(0xB2);
+    lcd_write_data(0x0C);
+    lcd_write_data(0x0C);
+    lcd_write_data(0x00);
+    lcd_write_data(0x33);
+    lcd_write_data(0x33);
+    /*  Gate Control */
+    lcd_write_cmd(0xB7);
+    lcd_write_data(0x72);
+    /* VCOM Setting */
+    lcd_write_cmd(0xBB);
+    lcd_write_data(0x3D);
+    /* LCM Control */
+    lcd_write_cmd(0xC0);
+    lcd_write_data(0x2C);
+    /* VDV and VRH Command Enable */
+    lcd_write_cmd(0xC2);
+    lcd_write_data(0x01);
+    /* VRH Set */
+    lcd_write_cmd(0xC3);
+    lcd_write_data(0x19);
+    /* VDV Set */
+    lcd_write_cmd(0xC4);
+    lcd_write_data(0x20);
+    /* Frame Rate Control in Normal Mode */
+    lcd_write_cmd(0xC6);
+    lcd_write_data(0x0F);
+    /* Power Control 1 */
+    lcd_write_cmd(0xD0);
+    lcd_write_data(0xA4);
+    lcd_write_data(0xA1);
+    /* Positive Voltage Gamma Control */
+    lcd_write_cmd(0xE0);
+    lcd_write_data(0xD0);
+    lcd_write_data(0x04);
+    lcd_write_data(0x0D);
+    lcd_write_data(0x11);
+    lcd_write_data(0x13);
+    lcd_write_data(0x2B);
+    lcd_write_data(0x3F);
+    lcd_write_data(0x54);
+    lcd_write_data(0x4C);
+    lcd_write_data(0x18);
+    lcd_write_data(0x0D);
+    lcd_write_data(0x0B);
+    lcd_write_data(0x1F);
+    lcd_write_data(0x23);
+    /* Negative Voltage Gamma Control */
+    lcd_write_cmd(0xE1);
+    lcd_write_data(0xD0);
+    lcd_write_data(0x04);
+    lcd_write_data(0x0C);
+    lcd_write_data(0x11);
+    lcd_write_data(0x13);
+    lcd_write_data(0x2C);
+    lcd_write_data(0x3F);
+    lcd_write_data(0x44);
+    lcd_write_data(0x51);
+    lcd_write_data(0x2F);
+    lcd_write_data(0x1F);
+    lcd_write_data(0x1F);
+    lcd_write_data(0x20);
+    lcd_write_data(0x23);
+    /* Display Inversion On */
+    lcd_write_cmd(0x21);
+    /* Sleep Out */
+    lcd_write_cmd(0x11);
+    /* wait for power stability */
+    rt_thread_mdelay(100);
+
+    lcd_clear(WHITE);
+		lcd_show_string(0, 0, 32, "RT-Thread");
+
+    /* display on */
+    rt_pin_write(LCD_PWR_PIN, PIN_HIGH);
+    lcd_write_cmd(0x29);
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_lcd_init);
+
+/**
+ * Set background color and foreground color
+ *
+ * @param   back    background color
+ * @param   fore    fore color
+ *
+ * @return  void
+ */
+void lcd_set_color(rt_uint16_t back, rt_uint16_t fore)
+{
+    BACK_COLOR = back;
+    FORE_COLOR = fore;
+}
+
+void lcd_display_on(void)
+{
+    rt_pin_write(LCD_PWR_PIN, PIN_HIGH);
+}
+
+void lcd_display_off(void)
+{
+    rt_pin_write(LCD_PWR_PIN, PIN_LOW);
+}
+
+/* lcd enter the minimum power consumption mode and backlight off. */
+void lcd_enter_sleep(void)
+{
+    rt_pin_write(LCD_PWR_PIN, PIN_LOW);
+    rt_thread_mdelay(5);
+    lcd_write_cmd(0x10);
+}
+/* lcd turn off sleep mode and backlight on. */
+void lcd_exit_sleep(void)
+{
+    rt_pin_write(LCD_PWR_PIN, PIN_HIGH);
+    rt_thread_mdelay(5);
+    lcd_write_cmd(0x11);
+    rt_thread_mdelay(120);
+}
+
+/**
+ * Set drawing area
+ *
+ * @param   x1      start of x position
+ * @param   y1      start of y position
+ * @param   x2      end of x position
+ * @param   y2      end of y position
+ *
+ * @return  void
+ */
+void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2)
+{
+    lcd_write_cmd(0x2a);
+    lcd_write_data(x1 >> 8);
+    lcd_write_data(x1);
+    lcd_write_data(x2 >> 8);
+    lcd_write_data(x2);
+
+    lcd_write_cmd(0x2b);
+    lcd_write_data(y1 >> 8);
+    lcd_write_data(y1);
+    lcd_write_data(y2 >> 8);
+    lcd_write_data(y2);
+
+    lcd_write_cmd(0x2C);
+}
+
+/**
+ * clear the lcd.
+ *
+ * @param   color       Fill color
+ *
+ * @return  void
+ */
+void lcd_clear(rt_uint16_t color)
+{
+    rt_uint16_t i, j;
+    rt_uint8_t data[2] = {0};
+    rt_uint8_t *buf = RT_NULL;
+
+    data[0] = color >> 8;
+    data[1] = color;
+    lcd_address_set(0, 0, LCD_W - 1, LCD_H - 1);
+
+    /* 5760 = 240*240/20 */
+    buf = rt_malloc(LCD_CLEAR_SEND_NUMBER);
+    if (buf)
+    {
+        /* 2880 = 5760/2 color is 16 bit */
+        for (j = 0; j < LCD_CLEAR_SEND_NUMBER / 2; j++)
+        {
+            buf[j * 2] =  data[0];
+            buf[j * 2 + 1] =  data[1];
+        }
+
+        rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+        for (i = 0; i < 20; i++)
+        {
+            rt_spi_send(spi_dev_lcd, buf, LCD_CLEAR_SEND_NUMBER);
+        }
+        rt_free(buf);
+    }
+    else
+    {
+        rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+        for (i = 0; i < LCD_W; i++)
+        {
+            for (j = 0; j < LCD_H; j++)
+            {
+                rt_spi_send(spi_dev_lcd, data, 2);
+            }
+        }
+    }
+}
+
+/**
+ * display a point on the lcd.
+ *
+ * @param   x   x position
+ * @param   y   y position
+ *
+ * @return  void
+ */
+void lcd_draw_point(rt_uint16_t x, rt_uint16_t y)
+{
+    lcd_address_set(x, y, x, y);
+    lcd_write_half_word(FORE_COLOR);
+}
+
+/**
+ * display a point on the lcd using the given colour.
+ *
+ * @param   x       x position
+ * @param   y       y position
+ * @param   color   color of point
+ *
+ * @return  void
+ */
+void lcd_draw_point_color(rt_uint16_t x, rt_uint16_t y, rt_uint16_t color)
+{
+    lcd_address_set(x, y, x, y);
+    lcd_write_half_word(color);
+}
+
+/**
+ * full color on the lcd.
+ *
+ * @param   x_start     start of x position
+ * @param   y_start     start of y position
+ * @param   x_end       end of x position
+ * @param   y_end       end of y position
+ * @param   color       Fill color
+ *
+ * @return  void
+ */
+void lcd_fill(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, rt_uint16_t color)
+{
+    rt_uint16_t i = 0, j = 0;
+    rt_uint32_t size = 0, size_remain = 0;
+    rt_uint8_t *fill_buf = RT_NULL;
+
+    size = (x_end - x_start) * (y_end - y_start) * 2;
+
+    if (size > LCD_CLEAR_SEND_NUMBER)
+    {
+        /* the number of remaining to be filled */
+        size_remain = size - LCD_CLEAR_SEND_NUMBER;
+        size = LCD_CLEAR_SEND_NUMBER;
+    }
+
+    lcd_address_set(x_start, y_start, x_end, y_end);
+
+    fill_buf = (rt_uint8_t *)rt_malloc(size);
+    if (fill_buf)
+    {
+        /* fast fill */
+        while (1)
+        {
+            for (i = 0; i < size / 2; i++)
+            {
+                fill_buf[2 * i] = color >> 8;
+                fill_buf[2 * i + 1] = color;
+            }
+            rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+            rt_spi_send(spi_dev_lcd, fill_buf, size);
+
+            /* Fill completed */
+            if (size_remain == 0)
+                break;
+
+            /* calculate the number of fill next time */
+            if (size_remain > LCD_CLEAR_SEND_NUMBER)
+            {
+                size_remain = size_remain - LCD_CLEAR_SEND_NUMBER;
+            }
+            else
+            {
+                size = size_remain;
+                size_remain = 0;
+            }
+        }
+        rt_free(fill_buf);
+    }
+    else
+    {
+        for (i = y_start; i <= y_end; i++)
+        {
+            for (j = x_start; j <= x_end; j++)lcd_write_half_word(color);
+        }
+    }
+}
+
+/**
+ * display a line on the lcd.
+ *
+ * @param   x1      x1 position
+ * @param   y1      y1 position
+ * @param   x2      x2 position
+ * @param   y2      y2 position
+ *
+ * @return  void
+ */
+void lcd_draw_line(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2)
+{
+    rt_uint16_t t;
+    rt_uint32_t i = 0;
+    int xerr = 0, yerr = 0, delta_x, delta_y, distance;
+    int incx, incy, row, col;
+
+    if (y1 == y2)
+    {
+        /* fast draw transverse line */
+        lcd_address_set(x1, y1, x2, y2);
+
+        rt_uint8_t line_buf[480] = {0};
+
+        for (i = 0; i < x2 - x1; i++)
+        {
+            line_buf[2 * i] = FORE_COLOR >> 8;
+            line_buf[2 * i + 1] = FORE_COLOR;
+        }
+
+        rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+        rt_spi_send(spi_dev_lcd, line_buf, (x2 - x1) * 2);
+
+        return ;
+    }
+
+    delta_x = x2 - x1;
+    delta_y = y2 - y1;
+    row = x1;
+    col = y1;
+    if (delta_x > 0)incx = 1;
+    else if (delta_x == 0)incx = 0;
+    else
+    {
+        incx = -1;
+        delta_x = -delta_x;
+    }
+    if (delta_y > 0)incy = 1;
+    else if (delta_y == 0)incy = 0;
+    else
+    {
+        incy = -1;
+        delta_y = -delta_y;
+    }
+    if (delta_x > delta_y)distance = delta_x;
+    else distance = delta_y;
+    for (t = 0; t <= distance + 1; t++)
+    {
+        lcd_draw_point(row, col);
+        xerr += delta_x ;
+        yerr += delta_y ;
+        if (xerr > distance)
+        {
+            xerr -= distance;
+            row += incx;
+        }
+        if (yerr > distance)
+        {
+            yerr -= distance;
+            col += incy;
+        }
+    }
+}
+
+/**
+ * display a rectangle on the lcd.
+ *
+ * @param   x1      x1 position
+ * @param   y1      y1 position
+ * @param   x2      x2 position
+ * @param   y2      y2 position
+ *
+ * @return  void
+ */
+void lcd_draw_rectangle(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2)
+{
+    lcd_draw_line(x1, y1, x2, y1);
+    lcd_draw_line(x1, y1, x1, y2);
+    lcd_draw_line(x1, y2, x2, y2);
+    lcd_draw_line(x2, y1, x2, y2);
+}
+
+/**
+ * display a circle on the lcd.
+ *
+ * @param   x       x position of Center
+ * @param   y       y position of Center
+ * @param   r       radius
+ *
+ * @return  void
+ */
+void lcd_draw_circle(rt_uint16_t x0, rt_uint16_t y0, rt_uint8_t r)
+{
+    int a, b;
+    int di;
+    a = 0;
+    b = r;
+    di = 3 - (r << 1);
+    while (a <= b)
+    {
+        lcd_draw_point(x0 - b, y0 - a);
+        lcd_draw_point(x0 + b, y0 - a);
+        lcd_draw_point(x0 - a, y0 + b);
+        lcd_draw_point(x0 - b, y0 - a);
+        lcd_draw_point(x0 - a, y0 - b);
+        lcd_draw_point(x0 + b, y0 + a);
+        lcd_draw_point(x0 + a, y0 - b);
+        lcd_draw_point(x0 + a, y0 + b);
+        lcd_draw_point(x0 - b, y0 + a);
+        a++;
+        //Bresenham
+        if (di < 0)di += 4 * a + 6;
+        else
+        {
+            di += 10 + 4 * (a - b);
+            b--;
+        }
+        lcd_draw_point(x0 + a, y0 + b);
+    }
+}
+
+static void lcd_show_char(rt_uint16_t x, rt_uint16_t y, rt_uint8_t data, rt_uint32_t size)
+{
+    rt_uint8_t temp;
+    rt_uint8_t num = 0;;
+    rt_uint8_t pos, t;
+    rt_uint16_t colortemp = FORE_COLOR;
+    rt_uint8_t *font_buf = RT_NULL;
+
+    if (x > LCD_W - size / 2 || y > LCD_H - size)return;
+
+    data = data - ' ';
+#ifdef ASC2_1608
+    if (size == 16)
+    {
+        lcd_address_set(x, y, x + size / 2 - 1, y + size - 1);//(x,y,x+8-1,y+16-1)
+
+        font_buf = (rt_uint8_t *)rt_malloc(size * size);
+        if (!font_buf)
+        {
+            /* fast show char */
+            for (pos = 0; pos < size * (size / 2) / 8; pos++)
+            {
+                temp = asc2_1608[(rt_uint16_t)data * size * (size / 2) / 8 + pos];
+                for (t = 0; t < 8; t++)
+                {
+                    if (temp & 0x80)colortemp = FORE_COLOR;
+                    else colortemp = BACK_COLOR;
+                    lcd_write_half_word(colortemp);
+                    temp <<= 1;
+                }
+            }
+        }
+        else
+        {
+            for (pos = 0; pos < size * (size / 2) / 8; pos++)
+            {
+                temp = asc2_1608[(rt_uint16_t)data * size * (size / 2) / 8 + pos];
+                for (t = 0; t < 8; t++)
+                {
+                    if (temp & 0x80)colortemp = FORE_COLOR;
+                    else colortemp = BACK_COLOR;
+                    font_buf[2 * (8 * pos + t)] = colortemp >> 8;
+                    font_buf[2 * (8 * pos + t) + 1] = colortemp;
+                    temp <<= 1;
+                }
+            }
+            rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+            rt_spi_send(spi_dev_lcd, font_buf, size * size);
+            rt_free(font_buf);
+        }
+    }
+    else
+#endif
+
+#ifdef ASC2_2412
+        if (size == 24)
+        {
+            lcd_address_set(x, y, x + size / 2 - 1, y + size - 1);
+
+            font_buf = (rt_uint8_t *)rt_malloc(size * size);
+            if (!font_buf)
+            {
+                /* fast show char */
+                for (pos = 0; pos < (size * 16) / 8; pos++)
+                {
+                    temp = asc2_2412[(rt_uint16_t)data * (size * 16) / 8 + pos];
+                    if (pos % 2 == 0)
+                    {
+                        num = 8;
+                    }
+                    else
+                    {
+                        num = 4;
+                    }
+
+                    for (t = 0; t < num; t++)
+                    {
+                        if (temp & 0x80)colortemp = FORE_COLOR;
+                        else colortemp = BACK_COLOR;
+                        lcd_write_half_word(colortemp);
+                        temp <<= 1;
+                    }
+                }
+            }
+            else
+            {
+                for (pos = 0; pos < (size * 16) / 8; pos++)
+                {
+                    temp = asc2_2412[(rt_uint16_t)data * (size * 16) / 8 + pos];
+                    if (pos % 2 == 0)
+                    {
+                        num = 8;
+                    }
+                    else
+                    {
+                        num = 4;
+                    }
+
+                    for (t = 0; t < num; t++)
+                    {
+                        if (temp & 0x80)colortemp = FORE_COLOR;
+                        else colortemp = BACK_COLOR;
+                        if (num == 8)
+                        {
+                            font_buf[2 * (12 * (pos / 2) + t)] = colortemp >> 8;
+                            font_buf[2 * (12 * (pos / 2) + t) + 1] = colortemp;
+                        }
+                        else
+                        {
+                            font_buf[2 * (8 + 12 * (pos / 2) + t)] = colortemp >> 8;
+                            font_buf[2 * (8 + 12 * (pos / 2) + t) + 1] = colortemp;
+                        }
+                        temp <<= 1;
+                    }
+                }
+                rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+                rt_spi_send(spi_dev_lcd, font_buf, size * size);
+                rt_free(font_buf);
+            }
+        }
+        else
+#endif
+
+#ifdef ASC2_3216
+            if (size == 32)
+            {
+                lcd_address_set(x, y, x + size / 2 - 1, y + size - 1);
+
+                font_buf = (rt_uint8_t *)rt_malloc(size * size);
+                if (!font_buf)
+                {
+                    /* fast show char */
+                    for (pos = 0; pos < size * (size / 2) / 8; pos++)
+                    {
+                        temp = asc2_3216[(rt_uint16_t)data * size * (size / 2) / 8 + pos];
+                        for (t = 0; t < 8; t++)
+                        {
+                            if (temp & 0x80)colortemp = FORE_COLOR;
+                            else colortemp = BACK_COLOR;
+                            lcd_write_half_word(colortemp);
+                            temp <<= 1;
+                        }
+                    }
+                }
+                else
+                {
+                    for (pos = 0; pos < size * (size / 2) / 8; pos++)
+                    {
+                        temp = asc2_3216[(rt_uint16_t)data * size * (size / 2) / 8 + pos];
+                        for (t = 0; t < 8; t++)
+                        {
+                            if (temp & 0x80)colortemp = FORE_COLOR;
+                            else colortemp = BACK_COLOR;
+                            font_buf[2 * (8 * pos + t)] = colortemp >> 8;
+                            font_buf[2 * (8 * pos + t) + 1] = colortemp;
+                            temp <<= 1;
+                        }
+                    }
+                    rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+                    rt_spi_send(spi_dev_lcd, font_buf, size * size);
+                    rt_free(font_buf);
+                }
+            }
+            else
+#endif
+            {
+                LOG_E("There is no any define ASC2_1208 && ASC2_2412 && ASC2_2416 && ASC2_3216 !");
+            }
+}
+
+/**
+ * display the number on the lcd.
+ *
+ * @param   x       x position
+ * @param   y       y position
+ * @param   num     number
+ * @param   len     length of number
+ * @param   size    size of font
+ *
+ * @return  void
+ */
+void lcd_show_num(rt_uint16_t x, rt_uint16_t y, rt_uint32_t num, rt_uint8_t len, rt_uint32_t size)
+{
+    lcd_show_string(x, y, size, "%d", num);
+}
+
+/**
+ * display the string on the lcd.
+ *
+ * @param   x       x position
+ * @param   y       y position
+ * @param   size    size of font
+ * @param   p       the string to be display
+ *
+ * @return   0: display success
+ *          -1: size of font is not support
+ */
+rt_err_t lcd_show_string(rt_uint16_t x, rt_uint16_t y, rt_uint32_t size, const char *fmt, ...)
+{
+#define LCD_STRING_BUF_LEN 128
+
+    va_list args;
+    rt_uint8_t buf[LCD_STRING_BUF_LEN] = {0};
+    rt_uint8_t *p = RT_NULL;
+
+    if (size != 16 && size != 24 && size != 32)
+    {
+        LOG_E("font size(%d) is not support!", size);
+        return -RT_ERROR;
+    }
+
+    va_start(args, fmt);
+    rt_vsnprintf((char *)buf, 100, (const char *)fmt, args);
+    va_end(args);
+
+    p = buf;
+    while (*p != '\0')
+    {
+        if (x > LCD_W - size / 2)
+        {
+            x = 0;
+            y += size;
+        }
+        if (y > LCD_H - size)
+        {
+            y = x = 0;
+            lcd_clear(RED);
+        }
+        lcd_show_char(x, y, *p, size);
+        x += size / 2;
+        p++;
+    }
+
+    return RT_EOK;
+}
+
+/**
+ * display the image on the lcd.
+ *
+ * @param   x       x position
+ * @param   y       y position
+ * @param   length  length of image
+ * @param   wide    wide of image
+ * @param   p       image
+ *
+ * @return   0: display success
+ *          -1: the image is too large
+ */
+rt_err_t lcd_show_image(rt_uint16_t x, rt_uint16_t y, rt_uint16_t length, rt_uint16_t wide, const rt_uint8_t *p)
+{
+    RT_ASSERT(p);
+
+    if (x + length > LCD_W || y + wide > LCD_H)
+    {
+        return -RT_ERROR;
+    }
+
+    lcd_address_set(x, y, x + length - 1, y + wide - 1);
+
+    rt_pin_write(LCD_DC_PIN, PIN_HIGH);
+    rt_spi_send(spi_dev_lcd, p, length * wide * 2);
+
+    return RT_EOK;
+}
+\ No newline at end of file
diff --git a/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.h b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.h
new file mode 100644
index 0000000000..caeaa5dce6
--- /dev/null
+++ b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd.h
@@ -0,0 +1,44 @@
+#ifndef __DRV_LCD_H__
+#define __DRV_LCD_H__
+
+#include <board.h>
+
+#define LCD_W 240
+#define LCD_H 240
+
+//POINT_COLOR
+#define WHITE            0xFFFF
+#define BLACK            0x0000
+#define BLUE             0x001F
+#define BRED             0XF81F
+#define GRED             0XFFE0
+#define GBLUE            0X07FF
+#define RED              0xF800
+#define MAGENTA          0xF81F
+#define GREEN            0x07E0
+#define CYAN             0x7FFF
+#define YELLOW           0xFFE0
+#define BROWN            0XBC40
+#define BRRED            0XFC07
+#define GRAY             0X8430
+#define GRAY175          0XAD75
+#define GRAY151          0X94B2
+#define GRAY187          0XBDD7
+#define GRAY240          0XF79E
+
+void lcd_clear(rt_uint16_t color);
+void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
+void lcd_set_color(rt_uint16_t back, rt_uint16_t fore);
+
+void lcd_draw_point(rt_uint16_t x, rt_uint16_t y);
+void lcd_draw_point_color(rt_uint16_t x, rt_uint16_t y, rt_uint16_t color);
+void lcd_draw_circle(rt_uint16_t x0, rt_uint16_t y0, rt_uint8_t r);
+void lcd_draw_line(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
+void lcd_draw_rectangle(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
+void lcd_fill(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, rt_uint16_t color);
+
+void lcd_show_num(rt_uint16_t x, rt_uint16_t y, rt_uint32_t num, rt_uint8_t len, rt_uint32_t size);
+rt_err_t lcd_show_string(rt_uint16_t x, rt_uint16_t y, rt_uint32_t size, const char *fmt, ...);
+rt_err_t lcd_show_image(rt_uint16_t x, rt_uint16_t y, rt_uint16_t length, rt_uint16_t wide, const rt_uint8_t *p);
+
+#endif
diff --git a/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd_font.h b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd_font.h
new file mode 100644
index 0000000000..f37721ba03
--- /dev/null
+++ b/bsp/stm32/stm32l431-BearPi/board/ports/lcd/drv_lcd_font.h
@@ -0,0 +1,780 @@
+#ifndef __DRV_LCD_FONT_H__
+#define __DRV_LCD_FONT_H__ 	   
+#include <stdint.h>
+
+#define ASC2_1608
+#define ASC2_2412
+#define ASC2_3216
+
+#if !defined(ASC2_1608) && !defined(ASC2_2412) && !defined(ASC2_2416) && !defined(ASC2_3216)
+#error "There is no any define ASC2_1608 && ASC2_2412 && ASC2_2416 && ASC2_3216 !"
+#endif
+
+#ifdef ASC2_1608
+const uint8_t asc2_1608[]={
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
+0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x10,0x10,0x00,0x00,0x00,/*"!",1*/
+0x00,0x00,0x00,0x28,0x28,0x28,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
+0x00,0x00,0x00,0x12,0x12,0x16,0x7F,0x24,0x24,0xFE,0x28,0x48,0x48,0x00,0x00,0x00,/*"#",3*/
+0x00,0x00,0x08,0x08,0x3E,0x49,0x48,0x68,0x3E,0x0B,0x09,0x49,0x3E,0x08,0x08,0x00,/*"$",4*/
+0x00,0x00,0x00,0x60,0x90,0x90,0x62,0x0C,0x30,0x46,0x09,0x09,0x06,0x00,0x00,0x00,/*"%",5*/
+0x00,0x00,0x00,0x1C,0x20,0x20,0x30,0x30,0x49,0x45,0x45,0x62,0x3D,0x00,0x00,0x00,/*"&",6*/
+0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
+0x00,0x00,0x0C,0x08,0x08,0x10,0x10,0x10,0x10,0x10,0x10,0x08,0x08,0x04,0x00,0x00,/*"(",8*/
+0x00,0x00,0x30,0x10,0x10,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x10,0x30,0x00,0x00,/*")",9*/
+0x00,0x00,0x00,0x08,0x49,0x3E,0x1C,0x6B,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
+0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10,0xFE,0x10,0x10,0x10,0x00,0x00,0x00,0x00,/*"+",11*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x10,0x20,0x00,/*",",12*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,/*".",14*/
+0x00,0x00,0x00,0x02,0x04,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x20,0x20,0x40,0x00,/*"/",15*/
+0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x49,0x41,0x41,0x41,0x22,0x1C,0x00,0x00,0x00,/*"0",16*/
+0x00,0x00,0x00,0x18,0x28,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x3E,0x00,0x00,0x00,/*"1",17*/
+0x00,0x00,0x00,0x3E,0x43,0x01,0x01,0x02,0x06,0x0C,0x10,0x20,0x7F,0x00,0x00,0x00,/*"2",18*/
+0x00,0x00,0x00,0x3E,0x41,0x01,0x03,0x1C,0x03,0x01,0x01,0x43,0x3E,0x00,0x00,0x00,/*"3",19*/
+0x00,0x00,0x00,0x06,0x0A,0x1A,0x12,0x22,0x42,0x7F,0x02,0x02,0x02,0x00,0x00,0x00,/*"4",20*/
+0x00,0x00,0x00,0x7E,0x40,0x40,0x7C,0x42,0x01,0x01,0x01,0x42,0x3C,0x00,0x00,0x00,/*"5",21*/
+0x00,0x00,0x00,0x1E,0x31,0x60,0x40,0x5E,0x63,0x41,0x41,0x23,0x1E,0x00,0x00,0x00,/*"6",22*/
+0x00,0x00,0x00,0x7F,0x03,0x02,0x04,0x04,0x08,0x08,0x10,0x10,0x20,0x00,0x00,0x00,/*"7",23*/
+0x00,0x00,0x00,0x3E,0x41,0x41,0x41,0x3E,0x63,0x41,0x41,0x63,0x3E,0x00,0x00,0x00,/*"8",24*/
+0x00,0x00,0x00,0x3C,0x62,0x41,0x41,0x63,0x3D,0x01,0x03,0x46,0x3C,0x00,0x00,0x00,/*"9",25*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,/*":",26*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x10,0x20,0x00,/*";",27*/
+0x00,0x00,0x00,0x00,0x00,0x01,0x0E,0x38,0x40,0x38,0x0E,0x01,0x00,0x00,0x00,0x00,/*"<",28*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x00,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
+0x00,0x00,0x00,0x00,0x00,0x40,0x38,0x0E,0x01,0x0E,0x38,0x40,0x00,0x00,0x00,0x00,/*">",30*/
+0x00,0x00,0x00,0x38,0x44,0x04,0x0C,0x18,0x10,0x10,0x00,0x10,0x10,0x00,0x00,0x00,/*"?",31*/
+0x00,0x00,0x00,0x1E,0x33,0x21,0x47,0x49,0x49,0x49,0x49,0x47,0x20,0x30,0x0E,0x00,/*"@",32*/
+0x00,0x00,0x00,0x08,0x14,0x14,0x14,0x14,0x22,0x3E,0x22,0x41,0x41,0x00,0x00,0x00,/*"A",33*/
+0x00,0x00,0x00,0x7E,0x41,0x41,0x41,0x7E,0x43,0x41,0x41,0x43,0x7E,0x00,0x00,0x00,/*"B",34*/
+0x00,0x00,0x00,0x1E,0x21,0x40,0x40,0x40,0x40,0x40,0x40,0x21,0x1E,0x00,0x00,0x00,/*"C",35*/
+0x00,0x00,0x00,0x7C,0x42,0x41,0x41,0x41,0x41,0x41,0x41,0x42,0x7C,0x00,0x00,0x00,/*"D",36*/
+0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x7F,0x40,0x40,0x40,0x40,0x7F,0x00,0x00,0x00,/*"E",37*/
+0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x7F,0x40,0x40,0x40,0x40,0x40,0x00,0x00,0x00,/*"F",38*/
+0x00,0x00,0x00,0x1E,0x21,0x40,0x40,0x40,0x43,0x41,0x41,0x21,0x1E,0x00,0x00,0x00,/*"G",39*/
+0x00,0x00,0x00,0x41,0x41,0x41,0x41,0x7F,0x41,0x41,0x41,0x41,0x41,0x00,0x00,0x00,/*"H",40*/
+0x00,0x00,0x00,0x7C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x7C,0x00,0x00,0x00,/*"I",41*/
+0x00,0x00,0x00,0x1C,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x44,0x38,0x00,0x00,0x00,/*"J",42*/
+0x00,0x00,0x00,0x42,0x44,0x48,0x50,0x70,0x78,0x48,0x44,0x46,0x42,0x00,0x00,0x00,/*"K",43*/
+0x00,0x00,0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x7F,0x00,0x00,0x00,/*"L",44*/
+0x00,0x00,0x00,0x63,0x63,0x55,0x55,0x55,0x49,0x41,0x41,0x41,0x41,0x00,0x00,0x00,/*"M",45*/
+0x00,0x00,0x00,0x61,0x61,0x51,0x51,0x49,0x49,0x45,0x45,0x43,0x43,0x00,0x00,0x00,/*"N",46*/
+0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x41,0x41,0x41,0x41,0x22,0x1C,0x00,0x00,0x00,/*"O",47*/
+0x00,0x00,0x00,0x7E,0x43,0x41,0x41,0x43,0x7E,0x40,0x40,0x40,0x40,0x00,0x00,0x00,/*"P",48*/
+0x00,0x00,0x00,0x1C,0x22,0x41,0x41,0x41,0x41,0x41,0x41,0x22,0x1E,0x06,0x02,0x00,/*"Q",49*/
+0x00,0x00,0x00,0x7E,0x43,0x41,0x41,0x43,0x7C,0x42,0x41,0x41,0x40,0x00,0x00,0x00,/*"R",50*/
+0x00,0x00,0x00,0x1E,0x61,0x40,0x40,0x30,0x0E,0x01,0x01,0x43,0x3E,0x00,0x00,0x00,/*"S",51*/
+0x00,0x00,0x00,0xFE,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"T",52*/
+0x00,0x00,0x00,0x41,0x41,0x41,0x41,0x41,0x41,0x41,0x41,0x63,0x3E,0x00,0x00,0x00,/*"U",53*/
+0x00,0x00,0x00,0x41,0x41,0x22,0x22,0x22,0x14,0x14,0x14,0x14,0x08,0x00,0x00,0x00,/*"V",54*/
+0x00,0x00,0x00,0x81,0x81,0x81,0x5A,0x5A,0x5A,0x66,0x66,0x66,0x66,0x00,0x00,0x00,/*"W",55*/
+0x00,0x00,0x00,0x41,0x22,0x14,0x14,0x08,0x14,0x14,0x22,0x22,0x41,0x00,0x00,0x00,/*"X",56*/
+0x00,0x00,0x00,0x82,0x44,0x44,0x28,0x38,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"Y",57*/
+0x00,0x00,0x00,0x7F,0x03,0x02,0x04,0x08,0x08,0x10,0x20,0x60,0x7F,0x00,0x00,0x00,/*"Z",58*/
+0x00,0x00,0x1C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x1C,0x00,0x00,/*"[",59*/
+0x00,0x00,0x00,0x40,0x20,0x20,0x20,0x10,0x10,0x08,0x08,0x04,0x04,0x04,0x02,0x00,/*"\",60*/
+0x00,0x00,0x38,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x38,0x00,0x00,/*"]",61*/
+0x00,0x00,0x00,0x10,0x28,0x44,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,/*"_",63*/
+0x00,0x30,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
+0x00,0x00,0x00,0x00,0x00,0x1C,0x22,0x02,0x3E,0x42,0x42,0x46,0x3A,0x00,0x00,0x00,/*"a",65*/
+0x00,0x00,0x40,0x40,0x40,0x7C,0x64,0x42,0x42,0x42,0x42,0x64,0x5C,0x00,0x00,0x00,/*"b",66*/
+0x00,0x00,0x00,0x00,0x00,0x1C,0x22,0x40,0x40,0x40,0x40,0x22,0x1C,0x00,0x00,0x00,/*"c",67*/
+0x00,0x00,0x02,0x02,0x02,0x3E,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x00,0x00,0x00,/*"d",68*/
+0x00,0x00,0x00,0x00,0x00,0x3C,0x26,0x42,0x7E,0x40,0x40,0x22,0x1C,0x00,0x00,0x00,/*"e",69*/
+0x00,0x00,0x0C,0x10,0x10,0x7C,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x00,0x00,/*"f",70*/
+0x00,0x00,0x00,0x00,0x00,0x3A,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x02,0x22,0x1C,/*"g",71*/
+0x00,0x00,0x40,0x40,0x40,0x5C,0x62,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00,/*"h",72*/
+0x00,0x00,0x10,0x10,0x00,0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x7C,0x00,0x00,0x00,/*"i",73*/
+0x00,0x00,0x08,0x08,0x00,0x38,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x70,/*"j",74*/
+0x00,0x00,0x40,0x40,0x40,0x44,0x48,0x50,0x70,0x48,0x48,0x44,0x42,0x00,0x00,0x00,/*"k",75*/
+0x00,0x00,0x70,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x0E,0x00,0x00,0x00,/*"l",76*/
+0x00,0x00,0x00,0x00,0x00,0x7E,0x49,0x49,0x49,0x49,0x49,0x49,0x49,0x00,0x00,0x00,/*"m",77*/
+0x00,0x00,0x00,0x00,0x00,0x5C,0x62,0x42,0x42,0x42,0x42,0x42,0x42,0x00,0x00,0x00,/*"n",78*/
+0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,/*"o",79*/
+0x00,0x00,0x00,0x00,0x00,0x5C,0x64,0x42,0x42,0x42,0x42,0x64,0x7C,0x40,0x40,0x40,/*"p",80*/
+0x00,0x00,0x00,0x00,0x00,0x3A,0x26,0x42,0x42,0x42,0x42,0x26,0x3A,0x02,0x02,0x02,/*"q",81*/
+0x00,0x00,0x00,0x00,0x00,0x3C,0x32,0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x00,0x00,/*"r",82*/
+0x00,0x00,0x00,0x00,0x00,0x3C,0x42,0x40,0x70,0x0E,0x02,0x42,0x3C,0x00,0x00,0x00,/*"s",83*/
+0x00,0x00,0x00,0x10,0x10,0x7E,0x10,0x10,0x10,0x10,0x10,0x10,0x0E,0x00,0x00,0x00,/*"t",84*/
+0x00,0x00,0x00,0x00,0x00,0x42,0x42,0x42,0x42,0x42,0x42,0x46,0x3A,0x00,0x00,0x00,/*"u",85*/
+0x00,0x00,0x00,0x00,0x00,0x42,0x42,0x24,0x24,0x24,0x18,0x18,0x18,0x00,0x00,0x00,/*"v",86*/
+0x00,0x00,0x00,0x00,0x00,0x81,0x81,0x5A,0x5A,0x5A,0x5A,0x24,0x24,0x00,0x00,0x00,/*"w",87*/
+0x00,0x00,0x00,0x00,0x00,0x42,0x24,0x18,0x18,0x18,0x24,0x24,0x42,0x00,0x00,0x00,/*"x",88*/
+0x00,0x00,0x00,0x00,0x00,0x42,0x22,0x24,0x24,0x14,0x18,0x18,0x08,0x08,0x10,0x30,/*"y",89*/
+0x00,0x00,0x00,0x00,0x00,0x7E,0x02,0x04,0x08,0x10,0x20,0x40,0x7E,0x00,0x00,0x00,/*"z",90*/
+0x00,0x00,0x0C,0x10,0x10,0x10,0x10,0x10,0x60,0x10,0x10,0x10,0x10,0x10,0x0C,0x00,/*"{",91*/
+0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,/*"|",92*/
+0x00,0x00,0x60,0x10,0x10,0x10,0x10,0x10,0x0C,0x10,0x10,0x10,0x10,0x10,0x60,0x00,/*"}",93*/
+};
+#endif
+
+#ifdef ASC2_2412
+const uint8_t asc2_2412[]={
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"!",1*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x19,0x80,0x19,0x80,0x19,0x80,0x19,0x80,
+0x19,0x80,0x19,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x60,0x04,0x40,0x0C,0xC0,0x0C,0xC0,
+0x7F,0xF0,0x7F,0xF0,0x08,0x80,0x19,0x80,0x19,0x80,0xFF,0xE0,0xFF,0xE0,0x33,0x00,
+0x33,0x00,0x22,0x00,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"#",3*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x02,0x00,0x0F,0x80,0x1F,0xC0,0x3A,0x40,
+0x32,0x00,0x32,0x00,0x3A,0x00,0x1F,0x00,0x07,0xC0,0x02,0xE0,0x02,0x60,0x02,0x60,
+0x22,0xE0,0x3F,0xC0,0x1F,0x80,0x02,0x00,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,/*"$",4*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x48,0x00,0xCC,0x00,0xCC,0x00,
+0xCC,0x00,0x48,0x40,0x79,0xC0,0x0E,0x00,0x73,0xC0,0x02,0x40,0x06,0x60,0x06,0x60,
+0x06,0x60,0x02,0x40,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"%",5*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0x80,0x18,0x00,0x18,0x00,
+0x18,0x00,0x0C,0x00,0x1E,0x00,0x36,0x30,0x63,0x30,0x63,0xB0,0x61,0xA0,0x60,0xE0,
+0x30,0xC0,0x3F,0x60,0x0E,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"&",6*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x02,0x00,0x06,0x00,0x06,0x00,
+0x04,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x04,0x00,0x06,0x00,0x06,0x00,0x02,0x00,0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,/*"(",8*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x04,0x00,0x04,0x00,0x06,0x00,0x06,0x00,
+0x02,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x02,0x00,0x06,0x00,0x06,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x00,0x00,0x00,0x00,/*")",9*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x44,0x40,0x35,0x80,
+0x0E,0x00,0x0E,0x00,0x35,0x80,0x44,0x40,0x04,0x00,0x04,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x7F,0xE0,0x7F,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"+",11*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,/*",",12*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*".",14*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0xC0,0x00,0xC0,0x01,0x80,
+0x01,0x80,0x03,0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,
+0x18,0x00,0x18,0x00,0x30,0x00,0x30,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"/",15*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1E,0x00,0x3F,0x80,0x31,0x80,0x71,0xC0,
+0x60,0xC0,0x60,0xC0,0x66,0xC0,0x66,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x71,0xC0,
+0x31,0x80,0x3F,0x80,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"0",16*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x1F,0x00,0x1B,0x00,0x03,0x00,
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x03,0x00,0x1F,0xE0,0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"1",17*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x00,0x7F,0x80,0x41,0xC0,0x00,0xC0,
+0x00,0xC0,0x00,0xC0,0x01,0xC0,0x01,0x80,0x03,0x00,0x06,0x00,0x0C,0x00,0x18,0x00,
+0x30,0x00,0x7F,0xC0,0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"2",18*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x00,0x7F,0x80,0x41,0xC0,0x00,0xC0,
+0x00,0xC0,0x01,0xC0,0x0F,0x80,0x0F,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0xC0,
+0x41,0xC0,0x7F,0x80,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"3",19*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x07,0x80,0x05,0x80,
+0x0D,0x80,0x09,0x80,0x19,0x80,0x31,0x80,0x31,0x80,0x61,0x80,0x7F,0xE0,0x7F,0xE0,
+0x01,0x80,0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"4",20*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x80,0x3F,0x80,0x30,0x00,0x30,0x00,
+0x30,0x00,0x3F,0x00,0x3F,0x80,0x21,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
+0x41,0x80,0x7F,0x80,0x3E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"5",21*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x1F,0x80,0x38,0x80,0x30,0x00,
+0x70,0x00,0x60,0x00,0x6F,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x31,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"6",22*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xC0,0x7F,0xC0,0x01,0x80,0x01,0x80,
+0x01,0x80,0x03,0x00,0x03,0x00,0x03,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,
+0x0C,0x00,0x0C,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"7",23*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x3F,0x80,0x71,0xC0,0x60,0xC0,
+0x60,0xC0,0x31,0x80,0x1F,0x00,0x3F,0x80,0x31,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x71,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"8",24*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x3F,0x80,0x71,0x80,0x60,0xC0,
+0x60,0xC0,0x60,0xC0,0x71,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x00,0xC0,0x01,0x80,
+0x23,0x80,0x3F,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"9",25*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*":",26*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,/*";",27*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,
+0x01,0xE0,0x07,0x80,0x1E,0x00,0x70,0x00,0x70,0x00,0x1E,0x00,0x07,0x80,0x01,0xE0,
+0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"<",28*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,
+0x78,0x00,0x1E,0x00,0x07,0x80,0x00,0xE0,0x00,0xE0,0x07,0x80,0x1E,0x00,0x78,0x00,
+0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*">",30*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0xC0,0x10,0x60,0x00,0x60,
+0x00,0xE0,0x01,0xC0,0x03,0x80,0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"?",31*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x18,0xC0,0x30,0x60,
+0x30,0x60,0x23,0xE0,0x62,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,
+0x62,0x60,0x33,0xE0,0x30,0x00,0x18,0x00,0x1C,0x00,0x07,0x80,0x00,0x00,0x00,0x00,/*"@",32*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x0F,0x00,0x0F,0x00,
+0x0F,0x00,0x1F,0x80,0x19,0x80,0x19,0x80,0x19,0x80,0x3F,0xC0,0x3F,0xC0,0x30,0xC0,
+0x30,0xC0,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"A",33*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x7F,0x80,0x61,0xC0,0x60,0xC0,
+0x60,0xC0,0x61,0xC0,0x7F,0x80,0x7F,0x80,0x60,0xC0,0x60,0x60,0x60,0x60,0x60,0x60,
+0x60,0xE0,0x7F,0xC0,0x7F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"B",34*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x1F,0xE0,0x38,0x20,0x30,0x00,
+0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x30,0x00,
+0x38,0x20,0x1F,0xE0,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"C",35*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x7F,0x80,0x61,0xC0,0x60,0xC0,
+0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0xC0,
+0x61,0xC0,0x7F,0x80,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"D",36*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,
+0x60,0x00,0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"E",37*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x60,0x00,0x60,0x00,
+0x60,0x00,0x60,0x00,0x7F,0xC0,0x7F,0xC0,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"F",38*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x1F,0xC0,0x38,0x40,0x30,0x00,
+0x60,0x00,0x60,0x00,0x60,0x00,0x61,0xE0,0x61,0xE0,0x60,0x60,0x60,0x60,0x30,0x60,
+0x38,0x60,0x1F,0xE0,0x0F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"G",39*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
+0x60,0x60,0x60,0x60,0x7F,0xE0,0x7F,0xE0,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
+0x60,0x60,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"H",40*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x3F,0xC0,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x3F,0xC0,0x3F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"I",41*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x1F,0x80,0x01,0x80,0x01,0x80,
+0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
+0x43,0x80,0x7F,0x00,0x3E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"J",42*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0xC0,0x61,0x80,0x63,0x00,
+0x66,0x00,0x6C,0x00,0x7C,0x00,0x7E,0x00,0x76,0x00,0x63,0x00,0x63,0x80,0x61,0x80,
+0x60,0xC0,0x60,0xE0,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"K",43*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x60,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"L",44*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x70,0xE0,0x70,0xE0,0x79,0xE0,
+0x69,0x60,0x69,0x60,0x6F,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x60,0x60,0x60,0x60,
+0x60,0x60,0x60,0x60,0x60,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"M",45*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x60,0x70,0x60,0x78,0x60,0x78,0x60,
+0x6C,0x60,0x6C,0x60,0x64,0x60,0x66,0x60,0x62,0x60,0x63,0x60,0x63,0x60,0x61,0xE0,
+0x61,0xE0,0x60,0xE0,0x60,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"N",46*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x3F,0xC0,0x30,0xC0,0x70,0xE0,
+0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x70,0xE0,
+0x30,0xC0,0x3F,0xC0,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"O",47*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x80,0x7F,0xC0,0x60,0xE0,0x60,0x60,
+0x60,0x60,0x60,0x60,0x60,0xE0,0x7F,0xC0,0x7F,0x80,0x60,0x00,0x60,0x00,0x60,0x00,
+0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"P",48*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x3F,0xC0,0x30,0xC0,0x70,0xE0,
+0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x70,0xE0,
+0x30,0xC0,0x1F,0x80,0x0F,0x00,0x01,0x80,0x00,0xC0,0x00,0x80,0x00,0x00,0x00,0x00,/*"Q",49*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x7F,0xC0,0x60,0xE0,0x60,0x60,
+0x60,0x60,0x60,0x60,0x60,0xC0,0x7F,0xC0,0x7F,0x80,0x61,0xC0,0x60,0xC0,0x60,0x60,
+0x60,0x60,0x60,0x30,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"R",50*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x3F,0xC0,0x70,0x40,0x60,0x00,
+0x60,0x00,0x70,0x00,0x3E,0x00,0x1F,0x80,0x01,0xC0,0x00,0x60,0x00,0x60,0x00,0x60,
+0x40,0xE0,0x7F,0xC0,0x3F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"S",51*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xF0,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"T",52*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
+0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,
+0x70,0xE0,0x3F,0xC0,0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"U",53*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x60,0x60,0x60,0x30,0xC0,0x30,0xC0,
+0x30,0xC0,0x30,0xC0,0x19,0x80,0x19,0x80,0x19,0x80,0x1F,0x80,0x0F,0x00,0x0F,0x00,
+0x0F,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"V",54*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x30,0xC0,0x30,0xC0,0x30,0x60,0x60,
+0x66,0x60,0x66,0x60,0x6F,0x60,0x6F,0x60,0x69,0x60,0x69,0x60,0x39,0xC0,0x39,0xC0,
+0x39,0xC0,0x30,0xC0,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"W",55*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x30,0xC0,0x39,0xC0,0x19,0x80,
+0x0F,0x00,0x0F,0x00,0x06,0x00,0x06,0x00,0x0F,0x00,0x0F,0x00,0x1B,0x80,0x19,0x80,
+0x31,0xC0,0x30,0xC0,0x60,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"X",56*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x70,0x60,0x60,0x30,0xC0,0x30,0xC0,
+0x19,0x80,0x1F,0x80,0x0F,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Y",57*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0xC0,0x01,0xC0,
+0x01,0x80,0x03,0x00,0x07,0x00,0x06,0x00,0x0E,0x00,0x0C,0x00,0x18,0x00,0x38,0x00,
+0x30,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Z",58*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x07,0x80,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x07,0x80,0x07,0x80,0x00,0x00,0x00,0x00,/*"[",59*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x30,0x00,0x30,0x00,0x18,0x00,
+0x18,0x00,0x0C,0x00,0x0C,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x03,0x00,0x03,0x00,
+0x01,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,/*"\",60*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x0F,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,/*"]",61*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0F,0x80,0x0D,0x80,0x18,0xC0,
+0x30,0x60,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xF0,/*"_",63*/
+0x00,0x00,0x00,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1F,0x00,0x3F,0x80,0x21,0xC0,0x00,0xC0,0x1F,0xC0,0x3F,0xC0,0x70,0xC0,0x60,0xC0,
+0x61,0xC0,0x7F,0xC0,0x1C,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"a",65*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x6F,0x00,0x7F,0x80,0x71,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x71,0x80,0x7F,0x80,0x6F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"b",66*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x0F,0x00,0x3F,0x80,0x30,0x80,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x30,0x80,0x3F,0x80,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"c",67*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,
+0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"d",68*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x0F,0x00,0x3F,0x80,0x31,0xC0,0x60,0xC0,0x7F,0xC0,0x7F,0xC0,0x60,0x00,0x60,0x00,
+0x30,0x40,0x3F,0xC0,0x0F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"e",69*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x03,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,
+0x3F,0xE0,0x3F,0xE0,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"f",70*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x21,0xC0,0x3F,0x80,0x1F,0x00,0x00,0x00,/*"g",71*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x67,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x60,0xC0,0x60,0xC0,0x60,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"h",72*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x3E,0x00,0x3E,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x7F,0xE0,0x7F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"i",73*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1F,0x00,0x1F,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,
+0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x03,0x00,0x3E,0x00,0x3C,0x00,0x00,0x00,/*"j",74*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,
+0x61,0xC0,0x63,0x80,0x67,0x00,0x6E,0x00,0x7C,0x00,0x7C,0x00,0x76,0x00,0x67,0x00,
+0x63,0x00,0x61,0x80,0x61,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"k",75*/
+0x00,0x00,0x00,0x00,0x00,0x00,0xFC,0x00,0xFC,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x0E,0x00,0x07,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"l",76*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x6D,0xC0,0x7F,0xE0,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x66,0x60,
+0x66,0x60,0x66,0x60,0x66,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"m",77*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x67,0x00,0x7F,0x80,0x71,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x60,0xC0,0x60,0xC0,0x60,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"n",78*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1F,0x00,0x3F,0x80,0x31,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x31,0x80,0x3F,0x80,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"o",79*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x6F,0x00,0x7F,0x80,0x71,0x80,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x71,0x80,0x7F,0x80,0x6F,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x60,0x00,0x00,0x00,/*"p",80*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1E,0xC0,0x3F,0xC0,0x31,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x31,0xC0,0x3F,0xC0,0x1E,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0xC0,0x00,0x00,/*"q",81*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x0C,0xE0,0x0D,0xF0,0x0F,0x10,0x0E,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x0C,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"r",82*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1F,0x80,0x3F,0xC0,0x60,0x40,0x60,0x00,0x7F,0x00,0x1F,0x80,0x01,0xC0,0x00,0xC0,
+0x41,0xC0,0x7F,0x80,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"s",83*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x7F,0xC0,0x7F,0xC0,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,
+0x0C,0x00,0x0F,0xC0,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"t",84*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,0x60,0xC0,
+0x71,0xC0,0x3F,0xC0,0x1C,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"u",85*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x60,0xC0,0x71,0xC0,0x31,0x80,0x31,0x80,0x3B,0x80,0x1B,0x00,0x1B,0x00,0x1B,0x00,
+0x0E,0x00,0x0E,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"v",86*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xC0,0x30,0xC0,0x30,0x60,0x60,0x66,0x60,0x66,0x60,0x66,0x60,0x3F,0xC0,0x39,0xC0,
+0x39,0xC0,0x39,0xC0,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"w",87*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x71,0xC0,0x31,0x80,0x1B,0x00,0x1F,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1F,0x00,
+0x1B,0x00,0x31,0x80,0x71,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"x",88*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x60,0xC0,0x31,0x80,0x31,0x80,0x31,0x80,0x1B,0x00,0x1B,0x00,0x1F,0x00,0x0E,0x00,
+0x0E,0x00,0x06,0x00,0x0C,0x00,0x0C,0x00,0x0C,0x00,0x38,0x00,0x38,0x00,0x00,0x00,/*"y",89*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x7F,0xC0,0x7F,0xC0,0x03,0x80,0x03,0x00,0x07,0x00,0x0E,0x00,0x1C,0x00,0x18,0x00,
+0x30,0x00,0x7F,0xC0,0x7F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"z",90*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x07,0xC0,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x3C,0x00,0x3C,0x00,0x0E,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x07,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,/*"{",91*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,/*"|",92*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x3E,0x00,0x06,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x03,0xC0,0x03,0xC0,0x07,0x00,0x06,0x00,0x06,0x00,
+0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x3E,0x00,0x3C,0x00,0x00,0x00,0x00,0x00,/*"}",93*/
+};
+#endif
+
+#ifdef ASC2_3216
+const uint8_t asc2_3216[]={
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*" ",0*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"!",1*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x30,0x06,0x30,
+0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x06,0x30,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*""",2*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x8C,0x03,0x8C,0x03,0x0C,
+0x03,0x18,0x03,0x18,0x03,0x18,0x7F,0xFF,0x7F,0xFF,0x06,0x30,0x06,0x30,0x0E,0x30,
+0x0C,0x70,0x0C,0x60,0xFF,0xFE,0xFF,0xFE,0x18,0x60,0x18,0xC0,0x18,0xC0,0x18,0xC0,
+0x30,0xC0,0x31,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"#",3*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,
+0x03,0xF0,0x0F,0xFC,0x0E,0x8C,0x1C,0x80,0x1C,0x80,0x1C,0x80,0x1C,0x80,0x0E,0x80,
+0x0F,0xE0,0x03,0xF8,0x00,0xFC,0x00,0x9E,0x00,0x8E,0x00,0x8E,0x00,0x8E,0x10,0x9C,
+0x1F,0xF8,0x07,0xF0,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00,0x00,0x00,/*"$",4*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x7E,0x00,
+0xE7,0x00,0xC3,0x00,0xC3,0x00,0xC3,0x00,0xE7,0x00,0x7E,0x1C,0x3C,0x78,0x01,0xC0,
+0x07,0x00,0x3C,0x78,0x70,0xFC,0x01,0xCE,0x01,0x86,0x01,0x86,0x01,0x86,0x01,0xCE,
+0x00,0xFC,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"%",5*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x0F,0xE0,
+0x1E,0x20,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x00,0x0E,0x00,0x0F,0x00,0x1F,0x00,
+0x3F,0x83,0x33,0xC3,0x71,0xE3,0x70,0xE3,0x70,0xF6,0x70,0x7E,0x78,0x3C,0x3C,0x3E,
+0x1F,0xEE,0x07,0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"&",6*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,
+0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"'",7*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x60,0x00,0x60,
+0x00,0xE0,0x00,0xC0,0x01,0xC0,0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0x80,0x01,0xC0,
+0x01,0xC0,0x00,0xC0,0x00,0xE0,0x00,0x60,0x00,0x60,0x00,0x30,0x00,0x00,0x00,0x00,/*"(",8*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x03,0x00,0x03,0x00,
+0x03,0x80,0x01,0x80,0x01,0xC0,0x01,0xC0,0x00,0xC0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x00,0x03,0x00,0x06,0x00,0x00,0x00,0x00,0x00,/*")",9*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,
+0x21,0x84,0x39,0x9C,0x0F,0xF0,0x03,0xC0,0x03,0xC0,0x0F,0xF0,0x39,0x9C,0x21,0x84,
+0x01,0x80,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"*",10*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
+0x7F,0xFE,0x7F,0xFE,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"+",11*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0x80,0x03,0x80,0x03,0x80,0x03,0x00,0x00,0x00,0x00,0x00,/*",",12*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x07,0xF0,0x07,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"-",13*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*".",14*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x38,
+0x00,0x38,0x00,0x70,0x00,0x70,0x00,0x70,0x00,0xE0,0x00,0xE0,0x01,0xC0,0x01,0xC0,
+0x03,0x80,0x03,0x80,0x03,0x80,0x07,0x00,0x07,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"/",15*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
+0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x39,0xCE,0x39,0xCE,
+0x39,0xCE,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
+0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"0",16*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xE0,
+0x0C,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x0F,0xFE,0x0F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"1",17*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x3F,0xF8,
+0x38,0x3C,0x20,0x1E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1E,0x00,0x3C,
+0x00,0x7C,0x00,0xF8,0x00,0xF0,0x01,0xE0,0x03,0xC0,0x07,0x00,0x0E,0x00,0x1C,0x00,
+0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"2",18*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xF8,
+0x18,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x3C,0x07,0xF0,0x07,0xF0,
+0x00,0x3C,0x00,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1E,0x30,0x3C,
+0x3F,0xF8,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"3",19*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x00,0xF0,
+0x01,0xF0,0x01,0xF0,0x03,0x70,0x07,0x70,0x06,0x70,0x0C,0x70,0x0C,0x70,0x18,0x70,
+0x38,0x70,0x30,0x70,0x60,0x70,0x7F,0xFE,0x7F,0xFE,0x00,0x70,0x00,0x70,0x00,0x70,
+0x00,0x70,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"4",20*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xE0,0x1F,0xF8,0x10,0x3C,0x00,0x1C,
+0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x20,0x3C,
+0x3F,0xF8,0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"5",21*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
+0x0F,0x04,0x1E,0x00,0x1C,0x00,0x1C,0x00,0x38,0x00,0x39,0xF0,0x3B,0xF8,0x3E,0x3C,
+0x3C,0x1E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x18,0x0E,0x1C,0x1C,0x0E,0x3C,
+0x0F,0xF8,0x03,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"6",22*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFE,0x3F,0xFE,
+0x00,0x1E,0x00,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x70,0x00,0x70,
+0x00,0xF0,0x00,0xE0,0x00,0xE0,0x01,0xE0,0x01,0xC0,0x01,0xC0,0x03,0x80,0x03,0x80,
+0x03,0x80,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"7",23*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xFC,
+0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x07,0xF0,0x0F,0xF8,
+0x1E,0x3C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3C,0x1E,0x1E,0x3C,
+0x0F,0xF8,0x07,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"8",24*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x0F,0xF8,
+0x1E,0x38,0x3C,0x1C,0x38,0x0C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3C,0x1E,
+0x1E,0x3E,0x0F,0xEE,0x07,0xCE,0x00,0x0E,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x10,0x78,
+0x1F,0xF0,0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"9",25*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*":",26*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x00,0x07,0x00,0x07,0x00,0x06,0x00,0x00,0x00,0x00,0x00,/*";",27*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x1E,0x00,0x7E,0x01,0xF8,0x0F,0xC0,0x3F,0x00,
+0x78,0x00,0x78,0x00,0x3F,0x00,0x0F,0xC0,0x01,0xF8,0x00,0x7E,0x00,0x1E,0x00,0x02,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"<",28*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x7F,0xFE,
+0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"=",29*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x40,0x00,0x78,0x00,0x7E,0x00,0x1F,0x80,0x03,0xF0,0x00,0xFC,
+0x00,0x1E,0x00,0x1E,0x00,0xFC,0x03,0xF0,0x1F,0x80,0x7E,0x00,0x78,0x00,0x40,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*">",30*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
+0x1C,0x38,0x10,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x78,0x00,0xF0,0x01,0xE0,
+0x03,0xC0,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x03,0x80,
+0x03,0x80,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"?",31*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,
+0x07,0xFC,0x0E,0x0E,0x1C,0x06,0x18,0x03,0x30,0x03,0x30,0x7B,0x61,0xFF,0x61,0x87,
+0x63,0x03,0x63,0x03,0x63,0x03,0x63,0x03,0x63,0x03,0x61,0x87,0x71,0xFF,0x30,0x7B,
+0x30,0x00,0x18,0x00,0x1C,0x00,0x0F,0x04,0x03,0xFC,0x00,0xFC,0x00,0x00,0x00,0x00,/*"@",32*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x03,0xE0,
+0x03,0xE0,0x03,0xE0,0x03,0xE0,0x07,0x70,0x07,0x70,0x07,0x70,0x0F,0x78,0x0E,0x38,
+0x0E,0x38,0x0E,0x38,0x1F,0xFC,0x1F,0xFC,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,
+0x78,0x0F,0x70,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"A",33*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xE0,0x3F,0xF8,
+0x38,0x38,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x38,0x3F,0xF0,0x3F,0xF0,
+0x38,0x3C,0x38,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x1E,0x38,0x3C,
+0x3F,0xF8,0x3F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"B",34*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
+0x0F,0x0C,0x1E,0x04,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,
+0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x04,0x0F,0x0C,
+0x07,0xFC,0x01,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"C",35*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x3F,0xF0,
+0x38,0x78,0x38,0x1C,0x38,0x1C,0x38,0x0C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0C,0x38,0x1C,0x38,0x1C,0x38,0x78,
+0x3F,0xF0,0x3F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"D",36*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFE,0x1F,0xFE,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xFC,0x1F,0xFC,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1F,0xFE,0x1F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"E",37*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFE,0x1F,0xFE,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1F,0xFC,0x1F,0xFC,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"F",38*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF8,0x07,0xFC,
+0x0F,0x0C,0x1E,0x04,0x1C,0x00,0x1C,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x7E,
+0x38,0x7E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x0E,0x1C,0x0E,0x1C,0x0E,0x0F,0x1E,
+0x07,0xFE,0x01,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"G",39*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x0E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x3F,0xFE,0x3F,0xFE,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"H",40*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x1F,0xFC,0x1F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"I",41*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x07,0xF8,
+0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,
+0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x20,0x38,0x30,0x70,
+0x3F,0xF0,0x0F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"J",42*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x07,0x38,0x0E,
+0x38,0x1C,0x38,0x38,0x38,0x70,0x38,0xE0,0x39,0xC0,0x3B,0x80,0x3F,0x80,0x3F,0xC0,
+0x3F,0xC0,0x3D,0xE0,0x38,0xF0,0x38,0x70,0x38,0x78,0x38,0x3C,0x38,0x1C,0x38,0x1E,
+0x38,0x0F,0x38,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"K",43*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1F,0xFE,0x1F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"L",44*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x1E,0x78,0x1E,
+0x7C,0x3E,0x7C,0x3E,0x7C,0x3E,0x76,0x6E,0x76,0x6E,0x76,0x6E,0x72,0x4E,0x73,0xCE,
+0x73,0xCE,0x71,0x8E,0x71,0x8E,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x70,0x0E,
+0x70,0x0E,0x70,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"M",45*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x0E,0x3C,0x0E,
+0x3E,0x0E,0x3E,0x0E,0x3E,0x0E,0x3B,0x0E,0x3B,0x0E,0x3B,0x8E,0x39,0x8E,0x39,0x8E,
+0x38,0xCE,0x38,0xCE,0x38,0xEE,0x38,0x6E,0x38,0x6E,0x38,0x3E,0x38,0x3E,0x38,0x3E,
+0x38,0x1E,0x38,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"N",46*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
+0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
+0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"O",47*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xF0,0x1F,0xFC,
+0x1C,0x1E,0x1C,0x0F,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x0F,0x1C,0x1E,
+0x1F,0xFC,0x1F,0xF0,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"P",48*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,
+0x0E,0x38,0x1C,0x1C,0x1C,0x1C,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x0E,0x38,
+0x0F,0xF8,0x03,0xE0,0x00,0x70,0x00,0x38,0x00,0x1C,0x00,0x10,0x00,0x00,0x00,0x00,/*"Q",49*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xE0,0x3F,0xF0,
+0x38,0x78,0x38,0x3C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x38,
+0x3F,0xF0,0x3F,0xE0,0x38,0xF0,0x38,0x78,0x38,0x38,0x38,0x3C,0x38,0x1C,0x38,0x1E,
+0x38,0x0E,0x38,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"R",50*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x0F,0xFC,
+0x1E,0x0C,0x3C,0x04,0x38,0x00,0x38,0x00,0x38,0x00,0x3E,0x00,0x1F,0xC0,0x0F,0xF8,
+0x03,0xFC,0x00,0x3C,0x00,0x1E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x20,0x1E,0x38,0x3C,
+0x3F,0xF8,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"S",51*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFF,0x7F,0xFF,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"T",52*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x1C,0x38,0x1C,
+0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,
+0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x1C,0x38,
+0x0F,0xF0,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"U",53*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x07,0x78,0x0F,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1E,0x3C,0x0E,0x38,
+0x0E,0x38,0x0E,0x38,0x07,0x70,0x07,0x70,0x07,0x70,0x03,0xE0,0x03,0xE0,0x03,0xE0,
+0x03,0xE0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"V",54*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xE0,0x07,
+0xE0,0x07,0x70,0x0E,0x70,0x0E,0x70,0x0E,0x73,0xCE,0x73,0xCE,0x73,0xCE,0x73,0xCE,
+0x3B,0xDC,0x3E,0x7C,0x3E,0x7C,0x3E,0x7C,0x3E,0x7C,0x3C,0x3C,0x3C,0x3C,0x1C,0x38,
+0x1C,0x38,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"W",55*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x07,0x3C,0x0F,
+0x1C,0x0E,0x1E,0x1E,0x0F,0x3C,0x07,0x38,0x07,0xF0,0x03,0xF0,0x01,0xE0,0x01,0xE0,
+0x01,0xE0,0x03,0xF0,0x07,0xF0,0x07,0x78,0x0F,0x3C,0x0E,0x1C,0x1E,0x1E,0x3C,0x0E,
+0x38,0x07,0x78,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"X",56*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x0F,0x38,0x0E,
+0x3C,0x1E,0x1C,0x1C,0x1E,0x3C,0x0E,0x38,0x07,0x70,0x07,0xF0,0x03,0xE0,0x03,0xE0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Y",57*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFE,0x3F,0xFE,
+0x00,0x1E,0x00,0x1C,0x00,0x3C,0x00,0x78,0x00,0x70,0x00,0xF0,0x00,0xE0,0x01,0xE0,
+0x03,0xC0,0x03,0x80,0x07,0x80,0x07,0x00,0x0F,0x00,0x1E,0x00,0x1C,0x00,0x3C,0x00,
+0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"Z",58*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x03,0xF0,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0xF0,0x03,0xF0,0x00,0x00,0x00,0x00,/*"[",59*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x00,0x38,0x00,
+0x38,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x07,0x00,0x07,0x00,
+0x03,0x80,0x03,0x80,0x03,0x80,0x01,0xC0,0x01,0xC0,0x00,0xE0,0x00,0xE0,0x00,0x70,
+0x00,0x70,0x00,0x70,0x00,0x38,0x00,0x38,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,/*"\",60*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x07,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x07,0xE0,0x07,0xE0,0x00,0x00,0x00,0x00,/*"]",61*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x03,0xC0,
+0x07,0xE0,0x0E,0x70,0x0C,0x30,0x18,0x18,0x38,0x1C,0x70,0x0E,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"^",62*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,/*"_",63*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x07,0x00,0x03,0x00,0x01,0x80,
+0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"`",64*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x1F,0xFC,0x18,0x1C,0x00,0x0E,0x00,0x0E,
+0x07,0xFE,0x0F,0xFE,0x1C,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x1E,0x38,0x1E,0x3C,0x3E,
+0x1F,0xEE,0x07,0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"a",65*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0xF8,0x1F,0xFC,0x1F,0x1E,0x1E,0x0E,0x1C,0x07,
+0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1E,0x0E,0x1F,0x1E,
+0x1F,0xFC,0x1C,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"b",66*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xF0,0x07,0xF8,0x0F,0x0C,0x0E,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1E,0x00,0x0E,0x00,0x0F,0x0C,
+0x07,0xF8,0x01,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"c",67*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x0E,0x00,0x0E,
+0x00,0x0E,0x00,0x0E,0x00,0x0E,0x07,0xCE,0x0F,0xFE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
+0x0F,0xFE,0x07,0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"d",68*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,0x1E,0x3C,0x1C,0x1C,0x3C,0x0E,
+0x38,0x0E,0x38,0x0E,0x3F,0xFE,0x3F,0xFE,0x38,0x00,0x38,0x00,0x1C,0x04,0x1E,0x0C,
+0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"e",69*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0xFE,0x01,0xE0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x1F,0xFE,0x1F,0xFE,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"f",70*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xCE,0x0F,0xEE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
+0x0F,0xEE,0x07,0xCE,0x00,0x0E,0x00,0x0E,0x00,0x1C,0x08,0x3C,0x0F,0xF8,0x07,0xE0,/*"g",71*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0xF0,0x1D,0xF8,0x1E,0x3C,0x1E,0x1C,0x1C,0x1C,
+0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
+0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"h",72*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xC0,0x1F,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x3F,0xFE,0x3F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"i",73*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xE0,0x0F,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,
+0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x01,0xC0,0x1F,0xC0,0x1F,0x00,/*"j",74*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,
+0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x0F,0x1C,0x1E,0x1C,0x3C,0x1C,0x78,0x1C,0xF0,
+0x1D,0xE0,0x1F,0xC0,0x1F,0xE0,0x1F,0xE0,0x1E,0xF0,0x1C,0x78,0x1C,0x3C,0x1C,0x1C,
+0x1C,0x1E,0x1C,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"k",75*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x80,0x7F,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x01,0xC0,
+0x01,0xFC,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"l",76*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x77,0x1C,0x7F,0xBE,0x71,0xE7,0x71,0xC7,0x71,0xC7,
+0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,0x71,0xC7,
+0x71,0xC7,0x71,0xC7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"m",77*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0xF0,0x1D,0xF8,0x1E,0x3C,0x1E,0x1C,0x1C,0x1C,
+0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
+0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"n",78*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x0F,0xF8,0x1E,0x3C,0x1C,0x1C,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1C,0x1E,0x3C,
+0x0F,0xF8,0x03,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"o",79*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0xF8,0x1F,0xFC,0x1F,0x1E,0x1E,0x0E,0x1C,0x07,
+0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1C,0x07,0x1E,0x0E,0x1F,0x1E,
+0x1F,0xFC,0x1C,0xF8,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,0x1C,0x00,/*"p",80*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xCE,0x0F,0xFE,0x1E,0x3E,0x1C,0x1E,0x38,0x0E,
+0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x38,0x0E,0x1C,0x1E,0x1E,0x3E,
+0x0F,0xFE,0x07,0xCE,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,/*"q",81*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x3C,0x07,0x7E,0x07,0xC2,0x07,0x80,0x07,0x80,
+0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,
+0x07,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"r",82*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xF0,0x0F,0xF8,0x1E,0x08,0x1C,0x00,0x1C,0x00,
+0x1F,0x00,0x0F,0xF0,0x07,0xF8,0x00,0xFC,0x00,0x3C,0x00,0x1C,0x00,0x1C,0x10,0x3C,
+0x1F,0xF8,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"s",83*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x3F,0xFE,0x3F,0xFE,0x03,0x80,0x03,0x80,0x03,0x80,
+0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0x80,0x03,0xC0,
+0x01,0xFE,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"t",84*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
+0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x3C,0x1E,0x3C,
+0x0F,0xDC,0x07,0x9C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"u",85*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x0E,0x38,0x1C,0x38,0x1C,0x38,0x1C,0x1C,0x38,
+0x1C,0x38,0x1E,0x78,0x0E,0x70,0x0E,0x70,0x0F,0xF0,0x07,0xE0,0x07,0xE0,0x07,0xE0,
+0x03,0xC0,0x03,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"v",86*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xE0,0x07,0x70,0x0E,0x70,0x0E,0x71,0x8E,
+0x71,0x8E,0x7B,0xDE,0x3B,0xDC,0x3A,0x5C,0x3A,0x5C,0x3E,0x7C,0x1E,0x78,0x1C,0x38,
+0x1C,0x38,0x1C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"w",87*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x3C,0x3C,0x1E,0x78,0x0E,0x70,0x0F,0xF0,0x07,0xE0,
+0x03,0xC0,0x03,0xC0,0x01,0x80,0x03,0xC0,0x07,0xE0,0x0F,0xF0,0x0E,0x70,0x1E,0x78,
+0x3C,0x3C,0x78,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"x",88*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x0E,0x38,0x1C,0x38,0x1C,0x3C,0x3C,0x1C,0x38,
+0x1C,0x38,0x1E,0x78,0x0E,0x70,0x0E,0x70,0x07,0xE0,0x07,0xE0,0x07,0xE0,0x03,0xC0,
+0x03,0xC0,0x03,0x80,0x03,0x80,0x03,0x80,0x07,0x00,0x0F,0x00,0x3E,0x00,0x3C,0x00,/*"y",89*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFC,0x1F,0xFC,0x00,0x3C,0x00,0x78,0x00,0x70,
+0x00,0xF0,0x01,0xE0,0x01,0xC0,0x03,0xC0,0x07,0x80,0x07,0x00,0x0F,0x00,0x1E,0x00,
+0x1F,0xFC,0x1F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,/*"z",90*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0x00,0xFC,0x01,0xE0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x03,0x80,0x1F,0x00,0x1F,0x00,0x03,0x80,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xE0,0x00,0xFC,0x00,0x7C,0x00,0x00,/*"{",91*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x01,0x80,0x01,0x80,
+0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
+0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,
+0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,0x01,0x80,/*"|",92*/
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x1F,0x80,0x03,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x00,0xE0,0x00,0x7C,0x00,0x7C,0x00,0xE0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,
+0x01,0xC0,0x01,0xC0,0x01,0xC0,0x01,0xC0,0x03,0xC0,0x1F,0x80,0x1F,0x00,0x00,0x00,/*"}",93*/
+};
+#endif
+
+#endif
diff --git a/bsp/stm32/stm32l431-BearPi/project.uvoptx b/bsp/stm32/stm32l431-BearPi/project.uvoptx
index 528c410d17..c0c2dc00ef 100644
--- a/bsp/stm32/stm32l431-BearPi/project.uvoptx
+++ b/bsp/stm32/stm32l431-BearPi/project.uvoptx
@@ -183,7 +183,7 @@
 
   <Group>
     <GroupName>Applications</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -318,6 +318,30 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\components\drivers\spi\spi_core.c</PathWithFileName>
+      <FilenameWithoutPath>spi_core.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\components\drivers\spi\spi_dev.c</PathWithFileName>
+      <FilenameWithoutPath>spi_dev.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>12</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
       <PathWithFileName>..\..\..\components\drivers\src\completion.c</PathWithFileName>
       <FilenameWithoutPath>completion.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
@@ -325,7 +349,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>11</FileNumber>
+      <FileNumber>13</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -337,7 +361,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>12</FileNumber>
+      <FileNumber>14</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -349,7 +373,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>13</FileNumber>
+      <FileNumber>15</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -361,7 +385,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>14</FileNumber>
+      <FileNumber>16</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -373,7 +397,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>15</FileNumber>
+      <FileNumber>17</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -385,7 +409,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>16</FileNumber>
+      <FileNumber>18</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -397,7 +421,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>17</FileNumber>
+      <FileNumber>19</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -417,7 +441,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>18</FileNumber>
+      <FileNumber>20</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -429,7 +453,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>19</FileNumber>
+      <FileNumber>21</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -441,7 +465,19 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>20</FileNumber>
+      <FileNumber>22</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>1</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>board\ports\lcd\drv_lcd.c</PathWithFileName>
+      <FilenameWithoutPath>drv_lcd.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>23</FileNumber>
       <FileType>2</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -453,7 +489,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>21</FileNumber>
+      <FileNumber>24</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -465,7 +501,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>22</FileNumber>
+      <FileNumber>25</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -477,7 +513,19 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>23</FileNumber>
+      <FileNumber>26</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\HAL_Drivers\drv_spi.c</PathWithFileName>
+      <FilenameWithoutPath>drv_spi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>4</GroupNumber>
+      <FileNumber>27</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -497,7 +545,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>24</FileNumber>
+      <FileNumber>28</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -509,7 +557,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>25</FileNumber>
+      <FileNumber>29</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -521,7 +569,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>26</FileNumber>
+      <FileNumber>30</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -541,7 +589,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>27</FileNumber>
+      <FileNumber>31</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -553,7 +601,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>28</FileNumber>
+      <FileNumber>32</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -565,7 +613,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>29</FileNumber>
+      <FileNumber>33</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -577,7 +625,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>30</FileNumber>
+      <FileNumber>34</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -589,7 +637,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>31</FileNumber>
+      <FileNumber>35</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -601,7 +649,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>32</FileNumber>
+      <FileNumber>36</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -613,7 +661,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>33</FileNumber>
+      <FileNumber>37</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -625,7 +673,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>34</FileNumber>
+      <FileNumber>38</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -637,7 +685,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>35</FileNumber>
+      <FileNumber>39</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -649,7 +697,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>36</FileNumber>
+      <FileNumber>40</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -661,7 +709,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>37</FileNumber>
+      <FileNumber>41</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -673,7 +721,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>38</FileNumber>
+      <FileNumber>42</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -685,7 +733,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>39</FileNumber>
+      <FileNumber>43</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -697,7 +745,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>40</FileNumber>
+      <FileNumber>44</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -717,7 +765,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>41</FileNumber>
+      <FileNumber>45</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -729,7 +777,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>42</FileNumber>
+      <FileNumber>46</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -741,7 +789,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>43</FileNumber>
+      <FileNumber>47</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -753,7 +801,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>44</FileNumber>
+      <FileNumber>48</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -773,7 +821,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>45</FileNumber>
+      <FileNumber>49</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -785,7 +833,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>46</FileNumber>
+      <FileNumber>50</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -797,7 +845,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>47</FileNumber>
+      <FileNumber>51</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -809,7 +857,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>48</FileNumber>
+      <FileNumber>52</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -821,7 +869,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>49</FileNumber>
+      <FileNumber>53</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -833,7 +881,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>50</FileNumber>
+      <FileNumber>54</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -845,7 +893,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>51</FileNumber>
+      <FileNumber>55</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -857,7 +905,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>52</FileNumber>
+      <FileNumber>56</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -869,7 +917,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>53</FileNumber>
+      <FileNumber>57</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -881,7 +929,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>54</FileNumber>
+      <FileNumber>58</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -893,7 +941,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>55</FileNumber>
+      <FileNumber>59</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -905,7 +953,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>56</FileNumber>
+      <FileNumber>60</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -917,7 +965,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>57</FileNumber>
+      <FileNumber>61</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -929,7 +977,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>58</FileNumber>
+      <FileNumber>62</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -941,7 +989,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>59</FileNumber>
+      <FileNumber>63</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -953,7 +1001,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>60</FileNumber>
+      <FileNumber>64</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -965,7 +1013,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>61</FileNumber>
+      <FileNumber>65</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -977,7 +1025,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>62</FileNumber>
+      <FileNumber>66</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -989,7 +1037,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>63</FileNumber>
+      <FileNumber>67</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1001,7 +1049,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>64</FileNumber>
+      <FileNumber>68</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1013,7 +1061,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>65</FileNumber>
+      <FileNumber>69</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1025,7 +1073,43 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>66</FileNumber>
+      <FileNumber>70</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_spi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>71</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_spi_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>72</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_qspi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>73</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1037,7 +1121,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>67</FileNumber>
+      <FileNumber>74</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1049,7 +1133,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>68</FileNumber>
+      <FileNumber>75</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1061,7 +1145,7 @@
     </File>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>69</FileNumber>
+      <FileNumber>76</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
diff --git a/bsp/stm32/stm32l431-BearPi/project.uvprojx b/bsp/stm32/stm32l431-BearPi/project.uvprojx
index 549412b461..93dabedc1a 100644
--- a/bsp/stm32/stm32l431-BearPi/project.uvprojx
+++ b/bsp/stm32/stm32l431-BearPi/project.uvprojx
@@ -336,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>RT_USING_ARM_LIBC, USE_HAL_DRIVER, STM32L432xx, __RTTHREAD__</Define>
+              <Define>RT_USING_ARM_LIBC, USE_HAL_DRIVER, __RTTHREAD__, STM32L431xx</Define>
               <Undefine></Undefine>
-              <IncludePath>.;applications;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include</IncludePath>
+              <IncludePath>.;applications;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Inc;board\ports\lcd;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -421,6 +421,75 @@
         </Group>
         <Group>
           <GroupName>DeviceDrivers</GroupName>
+          <GroupOption>
+            <CommonProperty>
+              <UseCPPCompiler>0</UseCPPCompiler>
+              <RVCTCodeConst>0</RVCTCodeConst>
+              <RVCTZI>0</RVCTZI>
+              <RVCTOtherData>0</RVCTOtherData>
+              <ModuleSelection>0</ModuleSelection>
+              <IncludeInBuild>1</IncludeInBuild>
+              <AlwaysBuild>0</AlwaysBuild>
+              <GenerateAssemblyFile>0</GenerateAssemblyFile>
+              <AssembleAssemblyFile>0</AssembleAssemblyFile>
+              <PublicsOnly>0</PublicsOnly>
+              <StopOnExitCode>3</StopOnExitCode>
+              <CustomArgument></CustomArgument>
+              <IncludeLibraryModules></IncludeLibraryModules>
+              <ComprImg>0</ComprImg>
+            </CommonProperty>
+            <GroupArmAds>
+              <Cads>
+                <interw>2</interw>
+                <Optim>0</Optim>
+                <oTime>2</oTime>
+                <SplitLS>2</SplitLS>
+                <OneElfS>2</OneElfS>
+                <Strict>2</Strict>
+                <EnumInt>2</EnumInt>
+                <PlainCh>2</PlainCh>
+                <Ropi>2</Ropi>
+                <Rwpi>2</Rwpi>
+                <wLevel>0</wLevel>
+                <uThumb>2</uThumb>
+                <uSurpInc>2</uSurpInc>
+                <uC99>2</uC99>
+                <uGnu>2</uGnu>
+                <useXO>2</useXO>
+                <v6Lang>0</v6Lang>
+                <v6LangP>0</v6LangP>
+                <vShortEn>2</vShortEn>
+                <vShortWch>2</vShortWch>
+                <v6Lto>2</v6Lto>
+                <v6WtE>2</v6WtE>
+                <v6Rtti>2</v6Rtti>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define> </Define>
+                  <Undefine> </Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Cads>
+              <Aads>
+                <interw>2</interw>
+                <Ropi>2</Ropi>
+                <Rwpi>2</Rwpi>
+                <thumb>2</thumb>
+                <SplitLS>2</SplitLS>
+                <SwStkChk>2</SwStkChk>
+                <NoWarn>2</NoWarn>
+                <uSurpInc>2</uSurpInc>
+                <useXO>2</useXO>
+                <uClangAs>2</uClangAs>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define></Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Aads>
+            </GroupArmAds>
+          </GroupOption>
           <Files>
             <File>
               <FileName>pin.c</FileName>
@@ -438,6 +507,16 @@
               <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
             </File>
             <File>
+              <FileName>spi_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath>
+            </File>
+            <File>
+              <FileName>spi_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\spi\spi_dev.c</FilePath>
+            </File>
+            <File>
               <FileName>completion.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
@@ -493,6 +572,11 @@
               <FilePath>board\CubeMX_Config\Src\stm32l4xx_hal_msp.c</FilePath>
             </File>
             <File>
+              <FileName>drv_lcd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\ports\lcd\drv_lcd.c</FilePath>
+            </File>
+            <File>
               <FileName>startup_stm32l431xx.s</FileName>
               <FileType>2</FileType>
               <FilePath>..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l431xx.s</FilePath>
@@ -508,6 +592,11 @@
               <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath>
             </File>
             <File>
+              <FileName>drv_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\HAL_Drivers\drv_spi.c</FilePath>
+            </File>
+            <File>
               <FileName>drv_common.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
@@ -743,6 +832,21 @@
               <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c</FilePath>
             </File>
             <File>
+              <FileName>stm32l4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_qspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c</FilePath>
+            </File>
+            <File>
               <FileName>stm32l4xx_hal_rtc.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c</FilePath>
diff --git a/bsp/stm32/stm32l431-BearPi/rtconfig.h b/bsp/stm32/stm32l431-BearPi/rtconfig.h
index 6fbc67f2c5..4be6382a58 100644
--- a/bsp/stm32/stm32l431-BearPi/rtconfig.h
+++ b/bsp/stm32/stm32l431-BearPi/rtconfig.h
@@ -83,6 +83,7 @@
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN
 #define RT_USING_RTC
+#define RT_USING_SPI
 #define RT_USING_WDT
 
 /* Using USB */
@@ -169,5 +170,11 @@
 #define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART1
+#define BSP_USING_SPI
+#define BSP_USING_SPI2
+
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_SPI_LCD
 
 #endif
diff --git a/bsp/stm32/stm32l432-st-nucleo/applications/main.c b/bsp/stm32/stm32l432-st-nucleo/applications/main.c
index 336347c11e..d3654159d8 100644
--- a/bsp/stm32/stm32l432-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l432-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l433-st-nucleo/applications/main.c b/bsp/stm32/stm32l433-st-nucleo/applications/main.c
index 056bad6689..93992725f1 100644
--- a/bsp/stm32/stm32l433-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l433-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l452-st-nucleo/applications/main.c b/bsp/stm32/stm32l452-st-nucleo/applications/main.c
index fa4fd35a6e..5524d24935 100644
--- a/bsp/stm32/stm32l452-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l452-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED2 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/main.c b/bsp/stm32/stm32l475-atk-pandora/applications/main.c
index dfad8c68c1..7410e0463e 100644
--- a/bsp/stm32/stm32l475-atk-pandora/applications/main.c
+++ b/bsp/stm32/stm32l475-atk-pandora/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l475-atk-pandora/rtconfig.py b/bsp/stm32/stm32l475-atk-pandora/rtconfig.py
index f09dfbc3b7..9314a28375 100644
--- a/bsp/stm32/stm32l475-atk-pandora/rtconfig.py
+++ b/bsp/stm32/stm32l475-atk-pandora/rtconfig.py
@@ -73,7 +73,8 @@ elif PLATFORM == 'armcc':
     DEVICE = ' --cpu Cortex-M4.fp '
     CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
     AFLAGS = DEVICE + ' --apcs=interwork '
-    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict --scatter "board\linker_scripts\link.sct"'
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map '
+    LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
     CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
     LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
 
@@ -94,6 +95,39 @@ elif PLATFORM == 'armcc':
 
     POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
 
+elif PLATFORM == 'armclang':
+    # toolchains
+    CC = 'armclang'
+    CXX = 'armclang'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M4.fp '
+    CFLAGS = ' -xc -std=c99 --target=arm-arm-none-eabi -mcpu=cortex-m4 '
+    CFLAGS += ' -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 '
+    CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
+    CFLAGS += ' -gdwarf-3 -ffunction-sections '
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
+    LFLAGS += ' --list rt-thread.map '
+    LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
+
+    EXEC_PATH += '/ARM/ARMCLANG/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O1' # armclang recommend
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+        
+    CXXFLAGS = CFLAGS
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
 elif PLATFORM == 'iar':
     # toolchains
     CC = 'iccarm'
diff --git a/bsp/stm32/stm32l475-st-discovery/applications/main.c b/bsp/stm32/stm32l475-st-discovery/applications/main.c
index bddb8abe63..c0c25b6705 100644
--- a/bsp/stm32/stm32l475-st-discovery/applications/main.c
+++ b/bsp/stm32/stm32l475-st-discovery/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l476-st-nucleo/applications/main.c b/bsp/stm32/stm32l476-st-nucleo/applications/main.c
index b22a8b8e8d..2c204ae916 100644
--- a/bsp/stm32/stm32l476-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l476-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l496-ali-developer/applications/main.c b/bsp/stm32/stm32l496-ali-developer/applications/main.c
index 86d1cf72dd..1d40627d3c 100644
--- a/bsp/stm32/stm32l496-ali-developer/applications/main.c
+++ b/bsp/stm32/stm32l496-ali-developer/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l496-st-nucleo/applications/main.c b/bsp/stm32/stm32l496-st-nucleo/applications/main.c
index efe91875b9..6c19612f99 100644
--- a/bsp/stm32/stm32l496-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l496-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED2 pin mode to output */
     rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED2_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED2_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c b/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c
index 2dbb2b2c81..845e68f25f 100644
--- a/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c
@@ -23,17 +23,13 @@
 
 int main(void)
 {
-    int count = 1;
-
     rt_pin_mode(LED_RUN_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED_RUN_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED_RUN_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32l4r9-st-eval/applications/main.c b/bsp/stm32/stm32l4r9-st-eval/applications/main.c
index c53f70fb97..ea49f25f87 100644
--- a/bsp/stm32/stm32l4r9-st-eval/applications/main.c
+++ b/bsp/stm32/stm32l4r9-st-eval/applications/main.c
@@ -18,17 +18,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED0_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED0_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32mp157a-st-discovery/applications/main.c b/bsp/stm32/stm32mp157a-st-discovery/applications/main.c
index 85d9d3ba89..b5425e474b 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/applications/main.c
+++ b/bsp/stm32/stm32mp157a-st-discovery/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LD7 pin mode to output */
     rt_pin_mode(LED7_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED7_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED7_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include <stdlib.h>
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include <stdlib.h>
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-ev1/applications/main.c b/bsp/stm32/stm32mp157a-st-ev1/applications/main.c
index 6e70b83927..71f2ba733a 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/applications/main.c
+++ b/bsp/stm32/stm32mp157a-st-ev1/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LD8 pin mode to output */
     rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED4_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED4_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/include/metal/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include <stdlib.h>
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
index bcceba61a0..5220e13b97 100644
--- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
+++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/OpenAMP/libmetal/lib/system/generic/alloc.h
@@ -18,18 +18,21 @@
 
 #include <stdlib.h>
 
+extern void *rt_malloc(unsigned long nbytes);
+extern void rt_free(void *ptr);
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return (rt_malloc(size));
 }
 
 static inline void metal_free_memory(void *ptr)
 {
-	free(ptr);
+	rt_free(ptr);
 }
 
 #ifdef __cplusplus
diff --git a/bsp/stm32/stm32wb55-st-nucleo/applications/main.c b/bsp/stm32/stm32wb55-st-nucleo/applications/main.c
index f6e244c12c..b4a71ebc08 100644
--- a/bsp/stm32/stm32wb55-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32wb55-st-nucleo/applications/main.c
@@ -17,17 +17,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED0 pin mode to output */
     rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED1_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED1_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32/stm32wb55-st-nucleo/board/board.c b/bsp/stm32/stm32wb55-st-nucleo/board/board.c
index 13796c442c..11c7c8cf2b 100644
--- a/bsp/stm32/stm32wb55-st-nucleo/board/board.c
+++ b/bsp/stm32/stm32wb55-st-nucleo/board/board.c
@@ -1,11 +1,12 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
+ * 2021-03-27     xph          open rtc clk to support ble stack
  */
 
 #include "board.h"
@@ -26,9 +27,7 @@ void SystemClock_Config(void)
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI1
-                              |RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE
-                              |RCC_OSCILLATORTYPE_MSI;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
@@ -50,9 +49,7 @@ void SystemClock_Config(void)
   }
   /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
   */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
-                              |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
@@ -64,22 +61,12 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
-  /** Initializes the peripherals clocks
-  */
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RTC
-                              |RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_LPUART1
-                              |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC;
-  PeriphClkInitStruct.PLLSAI1.PLLN = 24;
-  PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
-  PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV2;
-  PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV2;
-  PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_USBCLK|RCC_PLLSAI1_ADCCLK;
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1;
   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
   PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
-  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
-  PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
-  PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
-  PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
+  PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+  PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
   PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
   {
diff --git a/bsp/stm32/stm32wl55-st-nucleo/applications/main.c b/bsp/stm32/stm32wl55-st-nucleo/applications/main.c
index 57385ad74c..9d38020849 100644
--- a/bsp/stm32/stm32wl55-st-nucleo/applications/main.c
+++ b/bsp/stm32/stm32wl55-st-nucleo/applications/main.c
@@ -19,17 +19,14 @@
 
 int main(void)
 {
-    int count = 1;
     /* set LED_BLUE pin mode to output */
     rt_pin_mode(LED_BLUE_PIN, PIN_MODE_OUTPUT);
 
-    while (count++)
+    while (1)
     {
         rt_pin_write(LED_BLUE_PIN, PIN_HIGH);
         rt_thread_mdelay(500);
         rt_pin_write(LED_BLUE_PIN, PIN_LOW);
         rt_thread_mdelay(500);
     }
-
-    return RT_EOK;
 }
diff --git a/bsp/stm32f20x/Drivers/i2c.c b/bsp/stm32f20x/Drivers/i2c.c
index 9b2f4ed866..5fb5854d2e 100644
--- a/bsp/stm32f20x/Drivers/i2c.c
+++ b/bsp/stm32f20x/Drivers/i2c.c
@@ -572,6 +572,11 @@ void I2C1_INIT()
 
         rt_event_init(&i2c_event, "i2c_event", RT_IPC_FLAG_FIFO );
         i2c_mux = rt_mutex_create("i2c_mux", RT_IPC_FLAG_FIFO );
+        if (i2c_mux == RT_NULL) 
+        {
+            LOG_E("Create mutex for i2c_mux failed!");
+            return;
+        }
         i2c1_init_flag = 1;
     }
 }
author	liuxianliang <[email protected]>	2021-04-06 10:42:58 +0800
committer	liuxianliang <[email protected]>	2021-04-06 10:42:58 +0800
commit	233e1cd8bc7cbdc38006dfc18adde8bc2595620f (patch)
tree	cec4669f56b09734b7dcc2682d854fef325722b8 /bsp
parent	4431c4796fb3e26fb66c012feb8bf47f3292b473 (diff)
parent	c5a0df2254bd6fadc941a33d9066ce6b972c4274 (diff)