diff options
| author | aozima <[email protected]> | 2014-11-02 13:51:36 +0800 |
|---|---|---|
| committer | aozima <[email protected]> | 2014-11-02 13:52:16 +0800 |
| commit | 4c1eff52e2f0c0acb563d2397f5aca5a17b30312 (patch) | |
| tree | 47471401720db59d6b2b4aea4bc3ccb95d7ba667 /bsp | |
| parent | cbf02c076e5df956f9254b5108a3dfc81a4deb11 (diff) | |
[CME_M7] add GCC compile support.
Diffstat (limited to 'bsp')
| -rw-r--r-- | bsp/CME_M7/CMSIS/CME_M7/startup/gcc/startup_CME_M7.c | 226 | ||||
| -rw-r--r-- | bsp/CME_M7/CMSIS/SConscript | 16 | ||||
| -rw-r--r-- | bsp/CME_M7/project.uvproj | 23 | ||||
| -rw-r--r-- | bsp/CME_M7/rtconfig.h | 5 | ||||
| -rw-r--r-- | bsp/CME_M7/rtconfig.py | 2 |
5 files changed, 240 insertions, 32 deletions
diff --git a/bsp/CME_M7/CMSIS/CME_M7/startup/gcc/startup_CME_M7.c b/bsp/CME_M7/CMSIS/CME_M7/startup/gcc/startup_CME_M7.c new file mode 100644 index 0000000000..bdf95f9165 --- /dev/null +++ b/bsp/CME_M7/CMSIS/CME_M7/startup/gcc/startup_CME_M7.c @@ -0,0 +1,226 @@ +//***************************************************************************** +// +// Startup code for use with GNU tools. +// +//***************************************************************************** + + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +static void Reset_Handler(void); +static void Default_Handler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** +void NMI_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void HardFault_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void MemManage_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void BusFault_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void UsageFault_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void SVC_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void DebugMon_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void PendSV_Handler(void) __attribute__((weak, alias("Default_Handler"))); +void SysTick_Handler(void) __attribute__((weak, alias("Default_Handler"))); + +void ETH_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void USB_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void DMAC_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void CAN0_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void CAN1_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); + +void FP0_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP1_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP2_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP3_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP4_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP5_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP6_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP7_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP8_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP9_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP10_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP11_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP12_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP13_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP14_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void FP15_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void UART0_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void UART1_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void ADC_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void GPIO_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void SPI1_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void I2C1_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void SPI0_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void I2C0_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void RTC_1S_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void RTC_1MS_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void WDG_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void TIMER_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void DDRC_SW_PROC_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void ETH_PMT_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void PAD_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void DDRC_LANE_SYNC_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); +void UART2_IRQHandler(void) __attribute__((weak, alias("Default_Handler"))); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[512]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + Reset_Handler, // Reset Handler + NMI_Handler, // NMI Handler + HardFault_Handler, // Hard Fault Handler + MemManage_Handler, // MPU Fault Handler + BusFault_Handler, // Bus Fault Handler + UsageFault_Handler, // Usage Fault Handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall Handler + DebugMon_Handler, // Debug Monitor Handler + 0, // Reserved + PendSV_Handler, // PendSV Handler + SysTick_Handler, // SysTick Handler + + // External Interrupts + ETH_IRQHandler, + USB_IRQHandler, + DMAC_IRQHandler, + CAN0_IRQHandler, + CAN1_IRQHandler, + FP0_IRQHandler, + FP1_IRQHandler, + FP2_IRQHandler, + FP3_IRQHandler, + FP4_IRQHandler, + FP5_IRQHandler, + FP6_IRQHandler, + FP7_IRQHandler, + FP8_IRQHandler, + FP9_IRQHandler, + FP10_IRQHandler, + FP11_IRQHandler, + FP12_IRQHandler, + FP13_IRQHandler, + FP14_IRQHandler, + FP15_IRQHandler, + UART0_IRQHandler, + UART1_IRQHandler, + ADC_IRQHandler, + GPIO_IRQHandler, + SPI1_IRQHandler, + I2C1_IRQHandler, + SPI0_IRQHandler, + I2C0_IRQHandler, + RTC_1S_IRQHandler, + RTC_1MS_IRQHandler, + WDG_IRQHandler, + TIMER_IRQHandler, + DDRC_SW_PROC_IRQHandler, + ETH_PMT_IRQHandler, + PAD_IRQHandler, + DDRC_LANE_SYNC_IRQHandler, + UART2_IRQHandler, +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _data; +extern unsigned long _edata; +extern unsigned long _bss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +static void Reset_Handler(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_data; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. + // + __asm(" ldr r0, =_bss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // call system init. + SystemInit(); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void Default_Handler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/bsp/CME_M7/CMSIS/SConscript b/bsp/CME_M7/CMSIS/SConscript index b850fc90bf..fc01453c4a 100644 --- a/bsp/CME_M7/CMSIS/SConscript +++ b/bsp/CME_M7/CMSIS/SConscript @@ -12,19 +12,21 @@ CME_M7/system_cmem7.c # add for startup script if rtconfig.CROSS_TOOL == 'gcc': - src += ['Device/Nuvoton/NUC472_442/Source/GCC/startup_NUC472_442.c'] + src += ['CME_M7/startup/gcc/startup_CME_M7.c'] elif rtconfig.CROSS_TOOL == 'keil': src += ['CME_M7/startup/arm/startup_cmem7.s'] elif rtconfig.CROSS_TOOL == 'iar': - src += ['Device/Nuvoton/NUC472_442/Source/IAR/startup_NUC472_442.S'] + print '================ERROR============================' + print 'Not support IAR yet!' + print '=================================================' + exit(0) path = [cwd + '/CME_M7'] -#ath += [cwd + '/StdDriver/inc'] -# if GetDepend(['RT_USING_BSP_CMSIS']): - # path += [cwd + '/CMSIS/Include'] -# elif GetDepend(['RT_USING_RTT_CMSIS']): - # path += [RTT_ROOT + '/components/CMSIS/Include'] +if GetDepend(['RT_USING_BSP_CMSIS']): + path += [cwd + '/CMSIS/Include'] +elif GetDepend(['RT_USING_RTT_CMSIS']): + path += [RTT_ROOT + '/components/CMSIS/Include'] group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = path) diff --git a/bsp/CME_M7/project.uvproj b/bsp/CME_M7/project.uvproj index ce957f2416..2eba13d595 100644 --- a/bsp/CME_M7/project.uvproj +++ b/bsp/CME_M7/project.uvproj @@ -14,8 +14,6 @@ <TargetCommonOption> <Device>ARMCM3</Device> <Vendor>ARM</Vendor> - <PackID>ARM.CMSIS.4.1.0</PackID> - <PackURL>http://www.keil.com/pack/</PackURL> <Cpu>CPUTYPE("Cortex-M3") CLOCK(10000000) ESEL ELITTLE</Cpu> <FlashUtilSpec></FlashUtilSpec> <StartupFile></StartupFile> @@ -32,7 +30,6 @@ <SLE66AMisc></SLE66AMisc> <SLE66LinkerMisc></SLE66LinkerMisc> <SFDFile>$$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd</SFDFile> - <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> <BinPath></BinPath> <IncludePath></IncludePath> @@ -74,8 +71,6 @@ <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopB1X>0</nStopB1X> - <nStopB2X>0</nStopB2X> </BeforeMake> <AfterMake> <RunUserProg1>0</RunUserProg1> @@ -102,7 +97,6 @@ <StopOnExitCode>3</StopOnExitCode> <CustomArgument></CustomArgument> <IncludeLibraryModules></IncludeLibraryModules> - <ComprImg>1</ComprImg> </CommonProperty> <DllOption> <SimDllName>SARMCM3.DLL</SimDllName> @@ -132,7 +126,6 @@ <RestoreFunctions>1</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <LimitSpeedToRealTime>0</LimitSpeedToRealTime> - <RestoreSysVw>1</RestoreSysVw> </Simulator> <Target> <UseTarget>1</UseTarget> @@ -144,11 +137,9 @@ <RestoreFunctions>0</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <RestoreTracepoints>1</RestoreTracepoints> - <RestoreSysVw>1</RestoreSysVw> - <UsePdscDebugDescription>1</UsePdscDebugDescription> </Target> <RunDebugAfterBuild>0</RunDebugAfterBuild> - <TargetSelection>17</TargetSelection> + <TargetSelection>-1</TargetSelection> <SimDlls> <CpuDll></CpuDll> <CpuDllArguments></CpuDllArguments> @@ -178,10 +169,6 @@ <Flash2>BIN\UL2CM3.DLL</Flash2> <Flash3>"" ()</Flash3> <Flash4></Flash4> - <pFcarmOut></pFcarmOut> - <pFcarmGrp></pFcarmGrp> - <pFcArmRoot></pFcArmRoot> - <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> <ArmAdsMisc> @@ -360,13 +347,11 @@ <wLevel>2</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> - <uC99>0</uC99> - <useXO>0</useXO> <VariousControls> <MiscControls></MiscControls> - <Define></Define> + <Define>RT_USING_ARM_LIBC</Define> <Undefine></Undefine> - <IncludePath>applications;.;CMSIS\CME_M7;drivers;StdPeriph_Driver\inc;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\init;..\..\components\libc\armlibc;..\..\components\net\lwip-1.4.1\src;..\..\components\net\lwip-1.4.1\src\include;..\..\components\net\lwip-1.4.1\src\include\ipv4;..\..\components\net\lwip-1.4.1\src\arch\include;..\..\components\net\lwip-1.4.1\src\include\netif</IncludePath> + <IncludePath>applications;.;CMSIS\CME_M7;..\..\components\CMSIS\Include;drivers;StdPeriph_Driver\inc;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\init;..\..\components\libc\armlibc;..\..\components\net\lwip-1.4.1\src;..\..\components\net\lwip-1.4.1\src\include;..\..\components\net\lwip-1.4.1\src\include\ipv4;..\..\components\net\lwip-1.4.1\src\arch\include;..\..\components\net\lwip-1.4.1\src\include\netif</IncludePath> </VariousControls> </Cads> <Aads> @@ -378,7 +363,6 @@ <SwStkChk>0</SwStkChk> <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> - <useXO>0</useXO> <VariousControls> <MiscControls></MiscControls> <Define></Define> @@ -395,7 +379,6 @@ <useFile>0</useFile> <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x00000000</DataAddressRange> - <pXoBase></pXoBase> <ScatterFile>CME_M7.sct</ScatterFile> <IncludeLibs></IncludeLibs> <IncludeLibsPath></IncludeLibsPath> diff --git a/bsp/CME_M7/rtconfig.h b/bsp/CME_M7/rtconfig.h index 4ae4c15fa8..97fa513660 100644 --- a/bsp/CME_M7/rtconfig.h +++ b/bsp/CME_M7/rtconfig.h @@ -70,8 +70,7 @@ #define FINSH_USING_MSH //#define FINSH_USING_MSH_ONLY -//#define RT_USING_NEWLIB -#define RT_USING_ARM_LIBC +#define RT_USING_LIBC /* SECTION: device filesystem */ /* #define RT_USING_DFS */ @@ -90,8 +89,6 @@ /* SECTION: lwip, a lighwight TCP/IP protocol stack */ #define RT_USING_LWIP -/* LwIP uses RT-Thread Memory Management */ -// #define RT_LWIP_USING_RT_MEM /* Enable ICMP protocol*/ #define RT_LWIP_ICMP /* Enable UDP protocol*/ diff --git a/bsp/CME_M7/rtconfig.py b/bsp/CME_M7/rtconfig.py index 79deea42b2..7977f660c3 100644 --- a/bsp/CME_M7/rtconfig.py +++ b/bsp/CME_M7/rtconfig.py @@ -43,7 +43,7 @@ if PLATFORM == 'gcc': DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections' CFLAGS = DEVICE + ' -g -Wall -D__FPU_USED' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' - LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T nuc472_flash.ld' + LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T CME_M7.ld' CPATH = '' LPATH = '' |
