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author[email protected] <[email protected]>2011-08-07 04:26:49 +0000
committer[email protected] <[email protected]>2011-08-07 04:26:49 +0000
commita39d7f73ad4b70900aa42105e512cdca7b123318 (patch)
tree69ea117715ee29535bdced1b4dd8633fab347819 /bsp
parentd561771cc026702759cba808bd4b1893a83474c4 (diff)
2011.08.07 Magicoe Added PK40X256VLQ100
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1666 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'bsp')
-rw-r--r--bsp/PK40X256VLQ100/KWIKSTIKPK40.uvproj0
-rw-r--r--bsp/PK40X256VLQ100/application.c98
-rw-r--r--bsp/PK40X256VLQ100/board.c73
-rw-r--r--bsp/PK40X256VLQ100/board.h20
-rw-r--r--bsp/PK40X256VLQ100/bsp/Font_35x8.h475
-rw-r--r--bsp/PK40X256VLQ100/bsp/SLCD_Driver.c367
-rw-r--r--bsp/PK40X256VLQ100/bsp/SLCD_Driver.h69
-rw-r--r--bsp/PK40X256VLQ100/rtconfig.h67
-rw-r--r--bsp/PK40X256VLQ100/startup.c116
-rw-r--r--bsp/PK40X256VLQ100/uart.c295
-rw-r--r--bsp/PK40X256VLQ100/uart.h6
11 files changed, 1586 insertions, 0 deletions
diff --git a/bsp/PK40X256VLQ100/KWIKSTIKPK40.uvproj b/bsp/PK40X256VLQ100/KWIKSTIKPK40.uvproj
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/bsp/PK40X256VLQ100/KWIKSTIKPK40.uvproj
diff --git a/bsp/PK40X256VLQ100/application.c b/bsp/PK40X256VLQ100/application.c
new file mode 100644
index 0000000000..616ee341c1
--- /dev/null
+++ b/bsp/PK40X256VLQ100/application.c
@@ -0,0 +1,98 @@
+/*
+ * File : app.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2011-08-06 Magicoe first release
+ *
+ */
+
+/**
+ * @addtogroup PK40X256LVQ100
+ */
+/*@{*/
+#include <rtthread.h>
+#include "tc_comm.h"
+#include "SLCD_Driver.h"
+
+/*
+ * This is an example for delay thread
+ */
+static struct rt_thread thread;
+static char thread_stack[THREAD_STACK_SIZE];
+static void thread_entry(void* parameter)
+{
+ rt_tick_t tick;
+ rt_uint8_t *dispchar[4] = {"INITED",
+ "TICK10",
+ "TICK15",
+ " EXIT "};
+
+ rt_kprintf("thread inited ok\n");
+ SLCD_PrintString(dispchar[0], 0);
+
+ tick = rt_tick_get();
+ rt_kprintf("thread tick %d\n", tick);
+ rt_kprintf("thread delay 10 tick\n");
+
+
+ rt_thread_delay(1000);
+ if (rt_tick_get() - tick > 1000)
+ {
+ tc_done(TC_STAT_FAILED);
+ return;
+ }
+ SLCD_PrintString(dispchar[1], 0);
+
+ tick = rt_tick_get();
+ rt_kprintf("thread delay 15 tick\n");
+
+ rt_thread_delay(1500);
+ if (rt_tick_get() - tick > 1500)
+ {
+ tc_done(TC_STAT_FAILED);
+ return;
+ }
+
+ SLCD_PrintString(dispchar[2], 0);
+
+ rt_thread_delay(1000);
+
+ rt_kprintf("thread exit\n");
+ SLCD_PrintString(dispchar[3], 0);
+
+ tc_done(TC_STAT_PASSED);
+}
+
+rt_err_t thread_delay_init()
+{
+ rt_err_t result;
+
+ result = rt_thread_init(&thread,
+ "test",
+ thread_entry, RT_NULL,
+ &thread_stack[0], sizeof(thread_stack),
+ THREAD_PRIORITY, 10);
+
+ if (result == RT_EOK)
+ rt_thread_startup(&thread);
+ else
+ tc_stat(TC_STAT_END | TC_STAT_FAILED);
+
+ return result;
+}
+
+int rt_application_init()
+{
+ thread_delay_init();
+
+ return 0;
+}
+
+/*@}*/
diff --git a/bsp/PK40X256VLQ100/board.c b/bsp/PK40X256VLQ100/board.c
new file mode 100644
index 0000000000..b947f727cd
--- /dev/null
+++ b/bsp/PK40X256VLQ100/board.c
@@ -0,0 +1,73 @@
+/*
+ * File : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-01-25 Bernard first version
+ * 2011-08-06 Magicoe PK40X256VLQ100 version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "board.h"
+#include "uart.h"
+
+#include "PK40X256VLQ100.h"
+#include "core_cm4.h"
+
+#include "SLCD_Driver.h"
+
+/**
+ * @addtogroup PK40X256VLQ100
+ */
+/*@{*/
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void rt_hw_timer_handler()
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ rt_tick_increase();
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+
+/**
+ * This function will initial sam7s64 board.
+ */
+void rt_hw_board_init()
+{
+ rt_uint8_t *dispchar = {"RTINIT"};
+ /* Get Core Clock Frequency */
+ SystemCoreClockUpdate(); /* Get Core Clock Frequency */
+ /* init systick */
+ SysTick_Config( SystemCoreClock/1000 ); /* Generate interrupt each 1 ms */
+
+ SLCD_Configuration();
+ SLCD_SegmentsAllOff ();
+ SLCD_PrintString(dispchar, 0);
+
+ /* set pend exception priority */
+// NVIC_SetPriority(PendSV_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
+#ifdef RT_USING_UART
+ /* init hardware UART device */
+ rt_hw_uart_init();
+#endif
+#ifdef RT_USING_CONSOLE
+ /* set console device */
+ rt_console_set_device("uart0");
+#endif
+ SLCD_PrintString(dispchar, 0);
+}
+/*@}*/
diff --git a/bsp/PK40X256VLQ100/board.h b/bsp/PK40X256VLQ100/board.h
new file mode 100644
index 0000000000..a8f6dd9f87
--- /dev/null
+++ b/bsp/PK40X256VLQ100/board.h
@@ -0,0 +1,20 @@
+/*
+ * File : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-01-25 Bernard first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+void rt_hw_board_init(void);
+
+#endif
diff --git a/bsp/PK40X256VLQ100/bsp/Font_35x8.h b/bsp/PK40X256VLQ100/bsp/Font_35x8.h
new file mode 100644
index 0000000000..03982aa410
--- /dev/null
+++ b/bsp/PK40X256VLQ100/bsp/Font_35x8.h
@@ -0,0 +1,475 @@
+const int8_t Font_35x8[] = {
+ /* Space ' ' */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '!' */
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,1,0,0,
+ /* '"' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '#' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '$' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '%' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '&' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* ''' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '(' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* ')' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '*' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '+' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* ',' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '-' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '.' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '/' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '0' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,1,1,
+ 1,0,1,0,1,
+ 1,1,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* '1' */
+ 0,0,1,0,0,
+ 0,1,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,1,1,1,0,
+ /* '2' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,0,0,
+ 1,1,1,1,1,
+ /* '3' */
+ 1,1,1,1,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,0,0,1,0,
+ 0,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* '4' */
+ 0,0,0,1,0,
+ 0,0,1,1,0,
+ 0,1,0,1,0,
+ 1,0,0,1,0,
+ 1,1,1,1,1,
+ 0,0,0,1,0,
+ 0,0,0,1,0,
+ /* '5' */
+ 1,1,1,1,1,
+ 1,0,0,0,0,
+ 1,1,1,1,0,
+ 0,0,0,0,1,
+ 0,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* '6' */
+ 0,0,1,1,0,
+ 0,1,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* '7' */
+ 1,1,1,1,1,
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,0,0,
+ 0,1,0,0,0,
+ 0,1,0,0,0,
+ /* '8' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* '9' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,1,
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,1,1,0,0,
+ /* ':' */
+ 0,0,0,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,0,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,0,0,0,
+ /* ';' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '<' */
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,0,0,
+ 0,0,1,0,0,
+ 0,0,0,1,0,
+ 0,0,0,0,1,
+ /* '=' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,1,1,1,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '>' */
+ 0,1,0,0,0,
+ 0,0,1,0,0,
+ 0,0,0,1,0,
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,0,0,
+ /* '?'not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* '@' not defined */
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ 0,0,0,0,0,
+ /* 'A' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ /* 'B' */
+ 1,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,0,
+ /* 'C' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* 'D' */
+ 1,1,1,0,0,
+ 1,0,0,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,1,0,
+ 1,1,1,0,0,
+ /* 'E' */
+ 1,1,1,1,1,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,1,
+ /* 'F' */
+ 1,1,1,1,1,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ /* 'G' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,0,
+ 1,0,1,1,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,1,
+ /* 'H' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ /* 'I' */
+ 0,1,1,1,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,1,1,1,0,
+ /* 'J' */
+ 0,0,1,1,1,
+ 0,0,0,1,0,
+ 0,0,0,1,0,
+ 0,0,0,1,0,
+ 0,0,0,1,0,
+ 1,0,0,1,0,
+ 0,1,1,0,0,
+ /* 'K' */
+ 1,0,0,0,1,
+ 1,0,0,1,0,
+ 1,0,1,0,0,
+ 1,1,0,0,0,
+ 1,0,1,0,0,
+ 1,0,0,1,0,
+ 1,0,0,0,1,
+ /* 'L' */
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,1,
+ /* 'M' */
+ 1,0,0,0,1,
+ 1,1,0,1,1,
+ 1,0,1,0,1,
+ 1,0,1,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ /* 'N' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,0,0,1,
+ 1,0,1,0,1,
+ 1,0,0,1,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ /* 'O' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* 'P' */
+ 1,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ /* 'Q' */
+ 0,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,1,0,1,
+ 1,0,0,1,0,
+ 0,1,1,0,1,
+ /* 'R' */
+ 1,1,1,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,1,1,1,0,
+ 1,0,1,0,0,
+ 1,0,0,1,0,
+ 1,0,0,0,1,
+ /* 'S' */
+ 0,1,1,1,1,
+ 1,0,0,0,0,
+ 1,0,0,0,0,
+ 0,1,1,1,0,
+ 0,0,0,0,1,
+ 0,0,0,0,1,
+ 1,1,1,1,0,
+ /* 'T' */
+ 1,1,1,1,1,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ /* 'U' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,1,1,0,
+ /* 'V' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,0,1,0,
+ 0,0,1,0,0,
+ /* 'W' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,1,0,1,
+ 1,0,1,0,1,
+ 1,0,1,0,1,
+ 0,1,0,1,0,
+ /* 'X' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,1,0,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ /* 'Y' */
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 1,0,0,0,1,
+ 0,1,0,1,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ 0,0,1,0,0,
+ /* 'Z' */
+ 1,1,1,1,1,
+ 0,0,0,0,1,
+ 0,0,0,1,0,
+ 0,0,1,0,0,
+ 0,1,0,0,0,
+ 1,0,0,0,0,
+ 1,1,1,1,1,
+};
+
diff --git a/bsp/PK40X256VLQ100/bsp/SLCD_Driver.c b/bsp/PK40X256VLQ100/bsp/SLCD_Driver.c
new file mode 100644
index 0000000000..d8572c60e7
--- /dev/null
+++ b/bsp/PK40X256VLQ100/bsp/SLCD_Driver.c
@@ -0,0 +1,367 @@
+/**************************************************************************//**
+ * @file SLCD_Driver.c
+ * @brief MK40X256VMD100 Segment LCD Low Level Driver (306 Segments)
+ * @version V0.01
+ * @date 13. May 2011
+ *
+ * @note
+ * Copyright (C) 2011 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+#include <PK40X256VLQ100.H>
+#include <string.h>
+#include "rtdef.h"
+#include "Font_35x8.h"
+#include "SLCD_Driver.h"
+
+const uint8_t WFShiftTable[] = /*Front Plane 0 - 38*/
+{
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+ 24,
+ 0,
+ 8,
+ 16,
+};
+
+/*******************************************************************************
+* SLCD controller Initialization *
+* Parameter: None
+* Return: *
+*******************************************************************************/
+
+
+void SLCD_Configuration (void)
+{
+ MCG->C1 |= MCG_C1_IRCLKEN_MASK; /* Enable IRCLK */
+
+ SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK /* Enable Port B,C,D Clock */
+ | SIM_SCGC5_PORTC_MASK
+ | SIM_SCGC5_PORTD_MASK );
+
+ SIM->SCGC3 |= SIM_SCGC3_SLCD_MASK; /* Enable SLCD Clock */
+
+ LCD->GCR = 0; /* Disable SLCD module */
+
+ LCD->PEN[0] = 0xFFFFFFFE; /* Enable SLCD pins 1-31 */
+ LCD->PEN[1] = 0x0000FFFF; /* Enable SLCD pins 32-47 */
+
+
+ LCD->BPEN[1] = 0x0000FF00; /* SLCD Backplane Assignment: Pin 38 - 46 */
+ LCD->BPEN[0] = 0;
+
+ LCD->WF[0] = 0; /* Clear SLCD */
+ LCD->WF[1] = 0;
+ LCD->WF[2] = 0;
+ LCD->WF[3] = 0;
+ LCD->WF[4] = 0;
+ LCD->WF[5] = 0;
+ LCD->WF[6] = 0;
+ LCD->WF[7] = 0;
+ LCD->WF[8] = 0;
+ LCD->WF[9] = 0;
+
+ LCD->WF[10] = 0x08040201; /* SLCD Backplane Phase Assignment */
+ LCD->WF[11] = 0x80402010;
+
+ LCD->GCR |= LCD_GCR_VSUPPLY(1); /* Drive VLL3 from VDD */
+ LCD->GCR |= LCD_GCR_CPSEL_MASK; /* LCD charge pump is selected */
+ LCD->GCR |= LCD_GCR_DUTY(7); /* Use 8 BP */
+ LCD->GCR |= LCD_GCR_SOURCE_MASK; /* LCD clock source : alternate clock */
+ LCD->GCR |= LCD_GCR_LCLK(4); /* LCD clock prescaler: 4 */
+
+ LCD->GCR |= LCD_GCR_LCDEN_MASK; /* Enable LCD module */
+}
+/*******************************************************************************
+* SLCD All Segments Off
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_SegmentsAllOff (void)
+{
+ LCD->WF[0] = 0;
+ LCD->WF[1] = 0;
+ LCD->WF[2] = 0;
+ LCD->WF[3] = 0;
+ LCD->WF[4] = 0;
+ LCD->WF[5] = 0;
+ LCD->WF[6] = 0;
+ LCD->WF[7] = 0;
+ LCD->WF[8] = 0;
+ LCD->WF[9] = 0;
+}
+
+/*******************************************************************************
+* SLCD All Segments On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_SegmentsAllOn(void)
+{
+ LCD->WF[0] = 0xFFFFFF00;
+ LCD->WF[1] = 0xFFFFFFFF;
+ LCD->WF[2] = 0xFFFFFFFF;
+ LCD->WF[3] = 0xFFFFFFFF;
+ LCD->WF[4] = 0xFFFFFFFF;
+ LCD->WF[5] = 0xFFFFFFFF;
+ LCD->WF[6] = 0xFFFFFFFF;
+ LCD->WF[7] = 0xFFFFFFFF;
+ LCD->WF[8] = 0xFFFFFFFF;
+ LCD->WF[9] = 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* SLCD Draw One ASCII character
+* Parameter: in (ASCII character), fploc (Front Plane Location)
+* Return: *
+*******************************************************************************/
+void SLCD_DrawChar(uint8_t in, uint8_t fploc)
+{
+ int nCol, nRow;
+ uint8_t bploc = 0;
+ uint8_t value = 0;
+
+ in -= 0x20;
+
+ for (nRow = 0; nRow < (CHAR_SIZE_ROW); nRow++) {
+ for (nCol = 0; nCol < CHAR_SIZE_COLUMN; nCol++) {
+ value = Font_35x8[in*CHAR_SIZE + nRow*CHAR_SIZE_COLUMN + nCol];
+ if (value == 0) {
+ LCD->WF[(fploc + 2)/4] &= ~(1 << (bploc + WFShiftTable[fploc + 2]));
+ }
+ else {
+ LCD->WF[(fploc + 2)/4] |= (1 << (bploc + WFShiftTable[fploc + 2]));
+ }
+ fploc++;
+ }
+ bploc++;
+ fploc -= CHAR_SIZE_COLUMN;
+ }
+}
+
+/*******************************************************************************
+* SLCD Print String
+* Parameter: srcStr (Source String) , sPos (Front Plane Location)
+* Return: *
+*******************************************************************************/
+void SLCD_PrintString (uint8_t * srcStr, uint8_t sPos)
+{
+ uint8_t offset = sPos;
+
+ while (*srcStr)
+ {
+ SLCD_DrawChar(*srcStr++,offset);
+ offset += CHAR_SIZE_SEGMENT;
+ }
+}
+
+/*******************************************************************************
+* SLCD Print String2
+* Parameter: srcStr (Source String) , sPos (Front Plane Location)
+* Return: *
+*******************************************************************************/
+void SLCD_PrintString2 (uint8_t * srcStr, uint8_t sPos)
+{
+ uint8_t offset = sPos;
+
+ while (*srcStr)
+ {
+ SLCD_DrawChar(*srcStr++,offset);
+ offset += CHAR_SIZE_SEGMENT;
+ }
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_RadioSighOn (void)
+{
+ LCD->WF[0] |= (1 << (BP_0 + 8)); /*FrontPlane: LCD_P1. BackPlane: 0*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_USBSighOn (void)
+{
+ LCD->WF[0] |= (1 << (BP_1 + 8)); /*FrontPlane: LCD_P1. BackPlane: 1*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_ClockSighOn (void)
+{
+ LCD->WF[0] |= (1 << (BP_3 + 8)); /*FrontPlane: LCD_P1. BackPlane: 3*/
+}
+
+/*******************************************************************************
+* Freescale Logo Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_FreescaleLogoOn (void)
+{
+ LCD->WF[0] |= (1 << (BP_4 + 8)); /*FrontPlane: LCD_P1. BackPlane: 4*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_JLinkSignOn (void)
+{
+ LCD->WF[0] |= (1 << (BP_5 + 8)); /*FrontPlane: LCD_P1. BackPlane: 5*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_BatterySignOn (int level)
+{
+ LCD->WF[0] |= (1 << (BP_6 + 8)); /*FrontPlane: LCD_P1. BackPlane: 6*/
+ if(level == 0)
+ {
+ LCD->WF[0] &= ~(1 << (BP_7 + 8 )); /*FrontPlane: LCD_P1. BackPlane: 0*/
+ LCD->WF[9] &= ~(1 << (BP_6 + 24)); /*BackPlane:*/
+ LCD->WF[9] &= ~(1 << (BP_7 + 24));/*BackPlane:*/
+ }
+ if(level == 1)
+ {
+ LCD->WF[0] &= ~(1 << (BP_7 + 8)); /*FrontPlane: LCD_P1. BackPlane: 0*/
+ LCD->WF[9] &= ~(1 << (BP_6 + 24)); /*BackPlane:*/
+ LCD->WF[9] |= (1 << (BP_7 + 24)); /*BackPlane:*/
+ }
+ if(level == 2)
+ {
+ LCD->WF[0] &= ~(1 << (BP_7 + 8)); /*FrontPlane: LCD_P1. BackPlane: 0*/
+ LCD->WF[9] |= (1 << (BP_6 + 24)); /*BackPlane:*/
+ LCD->WF[9] |= (1 << (BP_7 + 24)); /*BackPlane:*/
+ }
+ if(level == 3)
+ {
+ LCD->WF[0] |= (1 << (BP_7 + 8)); /*FrontPlane: LCD_P1. BackPlane: 6*/
+ LCD->WF[9] |= (1 << (BP_6 + 24)); /*BackPlane:*/
+ LCD->WF[9] |= (1 << (BP_7 + 24)); /*BackPlane:*/
+ }
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_RadioSighOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_0 + 8)); /*FrontPlane: LCD_P1. BackPlane: 0*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_USBSighOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_1 + 8)); /*FrontPlane: LCD_P1. BackPlane: 1*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment On
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_ClockSighOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_3 + 8)); /*FrontPlane: LCD_P1. BackPlane: 3*/
+}
+
+/*******************************************************************************
+* Freescale Logo Segment Off
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_FreescaleLogoOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_4 + 8)); /*FrontPlane: LCD_P1. BackPlane: 4*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment Off
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_JLinkSignOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_5 + 8)); /*FrontPlane: LCD_P1. BackPlane: 5*/
+}
+
+/*******************************************************************************
+* JLink Sign Segment Off
+* Parameter: None
+* Return: *
+*******************************************************************************/
+void SLCD_BatterySignOff (void)
+{
+ LCD->WF[0] &= ~(1 << (BP_6 + 8)); /*FrontPlane: LCD_P1. BackPlane: 5*/
+ LCD->WF[0] &= ~(1 << (BP_7 + 8)); /*FrontPlane: LCD_P1. BackPlane: 7*/
+ LCD->WF[9] &= ~(1 << (BP_6 + 24)); /*BackPlane:*/
+ LCD->WF[9] &= ~(1 << (BP_7 + 24)); /*BackPlane:*/
+}
+
+// end file ----------------------------------------------------------------------------
diff --git a/bsp/PK40X256VLQ100/bsp/SLCD_Driver.h b/bsp/PK40X256VLQ100/bsp/SLCD_Driver.h
new file mode 100644
index 0000000000..b3b2e22acd
--- /dev/null
+++ b/bsp/PK40X256VLQ100/bsp/SLCD_Driver.h
@@ -0,0 +1,69 @@
+/**************************************************************************//**
+ * @file SLCD_Driver.h
+ * @brief SLCD Low Level Driver function prototypes and defines
+ * @version V0.01
+ * @date 13. May 2011
+ *
+ * @note
+ * Copyright (C) 2011 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef _SLCD_DRIVER_H
+#define _SLCD_DRIVER_H
+
+
+#define CHAR_SIZE_COLUMN 5
+#define CHAR_SIZE_ROW 7
+#define CHAR_SIZE_SEGMENT 6
+
+#define CHAR_SIZE 35
+
+
+typedef enum
+{
+ BP_0 = 0,
+ BP_1,
+ BP_2,
+ BP_3,
+ BP_4,
+ BP_5,
+ BP_6,
+ BP_7
+} BackPlaneNumber;
+
+
+extern void SLCD_Configuration (void);
+extern void SLCD_SegmentsAllOff(void);
+extern void SLCD_SegmentsAllOn(void);
+extern void SLCD_DrawChar(rt_uint8_t in, rt_uint8_t fploc);
+extern void SLCD_PrintString (rt_uint8_t * srcStr, rt_uint8_t sPos);
+
+extern void SLCD_RadioSighOn(void);
+extern void SLCD_USBSighOn(void);
+extern void SLCD_FreescaleLogoOn(void);
+extern void SLCD_JLinkSignOn(void);
+extern void SLCD_ClockSighOn(void);
+extern void SLCD_BatterySignOn(int level);
+
+extern void SLCD_RadioSighOff(void);
+extern void SLCD_USBSighOff(void);
+extern void SLCD_FreescaleLogoOff(void);
+extern void SLCD_JLinkSignOff(void);
+extern void SLCD_ClockSighOff(void);
+extern void SLCD_BatterySignOff(void);
+
+#endif /* _SLCD_DRIVER_H */
diff --git a/bsp/PK40X256VLQ100/rtconfig.h b/bsp/PK40X256VLQ100/rtconfig.h
new file mode 100644
index 0000000000..2e858c3efc
--- /dev/null
+++ b/bsp/PK40X256VLQ100/rtconfig.h
@@ -0,0 +1,67 @@
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX 4
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE 4
+
+/* PRIORITY_MAX*/
+#define RT_THREAD_PRIORITY_MAX 8
+
+/* Tick per Second*/
+#define RT_TICK_PER_SECOND 100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug*/
+/* #define RT_THREAD_DEBUG */
+
+/* Using Hook*/
+/* #define RT_USING_HOOK */
+
+/* SECTION: IPC */
+/* Using Semaphore*/
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex*/
+/* #define RT_USING_MUTEX */
+
+/* Using Event*/
+/* #define RT_USING_EVENT */
+
+/* Using MailBox*/
+#define RT_USING_MAILBOX
+
+/* Using Message Queue*/
+/* #define RT_USING_MESSAGEQUEUE */
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+/* #define RT_USING_MEMPOOL */
+
+/* Using Dynamic Heap Management*/
+/* #define RT_USING_HEAP */
+
+/* Using Small MM*/
+#define RT_USING_SMALL_MEM
+#define RT_USING_TINY_SIZE
+
+/* SECTION: Device System */
+/* Using Device System */
+//#define RT_USING_DEVICE
+
+/* buffer size for UART reception */
+//#define RT_UART_RX_BUFFER_SIZE 64
+
+/* Using UART */
+//#define RT_USING_UART
+
+/* SECTION: Console options */
+/* use console for rt_kprintf */
+//#define RT_USING_CONSOLE
+/* the buffer size of console */
+//#define RT_CONSOLEBUF_SIZE 80
+
+#endif
diff --git a/bsp/PK40X256VLQ100/startup.c b/bsp/PK40X256VLQ100/startup.c
new file mode 100644
index 0000000000..f6adadc984
--- /dev/null
+++ b/bsp/PK40X256VLQ100/startup.c
@@ -0,0 +1,116 @@
+/*
+ * File : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-01-25 Bernard first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+#ifdef RT_USING_UART
+#include "uart.h"
+#endif
+
+/**
+ * @addtogroup sam7s
+ */
+
+/*@{*/
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#endif
+
+#ifdef __GNUC__
+extern unsigned char __bss_start;
+extern unsigned char __bss_end;
+#endif
+
+extern void rt_hw_interrupt_init(void);
+extern int rt_application_init(void);
+#ifdef RT_USING_DEVICE
+extern rt_err_t rt_hw_serial_init(void);
+#endif
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+ /* init kernel object */
+ rt_system_object_init();
+
+ /* init board */
+ rt_hw_board_init();
+ rt_show_version();
+
+ /* init tick */
+ rt_system_tick_init();
+
+ /* init timer system */
+ rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+#ifdef __CC_ARM
+ rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x204000);
+#elif __ICCARM__
+ rt_system_heap_init(__segment_end("HEAP"), (void*)0x204000);
+#else
+ rt_system_heap_init((void*)&__bss_end, (void*)0x204000);
+#endif
+#endif
+
+ /* init scheduler system */
+ rt_system_scheduler_init();
+
+#ifdef RT_USING_HOOK /* if the hook is used */
+ /* set idle thread hook */
+ rt_thread_idle_sethook(rt_hw_led_flash);
+#endif
+
+#ifdef RT_USING_DEVICE
+ /* init all device */
+ rt_device_init_all();
+#endif
+
+ /* init application */
+ rt_application_init();
+
+#ifdef RT_USING_FINSH
+ /* init finsh */
+ finsh_system_init();
+ finsh_set_device("uart1");
+#endif
+
+ /* init idle thread */
+ rt_thread_idle_init();
+
+ /* start scheduler */
+ rt_system_scheduler_start();
+
+ /* never reach here */
+ return ;
+}
+
+int main (void)
+{
+ rt_uint32_t UNUSED level;
+
+ /* disable interrupt first */
+ level = rt_hw_interrupt_disable();
+
+ /* invoke rtthread_startup */
+ rtthread_startup();
+ while(1);
+ return 0;
+}
+
+/*@}*/
diff --git a/bsp/PK40X256VLQ100/uart.c b/bsp/PK40X256VLQ100/uart.c
new file mode 100644
index 0000000000..dbe4c5a215
--- /dev/null
+++ b/bsp/PK40X256VLQ100/uart.c
@@ -0,0 +1,295 @@
+/****************************************************************************
+ * $Id:: uart.c 3736 2010-06-24 02:07:03Z usb00423 $
+ * Project: NXP LPC122x UART example
+ *
+ * Description:
+ * This file contains UART code example which include UART
+ * initialization, UART interrupt handler, and related APIs for
+ * UART access.
+ *
+ ****************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * NXP Semiconductors assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. NXP Semiconductors
+ * reserves the right to make changes in the software without
+ * notification. NXP Semiconductors also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+****************************************************************************/
+#include <rthw.h>
+#include <rtthread.h>
+#include <CMSIS/LPC122x.h>
+
+#include "uart.h"
+
+#define IER_RBR 0x01
+#define IER_THRE 0x02
+#define IER_RLS 0x04
+
+#define IIR_PEND 0x01
+#define IIR_RLS 0x03
+#define IIR_RDA 0x02
+#define IIR_CTI 0x06
+#define IIR_THRE 0x01
+
+#define LSR_RDR 0x01
+#define LSR_OE 0x02
+#define LSR_PE 0x04
+#define LSR_FE 0x08
+#define LSR_BI 0x10
+#define LSR_THRE 0x20
+#define LSR_TEMT 0x40
+#define LSR_RXFE 0x80
+
+/**
+ * @addtogroup LPC11xx
+ */
+
+/*@{*/
+#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
+
+#define UART_BAUDRATE 115200
+
+struct rt_uart_lpc
+{
+ struct rt_device parent;
+
+ /* buffer for reception */
+ rt_uint8_t read_index, save_index;
+ rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
+}uart_device;
+
+void UART0_IRQHandler(void)
+{
+ rt_ubase_t level, iir;
+ struct rt_uart_lpc* uart = &uart_device;
+
+ /* read IIR and clear it */
+ iir = LPC_UART0->IIR;
+
+ iir >>= 0x01; /* skip pending bit in IIR */
+ iir &= 0x07; /* check bit 1~3, interrupt identification */
+
+ if (iir == IIR_RDA) /* Receive Line Status */
+ {
+ /* If no error on RLS, normal ready, save into the data buffer. */
+ /* Note: read RBR will clear the interrupt */
+ uart->rx_buffer[uart->save_index] = LPC_UART0->RBR;
+ level = rt_hw_interrupt_disable();
+ uart->save_index ++;
+ if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
+ uart->save_index = 0;
+ rt_hw_interrupt_enable(level);
+ /* invoke callback */
+ if(uart->parent.rx_indicate != RT_NULL)
+ {
+ rt_size_t length;
+ if (uart->read_index > uart->save_index)
+ length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
+ else
+ length = uart->save_index - uart->read_index;
+
+ uart->parent.rx_indicate(&uart->parent, length);
+ }
+ }
+ return;
+}
+
+/*****************************************************************************
+** Function name: rt_uart_init
+** Descriptions:
+** parameters: dev
+** Returned value: None
+*****************************************************************************/
+static rt_err_t rt_uart_init(rt_device_t dev)
+{
+ rt_uint32_t Fdiv;
+ rt_uint32_t regVal;
+
+ NVIC_DisableIRQ(UART0_IRQn);
+
+ /* Init UART Hardware */
+ LPC_IOCON->PIO0_1 &= ~0x07; /* UART I/O config */
+ LPC_IOCON->PIO0_1 |= 0x02; /* UART RXD */
+ LPC_IOCON->PIO0_2 &= ~0x07;
+ LPC_IOCON->PIO0_2 |= 0x02; /* UART TXD */
+
+ /* Enable UART clock */
+ LPC_SYSCON->PRESETCTRL |= (0x1<<2);
+ LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<12);
+ LPC_SYSCON->UART0CLKDIV = 0x1; /* divided by 1 */
+
+ LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
+ regVal = LPC_SYSCON->UART0CLKDIV;
+ Fdiv = ((SystemAHBFrequency/regVal)/16)/UART_BAUDRATE ; /*baud rate */
+
+ LPC_UART0->DLM = Fdiv / 256;
+ LPC_UART0->DLL = Fdiv % 256;
+ LPC_UART0->LCR = 0x03; /* DLAB = 0 */
+ LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
+
+ /* Read to clear the line status. */
+ regVal = LPC_UART0->LSR;
+
+ /* Ensure a clean start, no data in either TX or RX FIFO. */
+ while ( LPC_UART0->LSR & (LSR_THRE|LSR_TEMT) != (LSR_THRE|LSR_TEMT) );
+ while ( LPC_UART0->LSR & LSR_RDR )
+ {
+ regVal = LPC_UART0->RBR; /* Dump data from RX FIFO */
+ }
+
+ /* Enable the UART Interrupt */
+ NVIC_EnableIRQ(UART0_IRQn);
+
+ LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
+
+ return RT_EOK;
+}
+
+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ RT_ASSERT(dev != RT_NULL);
+ if(dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* Enable the UART Interrupt */
+ NVIC_EnableIRQ(UART0_IRQn);
+ }
+ return RT_EOK;
+}
+
+static rt_err_t rt_uart_close(rt_device_t dev)
+{
+ RT_ASSERT(dev != RT_NULL);
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* Disable the UART Interrupt */
+ NVIC_DisableIRQ(UART0_IRQn);
+ }
+
+ return RT_EOK;
+}
+static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ rt_uint8_t* ptr;
+ struct rt_uart_lpc *uart = (struct rt_uart_lpc*)dev;
+ RT_ASSERT(uart != RT_NULL);
+
+ /* point to buffer */
+ ptr = (rt_uint8_t*) buffer;
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ while (size)
+ {
+ /* interrupt receive */
+ rt_base_t level;
+
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+ if (uart->read_index != uart->save_index)
+ {
+ *ptr = uart->rx_buffer[uart->read_index];
+
+ uart->read_index ++;
+ if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
+ uart->read_index = 0;
+ }
+ else
+ {
+ /* no data in rx buffer */
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ break;
+ }
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+
+ ptr ++;
+ size --;
+ }
+
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+ }
+
+ return 0;
+}
+
+static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+ char *ptr;
+ ptr = (char*)buffer;
+
+ if (dev->flag & RT_DEVICE_FLAG_STREAM)
+ {
+ /* stream mode */
+ while (size)
+ {
+ if (*ptr == '\n')
+ {
+ /* THRE status, contain valid data */
+ while ( !(LPC_UART0->LSR & LSR_THRE) );
+ /* write data */
+ LPC_UART0->THR = '\r';
+ }
+
+ /* THRE status, contain valid data */
+ while ( !(LPC_UART0->LSR & LSR_THRE) );
+ /* write data */
+ LPC_UART0->THR = *ptr;
+
+ ptr ++;
+ size --;
+ }
+ }
+ else
+ {
+ while ( size != 0 )
+ {
+ /* THRE status, contain valid data */
+ while ( !(LPC_UART0->LSR & LSR_THRE) );
+
+ /* write data */
+ LPC_UART0->THR = *ptr;
+
+ ptr++;
+ size--;
+ }
+ }
+
+ return (rt_size_t) ptr - (rt_size_t) buffer;
+}
+
+void rt_hw_uart_init(void)
+{
+ struct rt_uart_lpc* uart;
+
+ /* get uart device */
+ uart = &uart_device;
+
+ /* device initialization */
+ uart->parent.type = RT_Device_Class_Char;
+ rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
+ uart->read_index = uart->save_index = 0;
+
+ /* device interface */
+ uart->parent.init = rt_uart_init;
+ uart->parent.open = rt_uart_open;
+ uart->parent.close = rt_uart_close;
+ uart->parent.read = rt_uart_read;
+ uart->parent.write = rt_uart_write;
+ uart->parent.control = RT_NULL;
+ uart->parent.user_data = RT_NULL;
+
+ rt_device_register(&uart->parent,
+ "uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
+}
+
+#endif
+
+/******************************************************************************
+** End Of File
+******************************************************************************/
diff --git a/bsp/PK40X256VLQ100/uart.h b/bsp/PK40X256VLQ100/uart.h
new file mode 100644
index 0000000000..7b4663aa3d
--- /dev/null
+++ b/bsp/PK40X256VLQ100/uart.h
@@ -0,0 +1,6 @@
+#ifndef __UART_H__
+#define __UART_H__
+
+void rt_hw_uart_init(void);
+
+#endif
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-30 12:50:08 +0000