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authorMeco Man <[email protected]>2021-09-21 21:29:19 -0400
committerMeco Man <[email protected]>2021-09-22 08:24:45 -0400
commitf191694b19b7a3e1771434153e6fba4fd880131c (patch)
tree5de31d7718940c7ca7a652b2b2a9a787ed39d1c9 /bsp
parent13b0b60b1466b4a3eae34b5437ff35432de32c5e (diff)
[ci][action.yml]CI加入龙芯ls2kdev
Diffstat (limited to 'bsp')
-rw-r--r--bsp/ls2kdev/.config3
-rw-r--r--bsp/ls2kdev/drivers/drv_spi.c14
-rw-r--r--bsp/ls2kdev/drivers/drv_spi.h11
-rw-r--r--bsp/ls2kdev/rtconfig.h1
4 files changed, 14 insertions, 15 deletions
diff --git a/bsp/ls2kdev/.config b/bsp/ls2kdev/.config
index 133b7dca3a..3612f7af53 100644
--- a/bsp/ls2kdev/.config
+++ b/bsp/ls2kdev/.config
@@ -415,6 +415,7 @@ CONFIG_RT_LWIP_USING_PING=y
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
+# CONFIG_PKG_USING_HM is not set
#
# security packages
@@ -688,4 +689,4 @@ CONFIG_RT_LWIP_USING_PING=y
CONFIG_SOC_LS=y
CONFIG_SOC_LS2K1000=y
CONFIG_RT_USING_UART0=y
-CONFIG_RT_USING_UART4=y
+# CONFIG_RT_USING_UART4 is not set
diff --git a/bsp/ls2kdev/drivers/drv_spi.c b/bsp/ls2kdev/drivers/drv_spi.c
index 5a42acbee8..e118f48039 100644
--- a/bsp/ls2kdev/drivers/drv_spi.c
+++ b/bsp/ls2kdev/drivers/drv_spi.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -8,13 +8,15 @@
* 2020-10-28 0xcccccccccccc Initial Version
* 2021-01-17 0xcccccccccccc Bug Fixed : clock division cannot been adjusted as expected due to wrong register configuration.
*/
+
/**
* @addtogroup ls2k
*/
/*@{*/
-#include <stdio.h>
+
#include <stdlib.h>
#include <ctype.h>
+#include <stdint.h>
#include <rtthread.h>
#include <drivers/spi.h>
#include "drv_spi.h"
@@ -22,15 +24,15 @@
#ifdef RT_USING_SPI
static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha)
{
- SET_SPI(SPSR, 0xc0);
+ SET_SPI(SPSR, 0xc0);
SET_SPI(PARAM, 0x40);
SET_SPI(PARAM2, 0x01);
SET_SPI(SPER, (spre_spr & 0b00001100) >> 2);
- SET_SPI(SPCR, 0x50 | copl << 3 | cpha << 2 | (spre_spr & 0b00000011));
+ SET_SPI(SPCR, 0x50 | copl << 3 | cpha << 2 | (spre_spr & 0b00000011));
SET_SPI(SOFTCS, 0xff);
}
-static void spi_set_csn(uint8_t val)
+static void spi_set_csn(uint8_t val)
{
SET_SPI(SOFTCS, val);
}
@@ -38,7 +40,7 @@ static void spi_set_csn(uint8_t val)
#ifdef RT_USING_SPI_GPIOCS
#include <drivers/pin.h>
#endif
-static void spi_set_cs(unsigned char cs, int new_status)
+static void spi_set_cs(unsigned char cs, int new_status)
{
if (cs < 4)
{
diff --git a/bsp/ls2kdev/drivers/drv_spi.h b/bsp/ls2kdev/drivers/drv_spi.h
index 0b254d4fc2..447e65d91b 100644
--- a/bsp/ls2kdev/drivers/drv_spi.h
+++ b/bsp/ls2kdev/drivers/drv_spi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,12 +14,9 @@
#ifndef LS2K_DRV_SPI_H
#define LS2K_DRV_SPI_H
-#include <rtthread.h>
-#include <rthw.h>
-
// kseg1 byte operation
-#define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
-#define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)
+#define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
+#define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)
// clock configurations
#define APB_MAX_SPEED 125000000U
#define APB_FREQSCALE (((KSEG1_LOAD8(0xffffffffbfe104d2)>>4)&0x7)+1)
@@ -30,7 +27,7 @@
// bit bias
#define SPCR 0x0
#define SPSR 0x1
-#define FIFO 0x2
+#define FIFO 0x2
#define TXFIFO 0x2
#define RXFIFO 0x2
#define SPER 0x3
diff --git a/bsp/ls2kdev/rtconfig.h b/bsp/ls2kdev/rtconfig.h
index 90dcf2ad91..12d44a992c 100644
--- a/bsp/ls2kdev/rtconfig.h
+++ b/bsp/ls2kdev/rtconfig.h
@@ -253,6 +253,5 @@
#define SOC_LS
#define SOC_LS2K1000
#define RT_USING_UART0
-#define RT_USING_UART4
#endif