add the AT45DB Drivers

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@328 bbd45198-f89e-11dd-88c7-29a3b14d5316

8 files changed, 493 insertions, 341 deletions

diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c
index 67417763a1..f2a7816d46 100644
--- a/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c
+++ b/bsp/stm32_radio/Libraries/Mass_Storage/src/mass_mal.c
@@ -26,6 +26,7 @@ uint32_t Mass_Block_Count[3];
 uint32_t Max_Lun = 2;

 

 rt_device_t dev_sdio = RT_NULL;

+rt_device_t dev_spi_flash = RT_NULL;

 

 uint16_t MAL_Init(uint8_t lun)

 {

@@ -37,7 +38,7 @@ uint16_t MAL_Init(uint8_t lun)
         status = MAL_OK;

         break;

     case 1:

-        status = MAL_FAIL;

+        status = MAL_OK;

         break;

     case 2:

         status = MAL_FAIL;

@@ -55,6 +56,11 @@ uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uin
     {

     case 0:

     {

+        dev_spi_flash->write(dev_spi_flash,Memory_Offset,Writebuff,Transfer_Length);

+    }

+    break;

+    case 1:

+    {

         dev_sdio->write(dev_sdio,Memory_Offset,Writebuff,Transfer_Length);

     }

     break;

@@ -71,6 +77,11 @@ uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint1
     {

     case 0:

     {

+        dev_spi_flash->read(dev_spi_flash,Memory_Offset,Readbuff,Transfer_Length);

+    }

+    break;

+    case 1:

+    {

         dev_sdio->read(dev_sdio,Memory_Offset,Readbuff,Transfer_Length);

     }

     break;

@@ -87,7 +98,7 @@ uint16_t MAL_GetStatus (uint8_t lun)
     case 0:

         return MAL_OK;

     case 1:

-        return MAL_FAIL;

+        return MAL_OK;

     case 2:

         return MAL_FAIL;

     default:

diff --git a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c
index 1c9bdec041..ce12e54e23 100644
--- a/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c
+++ b/bsp/stm32_radio/Libraries/Mass_Storage/src/usb_main.c
@@ -10,6 +10,7 @@ extern uint32_t Mass_Memory_Size[2];
 extern uint32_t Mass_Block_Size[2];

 extern uint32_t Mass_Block_Count[2];

 extern rt_device_t dev_sdio;

+extern rt_device_t dev_spi_flash;

 

 #include <finsh.h>

 #include "sdcard.h"

@@ -18,22 +19,33 @@ void USB_cable(void)
     rt_device_t dev = RT_NULL;

     SD_CardInfo * sdio_info = RT_NULL;

     dev = rt_device_find("sd0");

+

+

+    /* SPI_FLASH */

+    dev_spi_flash = rt_device_find("spi0");

+    Mass_Block_Size[0]  = 512;

+    Mass_Block_Count[0] = 4096;

+    Mass_Memory_Size[0] = 4096*512;

+

     if(dev != RT_NULL)

     {

         dev_sdio = dev;

         sdio_info = (SD_CardInfo *)dev->private;

-        Mass_Memory_Size[0] = sdio_info->CardCapacity;

-        Mass_Block_Size[0]  = sdio_info->CardBlockSize;

-        Mass_Block_Count[0] = Mass_Memory_Size[0] / Mass_Block_Size[0];

-

-        Set_System();

-        Set_USBClock();

-        USB_Interrupts_Config();

-        USB_Init();

+        Mass_Memory_Size[1] = sdio_info->CardCapacity;

+        Mass_Block_Size[1]  = sdio_info->CardBlockSize;

+        Mass_Block_Count[1] = Mass_Memory_Size[0] / Mass_Block_Size[0];

     }

     else

     {

         rt_kprintf("\r\nNo find the device sd0 !!!!");

     }

+

+    /* 3:NAND */

+

+    /* usb msc up*/

+    Set_System();

+    Set_USBClock();

+    USB_Interrupts_Config();

+    USB_Init();

 }

 FINSH_FUNCTION_EXPORT(USB_cable, cable_the_usb);

diff --git a/bsp/stm32_radio/board.c b/bsp/stm32_radio/board.c
index 83944123df..5636c1c361 100644
--- a/bsp/stm32_radio/board.c
+++ b/bsp/stm32_radio/board.c
@@ -95,12 +95,12 @@ void NVIC_Configuration(void)
     NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);

 #endif

 

-	/* 

-	 * set priority group: 

-	 * 2 bits for pre-emption priority

+    /*

+     * set priority group:

+     * 2 bits for pre-emption priority

      * 2 bits for subpriority

      */

-	NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);

+    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);

 }

 

 /*******************************************************************************

@@ -180,12 +180,35 @@ void rt_hw_board_init()
 

     /* NAND read ID command */

     FSMC_NAND_ReadID(&NAND_ID);

-    rt_kprintf("Read the NAND ID:%02X%02X%02X%02X\n",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);

+    rt_kprintf("\r\n\r\nRead the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);

 

     /* SRAM init */

     RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);

     FSMC_SRAM_Init();

 

+    /* memtest */

+    {

+        unsigned char * p_extram = (unsigned char *)0x68000000;

+        unsigned int temp;

+

+        rt_kprintf("\r\nmem testing....");

+        for(temp=0; temp<0x80000; temp++)

+        {

+            *p_extram++ = (unsigned char)temp;

+        }

+

+        p_extram = (unsigned char *)0x68000000;

+        for(temp=0; temp<0x80000; temp++)

+        {

+            if( *p_extram++ != (unsigned char)temp )

+            {

+                rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);

+                while(1);

+            }

+        }

+        rt_kprintf("\rmem test pass!!\r\n");

+    }/* memtest */

+

     {

         /* PC6 for SDCard Rst */

         GPIO_InitTypeDef GPIO_InitStructure;

@@ -196,7 +219,41 @@ void rt_hw_board_init()
         GPIO_Init(GPIOC,&GPIO_InitStructure);

         GPIO_SetBits(GPIOC,GPIO_Pin_6);

     }

-}

+

+    /* SPI1 config */

+    {

+        GPIO_InitTypeDef GPIO_InitStructure;

+        SPI_InitTypeDef SPI_InitStructure;

+

+        /* Enable SPI1 Periph clock */

+        RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA

+                               | RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,

+                               ENABLE);

+

+        /* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */

+        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;

+        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

+        GPIO_Init(GPIOA, &GPIO_InitStructure);

+

+        /*------------------------ SPI1 configuration ------------------------*/

+        SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;

+        SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

+        SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

+        SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;

+        SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;

+        SPI_InitStructure.SPI_NSS  = SPI_NSS_Soft;

+        SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;

+        SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

+        SPI_InitStructure.SPI_CRCPolynomial = 7;

+        SPI_Init(SPI1, &SPI_InitStructure);

+

+        /* Enable SPI_MASTER */

+        SPI_Cmd(SPI1, ENABLE);

+        SPI_CalculateCRC(SPI1, DISABLE);

+    }

+

+}/* rt_hw_board_init */

 

 #if STM32_CONSOLE_USART == 1

 #define CONSOLE_RX_PIN	GPIO_Pin_9

@@ -206,13 +263,13 @@ void rt_hw_board_init()
 #elif STM32_CONSOLE_USART == 2

 

 #if defined(STM32_LD) || defined(STM32_MD)

-	#define CONSOLE_RX_PIN	GPIO_Pin_6

-	#define CONSOLE_TX_PIN	GPIO_Pin_5

-	#define CONSOLE_GPIO	GPIOD

+#define CONSOLE_RX_PIN	GPIO_Pin_6

+#define CONSOLE_TX_PIN	GPIO_Pin_5

+#define CONSOLE_GPIO	GPIOD

 #elif defined(STM32_HD)

-	#define CONSOLE_RX_PIN	GPIO_Pin_3

-	#define CONSOLE_TX_PIN	GPIO_Pin_2

-	#define CONSOLE_GPIO	GPIOA

+#define CONSOLE_RX_PIN	GPIO_Pin_3

+#define CONSOLE_TX_PIN	GPIO_Pin_2

+#define CONSOLE_GPIO	GPIOA

 #endif

 

 #define CONSOLE_USART	USART2

@@ -300,7 +357,7 @@ static void rt_hw_console_putc(const char c)
 void rt_hw_console_output(const char* str)

 {

 #if STM32_CONSOLE_USART == 0

-	/* no console */

+    /* no console */

 #else

     while (*str)

     {

diff --git a/bsp/stm32_radio/codec.c b/bsp/stm32_radio/codec.c
index 38ac39340e..b7f65a96cf 100644
--- a/bsp/stm32_radio/codec.c
+++ b/bsp/stm32_radio/codec.c
@@ -2,81 +2,12 @@
 #include <rtthread.h>

 #include "stm32f10x.h"

 

-/*

- * WM8753 Driver

- */

-

-/* WM8753 register definitions */

-#define WM8753_DAC		0x01

-#define WM8753_ADC		0x02

-#define WM8753_PCM		0x03

-#define WM8753_HIFI		0x04

-#define WM8753_IOCTL	0x05

-#define WM8753_SRATE1	0x06

-#define WM8753_SRATE2	0x07

-#define WM8753_LDAC		0x08

-#define WM8753_RDAC		0x09

-#define WM8753_BASS		0x0a

-#define WM8753_TREBLE	0x0b

-#define WM8753_ALC1		0x0c

-#define WM8753_ALC2		0x0d

-#define WM8753_ALC3		0x0e

-#define WM8753_NGATE	0x0f

-#define WM8753_LADC		0x10

-#define WM8753_RADC		0x11

-#define WM8753_ADCTL1	0x12

-#define WM8753_3D		0x13

-#define WM8753_PWR1		0x14

-#define WM8753_PWR2		0x15

-#define WM8753_PWR3		0x16

-#define WM8753_PWR4		0x17

-#define WM8753_ID		0x18

-#define WM8753_INTPOL	0x19

-#define WM8753_INTEN	0x1a

-#define WM8753_GPIO1	0x1b

-#define WM8753_GPIO2	0x1c

-#define WM8753_RESET	0x1f

-#define WM8753_RECMIX1	0x20

-#define WM8753_RECMIX2	0x21

-#define WM8753_LOUTM1	0x22

-#define WM8753_LOUTM2	0x23

-#define WM8753_ROUTM1	0x24

-#define WM8753_ROUTM2	0x25

-#define WM8753_MOUTM1	0x26

-#define WM8753_MOUTM2	0x27

-#define WM8753_LOUT1V	0x28

-#define WM8753_ROUT1V	0x29

-#define WM8753_LOUT2V	0x2a

-#define WM8753_ROUT2V	0x2b

-#define WM8753_MOUTV	0x2c

-#define WM8753_OUTCTL	0x2d

-#define WM8753_ADCIN	0x2e

-#define WM8753_INCTL1	0x2f

-#define WM8753_INCTL2	0x30

-#define WM8753_LINVOL	0x31

-#define WM8753_RINVOL	0x32

-#define WM8753_MICBIAS	0x33

-#define WM8753_CLOCK	0x34

-#define WM8753_PLL1CTL1	0x35

-#define WM8753_PLL1CTL2	0x36

-#define WM8753_PLL1CTL3	0x37

-#define WM8753_PLL1CTL4	0x38

-#define WM8753_PLL2CTL1	0x39

-#define WM8753_PLL2CTL2	0x3a

-#define WM8753_PLL2CTL3	0x3b

-#define WM8753_PLL2CTL4	0x3c

-#define WM8753_BIASCTL	0x3d

-#define WM8753_ADCTL2	0x3f

 

 /*

 SCLK  PA5  SPI1_SCK

-SDIN  PA6

+SDIN  PA7  SPI1_MOSI

 CSB   PC5

 */

-#define wm_sclk_0  GPIO_ResetBits(GPIOA,GPIO_Pin_5)

-#define wm_sclk_1  GPIO_SetBits(GPIOA,GPIO_Pin_5)

-#define wm_sdin_0  GPIO_ResetBits(GPIOA,GPIO_Pin_7)

-#define wm_sdin_1  GPIO_SetBits(GPIOA,GPIO_Pin_7)

 #define wm_csb_0   GPIO_ResetBits(GPIOC,GPIO_Pin_5)

 #define wm_csb_1   GPIO_SetBits(GPIOC,GPIO_Pin_5)

 

@@ -124,56 +55,17 @@ static void NVIC_Configuration(void)
 static void GPIO_Configuration(void)

 {

     GPIO_InitTypeDef GPIO_InitStructure;

-    SPI_InitTypeDef SPI_InitStructure;

-

-#define SPI_MASTER                   SPI1

-#define SPI_MASTER_CLK               RCC_APB2Periph_SPI1

-#define SPI_MASTER_GPIO              GPIOA

-#define SPI_MASTER_GPIO_CLK          RCC_APB2Periph_GPIOA

-#define SPI_MASTER_PIN_SCK           GPIO_Pin_5

-#define SPI_MASTER_PIN_MISO          GPIO_Pin_6

-#define SPI_MASTER_PIN_MOSI          GPIO_Pin_7

-#define SPI_MASTER_IRQn              SPI1_IRQn

 

     /* Disable the JTAG interface and enable the SWJ interface */

     GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);

-

-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |

-                           RCC_APB2Periph_AFIO, ENABLE);

-

-    /* Enable SPI_MASTER Periph clock */

-    RCC_APB2PeriphClockCmd(SPI_MASTER_CLK, ENABLE);

-

-    /* Configure SPI_MASTER pins: SCK, MISO and MOSI */

-    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;

-    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

-    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

-    GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);

+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE);

 

+    /* PC5 CODEC CS */

     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;

     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;

     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

     GPIO_Init(GPIOC,&GPIO_InitStructure);

 

-    /* SPI_MASTER configuration ------------------------------------------------*/

-    SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;

-    SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

-    SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

-    SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;/* ��̬Ϊ�͵�ƽ */

-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; /* SPI_CPHA_1Edge �ӵ�һ���ؿ�ʼ������: ������

-                                                    SPI_CPHA_2Edge �ӵڶ����ؿ�ʼ������: �½��� */

-    SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

-    SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;

-    SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

-    SPI_InitStructure.SPI_CRCPolynomial = 7;

-    SPI_Init(SPI1, &SPI_InitStructure);

-

-    /* Enable SPI_MASTER */

-    SPI_Cmd(SPI1, ENABLE);

-    SPI_CalculateCRC(SPI1, DISABLE);

-

-

     /* Configure SPI2 pins: CK, WS and SD */

     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;

     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

@@ -235,64 +127,35 @@ static void I2S_Configuration(void)
     I2S_Init(SPI2, &I2S_InitStructure);

 }

 

-#if 1

-static void wm_delay(void)

+unsigned char SPI_WriteByte(unsigned char data)

 {

-    volatile unsigned int dl;

-    for(dl=0; dl<5000; dl++);

-}

-#endif

+    unsigned char Data = 0;

 

-void wm8753_send(rt_uint16_t s_data)

-{

-    /* Wait for SPI1 Tx buffer empty */

-    while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);

+    //Wait until the transmit buffer is empty

+    while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE)==RESET);

+    // Send the byte

+    SPI_I2S_SendData(SPI1,data);

 

-    wm_csb_0;

-    /* Send SPI1 data */

-    SPI_I2S_SendData(SPI1, (s_data>>8)&0xFF );

-    /* Wait for SPI1 Tx buffer empty */

-    while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);

-    /* Send SPI1 data */

-    SPI_I2S_SendData(SPI1, s_data&0xFF);

+    //Wait until a data is received

+    while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE)==RESET);

+    // Get the received data

+    Data = SPI_I2S_ReceiveData(SPI1);

 

-    wm_delay();

-    wm_csb_1;

+    // Return the shifted data

+    return Data;

+}

 

-#if 0

-    u8 i;

+void wm8753_send(rt_uint16_t s_data)

+{

     wm_csb_0;

-    //wm_delay();

-    wm_sclk_0;

-    //wm_delay();

-    for (i=0;i<16;i++)

-    {

-        if (s_data & 0x8000)

-        {

-            wm_sdin_1;

-        }

-        else

-        {

-            wm_sdin_0;

-        }

-        //wm_delay();

-        wm_sclk_1;

-        s_data <<= 1;

-        //wm_delay();

-        wm_sclk_0;

-    }

-    //wm_delay();

+    SPI_WriteByte( (s_data>>8)&0xFF );

+    SPI_WriteByte( s_data&0xFF );

     wm_csb_1;

-#endif

 }

 

 static rt_err_t wm8753_init (rt_device_t dev)

 {

-    wm8753_send(0xF00F); // test

     wm8753_send(0<<9 | 0xFF); // reset

-    //wm_delay();

-    //wm_delay();

-    //wm_delay();

 

     /* POWER manager */

     wm8753_send(1<<9 | (1<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 2    );//��Դ����

@@ -311,6 +174,19 @@ static rt_err_t wm8753_init (rt_device_t dev)
     wm8753_send(54<<9 | (1<<8) | (1<<7) | 35 ); // LOUT2 0-57-63

     wm8753_send(55<<9 | (1<<8) | (1<<7) | 35 ); // ROUT2 0-57-63

 

+#if 1

+    /* LINE IN test */

+    wm8753_send(47<<9 | (1<<8) | (1<<4) ); //L LINE_IN VOL (6:4)��������: 0-�� 1-12DB 2-9DB 5-0db 7+6DB

+    wm8753_send(48<<9 | (1<<8) | (1<<4) ); //R LINE_IN VOL (6:4)��������: 0-�� 1-12DB 2-9DB 5-0db 7+6DB

+    wm8753_send(50<<9 | (5<<2) | (1<<1) | (1<<0) );//������� (4:2)���� 0-�� 1-12DB 2-9DB 5-0db 7+6DB

+    wm8753_send(51<<9 | (5<<2) | (1<<1) | (1<<0) );//���Ҽ��� (4:2)���� 0-�� 1-12DB 2-9DB 5-0db 7+6DB

+

+    /* MIC test */

+    wm8753_send(44<<9 | (1<<8) | (1<<5) | (1<<4) | (0<<2) | (1<<1) | (1<<0) );//MIC����ѡ��

+    wm8753_send(45<<9 | 50);//16-0  63-35

+    wm8753_send(46<<9 | 50);//16-0  63-35

+#endif

+

     return RT_EOK;

 }

 

@@ -432,20 +308,8 @@ rt_err_t wm8753_hw_init(void)
     wm8753.read_index	= 0;

     wm8753.put_index 	= 0;

 

-	wm_csb_1;

-

-#if 0

-    wm_sclk_0;

-    wm_sclk_1;

-    wm_sclk_0;

-

-    wm_sdin_0;

-    wm_sdin_1;

-    wm_sdin_0;

-

-    wm_csb_0;

+    /* unselect */

     wm_csb_1;

-#endif

 

     /* register the device */

     return rt_device_register(&wm8753.parent, "snd",

diff --git a/bsp/stm32_radio/project.Uv2 b/bsp/stm32_radio/project.Uv2
index 4fac23c6a3..4ba21aae57 100644
--- a/bsp/stm32_radio/project.Uv2
+++ b/bsp/stm32_radio/project.Uv2
@@ -45,6 +45,7 @@ File 1,1,<.\player_bg.c><player_bg.c>
 File 1,1,<.\play_list.c><play_list.c>

 File 1,1,<.\ili9325\ili9320.c><ili9320.c>

 File 1,1,<.\codec.c><codec.c>

+File 1,1,<.\spi_flash.c><spi_flash.c>

 File 2,1,<..\..\src\clock.c><clock.c>

 File 2,1,<..\..\src\idle.c><idle.c>

 File 2,1,<..\..\src\ipc.c><ipc.c>

diff --git a/bsp/stm32_radio/spi_flash.c b/bsp/stm32_radio/spi_flash.c
new file mode 100644
index 0000000000..924b8eb92b
--- /dev/null
+++ b/bsp/stm32_radio/spi_flash.c
@@ -0,0 +1,199 @@
+#include <stm32f10x.h>

+//#include "spi_flash.h"

+#include   <string.h>

+

+extern unsigned char SPI_WriteByte(unsigned char data);

+

+/********************** hardware *************************************/

+/* SPI_FLASH_CS   PA4 */

+/* SPI_FLASH_RST  PA3 */

+#define FLASH_RST_0()    GPIO_ResetBits(GPIOA,GPIO_Pin_3)

+#define FLASH_RST_1()    GPIO_SetBits(GPIOA,GPIO_Pin_3)

+

+#define FLASH_CS_0()     GPIO_ResetBits(GPIOA,GPIO_Pin_4)

+#define FLASH_CS_1()     GPIO_SetBits(GPIOA,GPIO_Pin_4)

+/********************** hardware *************************************/

+

+static void GPIO_Configuration(void)

+{

+    GPIO_InitTypeDef GPIO_InitStructure;

+

+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);

+

+    GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_4 | GPIO_Pin_3;

+    GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_Out_PP;

+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

+    GPIO_Init(GPIOA,&GPIO_InitStructure);

+

+    FLASH_RST_0(); // RESET

+    FLASH_RST_1();

+}

+

+static unsigned char SPI_HostReadByte(void)

+{

+    return SPI_WriteByte(0x00);

+}

+

+static void SPI_HostWriteByte(unsigned char wByte)

+{

+    SPI_WriteByte(wByte);

+}

+

+/******************************************************************************/

+/*Status Register Format:                                   */

+/*   ----------------------------------------------------------------------- */

+/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */

+/* |--------|--------|--------|--------|--------|--------|--------|--------| */

+/* |RDY/BUSY| COMP |   0   |   1   |   1   |   1   |   X   |   X   | */

+/*   ----------------------------------------------------------------------- */

+/* bit7 - æ��ǣ�0Ϊæ1Ϊ��æ��                               */

+/*       ��Status Register��λ0�Ƴ�֮�󣬽�������ʱ���������н�ʹSPI��������*/

+/*       �����µ�״̬�ֽ��ͳ���                               */

+/* bit6 - ������һ��Main Memory Page��Buffer�ıȽϽ����0��ͬ��1��ͬ��   */

+/* bit5                                               */

+/* bit4                                               */

+/* bit3                                               */

+/* bit2 - ��4λ������������ܶȣ�����AT45DB041B����4λӦ����0111��һ���ܱ�� */

+/*       16�ֲ�ͬ�ܶȵ�������                               */

+/* bit1                                               */

+/* bit0 - ��2λ��ʱ��Ч                                     */

+/******************************************************************************/

+static unsigned char AT45DB_StatusRegisterRead(void)

+{

+    unsigned char i;

+

+    FLASH_CS_0();

+    SPI_HostWriteByte(0xd7);

+    i=SPI_HostReadByte();

+    FLASH_CS_1();

+

+    return i;

+}

+

+static void wait_busy(void)

+{

+    unsigned int    i=0;

+    while (i++<255)

+    {

+        if (AT45DB_StatusRegisterRead()&0x80)

+        {

+            break;

+        }

+    }

+}

+

+static void read_page(unsigned int page,unsigned char * pHeader)

+{

+    unsigned int i=0;

+

+    wait_busy();

+

+    FLASH_CS_0();

+    SPI_HostWriteByte(0x53);

+    SPI_HostWriteByte((unsigned char)(page >> 6));

+    SPI_HostWriteByte((unsigned char)(page << 2));

+    SPI_HostWriteByte(0x00);

+    FLASH_CS_1();

+

+    wait_busy();

+

+    FLASH_CS_0();

+    SPI_HostWriteByte(0xD4);

+    SPI_HostWriteByte(0x00);

+    SPI_HostWriteByte(0x00);

+    SPI_HostWriteByte(0x00);

+    SPI_HostWriteByte(0x00);

+    for (i=0; i<512; i++)

+    {

+        *pHeader++ = SPI_HostReadByte();

+    }

+    FLASH_CS_1();

+

+}

+

+static void write_page(unsigned int page,unsigned char * pHeader)

+{

+    unsigned int i;

+

+    wait_busy();

+

+    FLASH_CS_0();

+    SPI_HostWriteByte(0x87);

+    SPI_HostWriteByte(0);

+    SPI_HostWriteByte(0);

+    SPI_HostWriteByte(0);

+    for(i=0; i<512; i++)

+    {

+        SPI_HostWriteByte(*pHeader++);

+    }

+    FLASH_CS_1();

+

+    wait_busy();

+

+    FLASH_CS_0();

+    SPI_HostWriteByte(0x86);

+    SPI_HostWriteByte((unsigned char)(page>>6));

+    SPI_HostWriteByte((unsigned char)(page<<2));

+    SPI_HostWriteByte(0x00);

+    FLASH_CS_1();

+}

+

+

+#include <rtthread.h>

+/* SPI DEVICE */

+static struct rt_device spi_flash_device;

+

+/* RT-Thread Device Driver Interface */

+static rt_err_t rt_spi_flash_init(rt_device_t dev)

+{

+    return RT_EOK;

+}

+

+static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)

+{

+

+    return RT_EOK;

+}

+

+static rt_err_t rt_spi_flash_close(rt_device_t dev)

+{

+    return RT_EOK;

+}

+

+static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)

+{

+    return RT_EOK;

+}

+

+static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)

+{

+    /* only supply single block read: block size 512Byte */

+    read_page(pos/512,buffer);

+    return RT_EOK;

+}

+

+static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)

+{

+    /* only supply single block write: block size 512Byte */

+    write_page(pos/512,(unsigned char*)buffer);

+    return RT_EOK;

+}

+

+void rt_hw_spi_flash_init(void)

+{

+    GPIO_Configuration();

+

+    /* register spi_flash device */

+    spi_flash_device.init    = rt_spi_flash_init;

+    spi_flash_device.open    = rt_spi_flash_open;

+    spi_flash_device.close   = rt_spi_flash_close;

+    spi_flash_device.read 	 = rt_spi_flash_read;

+    spi_flash_device.write   = rt_spi_flash_write;

+    spi_flash_device.control = rt_spi_flash_control;

+

+    /* no private */

+    spi_flash_device.private = RT_NULL;

+

+    rt_device_register(&spi_flash_device, "spi0",

+                       RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);

+}

diff --git a/bsp/stm32_radio/spi_flash.h b/bsp/stm32_radio/spi_flash.h
new file mode 100644
index 0000000000..ed079f2464
--- /dev/null
+++ b/bsp/stm32_radio/spi_flash.h
@@ -0,0 +1,6 @@
+#ifndef SPI_FLASH_H_INCLUDED

+#define SPI_FLASH_H_INCLUDED

+

+extern void rt_hw_spi_flash_init(void);

+

+#endif // SPI_FLASH_H_INCLUDED

diff --git a/bsp/stm32_radio/startup.c b/bsp/stm32_radio/startup.c
index d5c16446c7..a60789c99b 100644
--- a/bsp/stm32_radio/startup.c
+++ b/bsp/stm32_radio/startup.c
@@ -1,152 +1,154 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-08-31     Bernard      first implementation
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "board.h"
+/*

+ * File      : startup.c

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2006, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://openlab.rt-thread.com/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2006-08-31     Bernard      first implementation

+ */

+

+#include <rthw.h>

+#include <rtthread.h>

+

+#include "board.h"

 #include "rtc.h"

-
+#include "spi_flash.h"

+

 #include <stm32f10x.h>

-
-#ifdef RT_USING_LWIP
-#include <netif/ethernetif.h>
-#include "dm9000.h"
-#endif
-
-/**
- * @addtogroup STM32
- */
-
-/*@{*/
-#ifdef __CC_ARM
-extern int Image$$RW_IRAM1$$ZI$$Limit;
-#elif __ICCARM__
-#pragma section="HEAP"
-#else
-extern int __bss_end;
-#endif
-
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
-extern void finsh_set_device(const char* device);
-#endif
-extern int rt_application_init(void);
-extern rt_err_t wm8753_hw_init(void);
-extern rt_err_t wm8978_hw_init(void);
-#ifdef  DEBUG
-/*******************************************************************************
-* Function Name  : assert_failed
-* Description    : Reports the name of the source file and the source line number
-*                  where the assert error has occurred.
-* Input          : - file: pointer to the source file name
-*                  - line: assert error line source number
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void assert_failed(u8* file, u32 line)
-{ 
-	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
-	rt_kprintf("       file  %s\r\n", file);
-	rt_kprintf("       line  %d\r\n", line);
-
-	while (1) ;
-}
-#endif
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-	/* init board */
-	rt_hw_board_init();
-
-	/* show version */
-	rt_show_version();
-
-	/* init tick */
-	rt_system_tick_init();
-
-	/* init kernel object */
-	rt_system_object_init();
-
-	/* init timer system */
-	rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-#if STM32_EXT_SRAM
-	rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
-#else
-	#ifdef __CC_ARM
-		rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
-	#elif __ICCARM__
-	    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
-	#else
-	/* init memory system */
-		rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
-	#endif
-#endif
-#endif
-
-	/* init scheduler system */
-	rt_system_scheduler_init();

-
-#if CODEC_VERSION == 1
-	wm8753_hw_init();
+

+#ifdef RT_USING_LWIP

+#include <netif/ethernetif.h>

+#include "dm9000.h"

+#endif

+

+/**

+ * @addtogroup STM32

+ */

+

+/*@{*/

+#ifdef __CC_ARM

+extern int Image$$RW_IRAM1$$ZI$$Limit;

+#elif __ICCARM__

+#pragma section="HEAP"

+#else

+extern int __bss_end;

+#endif

+

+#ifdef RT_USING_FINSH

+extern void finsh_system_init(void);

+extern void finsh_set_device(const char* device);

+#endif

+extern int rt_application_init(void);

+extern rt_err_t wm8753_hw_init(void);

+extern rt_err_t wm8978_hw_init(void);

+#ifdef  DEBUG

+/*******************************************************************************

+* Function Name  : assert_failed

+* Description    : Reports the name of the source file and the source line number

+*                  where the assert error has occurred.

+* Input          : - file: pointer to the source file name

+*                  - line: assert error line source number

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void assert_failed(u8* file, u32 line)

+{

+    rt_kprintf("\n\r Wrong parameter value detected on\r\n");

+    rt_kprintf("       file  %s\r\n", file);

+    rt_kprintf("       line  %d\r\n", line);

+

+    while (1) ;

+}

+#endif

+

+/**

+ * This function will startup RT-Thread RTOS.

+ */

+void rtthread_startup(void)

+{

+    /* init board */

+    rt_hw_board_init();

+

+    /* show version */

+    rt_show_version();

+

+    /* init tick */

+    rt_system_tick_init();

+

+    /* init kernel object */

+    rt_system_object_init();

+

+    /* init timer system */

+    rt_system_timer_init();

+

+#ifdef RT_USING_HEAP

+#if STM32_EXT_SRAM

+    rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);

+#else

+#ifdef __CC_ARM

+    rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);

+#elif __ICCARM__

+    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);

+#else

+    /* init memory system */

+    rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);

+#endif

+#endif

+#endif

+

+    /* init scheduler system */

+    rt_system_scheduler_init();

+

+#if CODEC_VERSION == 1

+    wm8753_hw_init();

 #elif CODEC_VERSION == 2

-	wm8978_hw_init();

+    wm8978_hw_init();

+#endif

+

+    /* init hardware serial device */

+    rt_hw_usart_init();

+#ifdef RT_USING_DFS

+    GPIO_ResetBits(GPIOC,GPIO_Pin_6);

+    rt_hw_sdcard_init();

+    rt_hw_spi_flash_init();

+#endif

+

+    /* init all device */

+    rt_device_init_all();

+

+    /* init application */

+    rt_application_init();

+

+#ifdef RT_USING_FINSH

+    /* init finsh */

+    finsh_system_init();

+    finsh_set_device("uart1");

 #endif

-
-	/* init hardware serial device */
-	rt_hw_usart_init();
-#ifdef RT_USING_DFS
-    GPIO_ResetBits(GPIOC,GPIO_Pin_6);
-	rt_hw_sdcard_init();
-#endif
-
-	/* init all device */
-	rt_device_init_all();
-
-	/* init application */
-	rt_application_init();
-
-#ifdef RT_USING_FINSH
-	/* init finsh */
-	finsh_system_init();
-	finsh_set_device("uart1");
-#endif
-
-	/* init idle thread */
-	rt_thread_idle_init();
-
-	/* start scheduler */
-	rt_system_scheduler_start();
-
-	/* never reach here */
-	return ;
-}
-
-int main(void)
-{
-	rt_uint32_t UNUSED level;
-	
-	/* disable interrupt first */
-	level = rt_hw_interrupt_disable();
-	rtthread_startup();
-	
-	return 0;
-}
-
-/*@}*/
+

+    /* init idle thread */

+    rt_thread_idle_init();

+

+    /* start scheduler */

+    rt_system_scheduler_start();

+

+    /* never reach here */

+    return ;

+}

+

+int main(void)

+{

+    rt_uint32_t UNUSED level;

+

+    /* disable interrupt first */

+    level = rt_hw_interrupt_disable();

+    rtthread_startup();

+

+    return 0;

+}

+

+/*@}*/