diff options
| author | [email protected] <[email protected]> | 2012-04-16 17:58:44 +0000 |
|---|---|---|
| committer | [email protected] <[email protected]> | 2012-04-16 17:58:44 +0000 |
| commit | c6604c756322e6bc41863a156def1f0bb2768313 (patch) | |
| tree | 14361236ca75f3c1971467e9bfbc68433f3e4103 /bsp | |
| parent | 74722177f325c82799ccdc105026404daf8d712d (diff) | |
Move driver files and update it SConscript
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2088 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'bsp')
| -rw-r--r-- | bsp/stm32f20x/Drivers/SConscript | 24 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/board.c | 286 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/board.h | 121 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/rtc.c | 343 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/rtc.h | 20 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/sdio_sd.c | 2774 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/sdio_sd.h | 397 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/serial.c | 418 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/serial.h | 70 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/stm32f2_eth.c | 581 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/stm32f2xx_conf.h | 88 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/stm32f2xx_it.c | 156 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/usart.c | 281 | ||||
| -rw-r--r-- | bsp/stm32f20x/Drivers/usart.h | 23 |
14 files changed, 5582 insertions, 0 deletions
diff --git a/bsp/stm32f20x/Drivers/SConscript b/bsp/stm32f20x/Drivers/SConscript new file mode 100644 index 0000000000..b9529222d0 --- /dev/null +++ b/bsp/stm32f20x/Drivers/SConscript @@ -0,0 +1,24 @@ +Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = os.path.join(str(Dir('#')), 'drivers')
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+# remove no need file.
+if GetDepend('RT_USING_LWIP') == False:
+ SrcRemove(src, 'stm32f2_eth.c')
+if GetDepend('RT_USING_DFS') == False:
+ SrcRemove(src, 'sdio_sd.c')
+
+#remove other no use files
+#SrcRemove(src, 'FM25Lx.c')
+#SrcRemove(src, '24LCxx.c')
+
+#MDK platform retarget. Not yet tested
+SrcRemove(src, 'stdio_Retarget.c')
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/stm32f20x/Drivers/board.c b/bsp/stm32f20x/Drivers/board.c new file mode 100644 index 0000000000..bb94e7449d --- /dev/null +++ b/bsp/stm32f20x/Drivers/board.c @@ -0,0 +1,286 @@ +/*
+ * File : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+/**
+ * @addtogroup STM32
+ */
+
+/*@{*/
+
+#if STM32_USE_SDIO
+
+
+/**
+ * @brief DeInitializes the SDIO interface.
+ * @param None
+ * @retval None
+ */
+void SD_LowLevel_DeInit(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /*!< Disable SDIO Clock */
+ SDIO_ClockCmd(DISABLE);
+
+ /*!< Set Power State to OFF */
+ SDIO_SetPowerState(SDIO_PowerState_OFF);
+
+ /*!< DeInitializes the SDIO peripheral */
+ SDIO_DeInit();
+
+ /* Disable the SDIO APB2 Clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE);
+
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_MCO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_MCO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_MCO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_MCO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_MCO);
+ GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_MCO);
+
+ /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ /* Configure PD.02 CMD line */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ /* Configure PC.12 pin: CLK pin */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+}
+
+/**
+ * @brief Initializes the SD Card and put it into StandBy State (Ready for
+ * data transfer).
+ * @param None
+ * @retval None
+ */
+void SD_LowLevel_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /* GPIOC and GPIOD Periph clock enable */
+ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | SD_DETECT_GPIO_CLK, ENABLE);
+
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_SDIO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_SDIO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_SDIO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_SDIO);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_SDIO);
+ GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_SDIO);
+
+ /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ /* Configure PD.02 CMD line */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ /* Configure PC.12 pin: CLK pin */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
+ GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
+ GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure);
+
+ /* Enable the SDIO APB2 Clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE);
+
+ /* Enable the DMA2 Clock */
+ RCC_AHB1PeriphClockCmd(SD_SDIO_DMA_CLK, ENABLE);
+}
+
+/**
+ * @brief Configures the DMA2 Channel4 for SDIO Tx request.
+ * @param BufferSRC: pointer to the source buffer
+ * @param BufferSize: buffer size
+ * @retval None
+ */
+void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize)
+{
+ DMA_InitTypeDef SDDMA_InitStructure;
+
+ DMA_ClearFlag(SD_SDIO_DMA_STREAM, SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF | SD_SDIO_DMA_FLAG_TCIF);
+
+ /* DMA2 Stream3 or Stream6 disable */
+ DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
+
+ /* DMA2 Stream3 or Stream6 Config */
+ DMA_DeInit(SD_SDIO_DMA_STREAM);
+
+ SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
+ SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS;
+ SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferSRC;
+ SDDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
+ SDDMA_InitStructure.DMA_BufferSize = 0;
+ SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+ SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+ SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+ SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+ SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
+ SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
+ SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
+ SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
+ DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
+
+ DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral);
+
+ /* DMA2 Stream3 or Stream6 enable */
+ DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
+
+}
+
+/**
+ * @brief Configures the DMA2 Channel4 for SDIO Rx request.
+ * @param BufferDST: pointer to the destination buffer
+ * @param BufferSize: buffer size
+ * @retval None
+ */
+void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize)
+{
+ DMA_InitTypeDef SDDMA_InitStructure;
+
+ DMA_ClearFlag(SD_SDIO_DMA_STREAM, SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF | SD_SDIO_DMA_FLAG_TCIF);
+
+ /* DMA2 Stream3 or Stream6 disable */
+ DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
+
+ /* DMA2 Stream3 or Stream6 Config */
+ DMA_DeInit(SD_SDIO_DMA_STREAM);
+
+ SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
+ SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS;
+ SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferDST;
+ SDDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
+ SDDMA_InitStructure.DMA_BufferSize = 0;
+ SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+ SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+ SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+ SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+ SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
+ SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
+ SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
+ SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
+ DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
+
+ DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral);
+
+ /* DMA2 Stream3 or Stream6 enable */
+ DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
+}
+
+/**
+ * @brief Returns the DMA End Of Transfer Status.
+ * @param None
+ * @retval DMA SDIO Stream Status.
+ */
+uint32_t SD_DMAEndOfTransferStatus(void)
+{
+ return (uint32_t)DMA_GetFlagStatus(SD_SDIO_DMA_STREAM, SD_SDIO_DMA_FLAG_TCIF);
+}
+#endif
+
+/*******************************************************************************
+* Function Name : NVIC_Configuration
+* Description : Configures Vector Table base location.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void NVIC_Configuration(void)
+{
+#ifdef VECT_TAB_RAM
+ /* Set the Vector Table base location at 0x20000000 */
+ NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
+#else /* VECT_TAB_FLASH */
+ /* Set the Vector Table base location at 0x08000000 */
+ NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
+#endif
+}
+
+/*******************************************************************************
+ * Function Name : SysTick_Configuration
+ * Description : Configures the SysTick for OS tick.
+ * Input : None
+ * Output : None
+ * Return : None
+ *******************************************************************************/
+void SysTick_Configuration(void)
+{
+ RCC_ClocksTypeDef rcc_clocks;
+ rt_uint32_t cnts;
+
+ RCC_GetClocksFreq(&rcc_clocks);
+
+ cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
+
+ SysTick_Config(cnts);
+ SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
+}
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ rt_tick_increase();
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+
+/**
+ * This function will initial STM32 board.
+ */
+void rt_hw_board_init()
+{
+ /* NVIC Configuration */
+ NVIC_Configuration();
+
+ /* Configure the SysTick */
+ SysTick_Configuration();
+
+ rt_hw_usart_init();
+#ifdef RT_USING_CONSOLE
+ rt_console_set_device(CONSOLE_DEVICE);
+#endif
+}
+
+/*@}*/
diff --git a/bsp/stm32f20x/Drivers/board.h b/bsp/stm32f20x/Drivers/board.h new file mode 100644 index 0000000000..73bc066dda --- /dev/null +++ b/bsp/stm32f20x/Drivers/board.h @@ -0,0 +1,121 @@ +/*
+ * File : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-09-22 Bernard add board.h to this bsp
+ */
+
+// <<< Use Configuration Wizard in Context Menu >>>
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <stm32f2xx.h>
+
+/* board configuration */
+// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
+// <i>Default: 1
+#define STM32_USE_SDIO 1
+
+/* whether use board external SRAM memory */
+// <e>Use external SRAM memory on the board
+// <i>Enable External SRAM memory
+#define STM32_EXT_SRAM 0
+// <o>Begin Address of External SRAM
+// <i>Default: 0x68000000
+#define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */
+// <o>End Address of External SRAM
+// <i>Default: 0x68080000
+#define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */
+// </e>
+
+// <o> Internal SRAM memory size[Kbytes] <8-128>
+// <i>Default: 64
+#define STM32_SRAM_SIZE 128
+#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
+
+// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
+// <i>Default: 1
+#define STM32_CONSOLE_USART 1
+
+// <o> Ethernet Interface: <0=> Microchip ENC28J60
+#define STM32_ETH_IF 0
+
+void rt_hw_board_led_on(int n);
+void rt_hw_board_led_off(int n);
+void rt_hw_board_init(void);
+
+#if STM32_CONSOLE_USART == 0
+#define CONSOLE_DEVICE "no"
+#elif STM32_CONSOLE_USART == 1
+#define CONSOLE_DEVICE "uart1"
+#elif STM32_CONSOLE_USART == 2
+#define CONSOLE_DEVICE "uart2"
+#elif STM32_CONSOLE_USART == 3
+#define CONSOLE_DEVICE "uart3"
+#endif
+
+#if STM32_USE_SDIO
+/**
+ * @brief SD FLASH SDIO Interface
+ */
+#define SD_DETECT_PIN GPIO_Pin_0 /* PB.0 */
+#define SD_DETECT_GPIO_PORT GPIOB /* GPIOB */
+#define SD_DETECT_GPIO_CLK RCC_AHB1Periph_GPIOB
+
+#define SDIO_FIFO_ADDRESS ((uint32_t)0x40012C80)
+/**
+ * @brief SDIO Intialization Frequency (400KHz max)
+ */
+#define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
+/**
+ * @brief SDIO Data Transfer Frequency (25MHz max)
+ */
+#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
+
+#define SD_SDIO_DMA DMA2
+#define SD_SDIO_DMA_CLK RCC_AHB1Periph_DMA2
+
+#define SD_SDIO_DMA_STREAM3 3
+//#define SD_SDIO_DMA_STREAM6 6
+
+#ifdef SD_SDIO_DMA_STREAM3
+ #define SD_SDIO_DMA_STREAM DMA2_Stream3
+ #define SD_SDIO_DMA_CHANNEL DMA_Channel_4
+ #define SD_SDIO_DMA_FLAG_FEIF DMA_FLAG_FEIF3
+ #define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF3
+ #define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF3
+ #define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF3
+ #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF3
+#elif defined SD_SDIO_DMA_STREAM6
+ #define SD_SDIO_DMA_STREAM DMA2_Stream6
+ #define SD_SDIO_DMA_CHANNEL DMA_Channel_4
+ #define SD_SDIO_DMA_FLAG_FEIF DMA_FLAG_FEIF6
+ #define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF6
+ #define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF6
+ #define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF6
+ #define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF6
+#endif /* SD_SDIO_DMA_STREAM3 */
+
+void SD_LowLevel_DeInit(void);
+void SD_LowLevel_Init(void);
+void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize);
+void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize);
+
+#endif
+void rt_hw_usart_init(void);
+
+/* SD Card init function */
+void rt_hw_msd_init(void);
+
+/* ETH interface init function */
+
+#endif
+
+// <<< Use Configuration Wizard in Context Menu >>>
diff --git a/bsp/stm32f20x/Drivers/rtc.c b/bsp/stm32f20x/Drivers/rtc.c new file mode 100644 index 0000000000..1604ee4497 --- /dev/null +++ b/bsp/stm32f20x/Drivers/rtc.c @@ -0,0 +1,343 @@ +/*
+ * File : rtc.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard the first version
+ * 2011-11-26 aozima implementation time.
+ */
+
+#include <rtthread.h>
+#include <stm32f2xx.h>
+#include <time.h>
+
+__IO uint32_t AsynchPrediv = 0, SynchPrediv = 0;
+RTC_TimeTypeDef RTC_TimeStructure;
+RTC_InitTypeDef RTC_InitStructure;
+RTC_AlarmTypeDef RTC_AlarmStructure;
+RTC_DateTypeDef RTC_DateStructure;
+
+#define MINUTE 60
+#define HOUR (60*MINUTE)
+#define DAY (24*HOUR)
+#define YEAR (365*DAY)
+
+static int month[12] =
+{
+ 0,
+ DAY*(31),
+ DAY*(31+29),
+ DAY*(31+29+31),
+ DAY*(31+29+31+30),
+ DAY*(31+29+31+30+31),
+ DAY*(31+29+31+30+31+30),
+ DAY*(31+29+31+30+31+30+31),
+ DAY*(31+29+31+30+31+30+31+31),
+ DAY*(31+29+31+30+31+30+31+31+30),
+ DAY*(31+29+31+30+31+30+31+31+30+31),
+ DAY*(31+29+31+30+31+30+31+31+30+31+30)
+};
+static struct rt_device rtc;
+
+static time_t rt_mktime(struct tm *tm) +{ + long res;
+ int year;
+ year = tm->tm_year - 70;
+
+ res = YEAR * year + DAY * ((year + 1) / 4);
+ res += month[tm->tm_mon];
+
+ if (tm->tm_mon > 1 && ((year + 2) % 4))
+ res -= DAY;
+ res += DAY * (tm->tm_mday - 1);
+ res += HOUR * tm->tm_hour;
+ res += MINUTE * tm->tm_min;
+ res += tm->tm_sec;
+ return res; +}
+static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ if (dev->rx_indicate != RT_NULL)
+ {
+ /* Open Interrupt */
+ }
+
+ return RT_EOK;
+}
+
+static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ return 0;
+}
+
+static rt_err_t rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+ time_t *time;
+ struct tm ti,*to;
+ RT_ASSERT(dev != RT_NULL);
+
+ switch (cmd)
+ {
+ case RT_DEVICE_CTRL_RTC_GET_TIME:
+ time = (time_t *)args;
+ /* read device */
+ //RTC_GetTimeStamp(RTC_Format_BIN, &RTC_TimeStructure, &RTC_DateStructure);
+ RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure);
+ RTC_GetDate(RTC_Format_BIN, &RTC_DateStructure);
+ ti.tm_sec = RTC_TimeStructure.RTC_Seconds;
+ ti.tm_min = RTC_TimeStructure.RTC_Minutes;
+ ti.tm_hour = RTC_TimeStructure.RTC_Hours;
+ //ti.tm_wday = (RTC_DateStructure.RTC_WeekDay==7)?0:RTC_DateStructure.RTC_WeekDay;
+ ti.tm_mon = RTC_DateStructure.RTC_Month -1;
+ ti.tm_mday = RTC_DateStructure.RTC_Date;
+ ti.tm_year = RTC_DateStructure.RTC_Year + 70;
+ *time = rt_mktime(&ti);
+ //*time = RTC_GetCounter();
+
+ break;
+
+ case RT_DEVICE_CTRL_RTC_SET_TIME:
+ {
+ time = (time_t *)args;
+
+ /* Enable the PWR clock */
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+
+ /* Allow access to RTC */
+ PWR_BackupAccessCmd(ENABLE);
+
+ /* Wait until last write operation on RTC registers has finished */
+ //RTC_WaitForLastTask();
+
+ /* Change the current time */
+ //RTC_SetCounter(*time);
+
+ to = localtime(time);
+ RTC_TimeStructure.RTC_Seconds = to->tm_sec;
+ RTC_TimeStructure.RTC_Minutes = to->tm_min;
+ RTC_TimeStructure.RTC_Hours = to->tm_hour;
+ //RTC_DateStructure.RTC_WeekDay =(ti->tm_wday==0)?7:ti->tm_wday;
+ RTC_DateStructure.RTC_Month = to->tm_mon + 1;
+ RTC_DateStructure.RTC_Date = to->tm_mday;
+ RTC_DateStructure.RTC_Year = to->tm_year - 70;
+ RTC_SetTime(RTC_Format_BIN, &RTC_TimeStructure);
+ RTC_SetDate(RTC_Format_BIN, &RTC_DateStructure);
+
+ /* Wait until last write operation on RTC registers has finished */
+ //RTC_WaitForLastTask();
+
+ RTC_WriteBackupRegister(RTC_BKP_DR1, 0xA5A5);
+ //BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
+ }
+ break;
+ }
+
+ return RT_EOK;
+}
+
+/*******************************************************************************
+* Function Name : RTC_Configuration
+* Description : Configures the RTC.
+* Input : None
+* Output : None
+* Return : 0 reday,-1 error.
+*******************************************************************************/
+int RTC_Config(void)
+{
+ u32 count=0x200000;
+ /* Enable the PWR clock */
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+
+ /* Allow access to RTC */
+ PWR_BackupAccessCmd(ENABLE);
+
+ RCC_LSEConfig(RCC_LSE_ON);
+
+ /* Wait till LSE is ready */
+ while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
+ if ( count == 0 )
+ {
+ return -1;
+ }
+
+ /* Select the RTC Clock Source */
+ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
+
+ SynchPrediv = 0xFF;
+ AsynchPrediv = 0x7F;
+
+ /* Enable the RTC Clock */
+ RCC_RTCCLKCmd(ENABLE);
+
+ /* Wait for RTC APB registers synchronisation */
+ RTC_WaitForSynchro();
+
+ /* Enable The TimeStamp */
+ //RTC_TimeStampCmd(RTC_TimeStampEdge_Falling, ENABLE);
+
+ return 0;
+}
+
+int RTC_Configuration(void)
+{
+
+ if(RTC_Config() < 0 )
+ return -1;
+
+ /* Set the Time */
+ RTC_TimeStructure.RTC_Hours = 0;
+ RTC_TimeStructure.RTC_Minutes = 0;
+ RTC_TimeStructure.RTC_Seconds = 0;
+
+ /* Set the Date */
+ RTC_DateStructure.RTC_Month = 1;
+ RTC_DateStructure.RTC_Date = 1;
+ RTC_DateStructure.RTC_Year = 0;
+ RTC_DateStructure.RTC_WeekDay = 4;
+
+ /* Calendar Configuration */
+ RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
+ RTC_InitStructure.RTC_SynchPrediv = SynchPrediv;
+ RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
+ RTC_Init(&RTC_InitStructure);
+
+ /* Set Current Time and Date */
+ RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
+ RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure);
+ if (RTC_Init(&RTC_InitStructure) == ERROR)
+ return -1;
+
+ return 0;
+}
+
+void rt_hw_rtc_init(void)
+{
+ rtc.type = RT_Device_Class_RTC;
+
+ if (RTC_ReadBackupRegister(RTC_BKP_DR1) != 0xA5A5)
+ {
+ rt_kprintf("rtc is not configured\n");
+ rt_kprintf("please configure with set_date and set_time\n");
+ if ( RTC_Configuration() != 0)
+ {
+ rt_kprintf("rtc configure fail...\r\n");
+ return ;
+ }
+ }
+ else
+ {
+ /* Wait for RTC registers synchronization */
+ RTC_WaitForSynchro();
+ }
+
+ /* register rtc device */
+ rtc.init = RT_NULL;
+ rtc.open = rt_rtc_open;
+ rtc.close = RT_NULL;
+ rtc.read = rt_rtc_read;
+ rtc.write = RT_NULL;
+ rtc.control = rt_rtc_control;
+
+ /* no private */
+ rtc.user_data = RT_NULL;
+
+ rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
+
+ return;
+}
+
+#include <time.h>
+#if defined (__IAR_SYSTEMS_ICC__) && (__VER__) >= 6020000 /* for IAR 6.2 later Compiler */
+#pragma module_name = "?time"
+time_t (__time32)(time_t *t) /* Only supports 32-bit timestamp */
+#else
+time_t time(time_t* t)
+#endif
+{
+ rt_device_t device;
+ time_t time=0;
+
+ device = rt_device_find("rtc");
+ if (device != RT_NULL)
+ {
+ rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time);
+ if (t != RT_NULL) *t = time;
+ }
+
+ return time;
+}
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+
+void set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day)
+{
+ time_t now;
+ struct tm* ti;
+ rt_device_t device;
+
+ ti = RT_NULL;
+ /* get current time */
+ time(&now);
+
+ ti = localtime(&now);
+ if (ti != RT_NULL)
+ {
+ ti->tm_year = year - 1900;
+ ti->tm_mon = month - 1; /* ti->tm_mon = month; */
+ ti->tm_mday = day;
+ }
+
+ now = mktime(ti);
+
+ device = rt_device_find("rtc");
+ if (device != RT_NULL)
+ {
+ rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
+ }
+}
+FINSH_FUNCTION_EXPORT(set_date, set date. e.g: set_date(2010,2,28))
+
+void set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second)
+{
+ time_t now;
+ struct tm* ti;
+ rt_device_t device;
+
+ ti = RT_NULL;
+ /* get current time */
+ time(&now);
+
+ ti = localtime(&now);
+ if (ti != RT_NULL)
+ {
+ ti->tm_hour = hour;
+ ti->tm_min = minute;
+ ti->tm_sec = second;
+ }
+
+ now = mktime(ti);
+ device = rt_device_find("rtc");
+ if (device != RT_NULL)
+ {
+ rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
+ }
+}
+FINSH_FUNCTION_EXPORT(set_time, set time. e.g: set_time(23,59,59))
+
+void list_date()
+{
+ time_t now;
+
+ time(&now);
+ rt_kprintf("%s\n", ctime(&now));
+}
+FINSH_FUNCTION_EXPORT(list_date, show date and time.)
+#endif
diff --git a/bsp/stm32f20x/Drivers/rtc.h b/bsp/stm32f20x/Drivers/rtc.h new file mode 100644 index 0000000000..a100737d7e --- /dev/null +++ b/bsp/stm32f20x/Drivers/rtc.h @@ -0,0 +1,20 @@ +/*
+ * File : rtc.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard the first version
+ */
+
+#ifndef __RTC_H__
+#define __RTC_H__
+
+void rt_hw_rtc_init(void);
+
+#endif
diff --git a/bsp/stm32f20x/Drivers/sdio_sd.c b/bsp/stm32f20x/Drivers/sdio_sd.c new file mode 100644 index 0000000000..174c41c279 --- /dev/null +++ b/bsp/stm32f20x/Drivers/sdio_sd.c @@ -0,0 +1,2774 @@ +/**
+ ******************************************************************************
+ * @file stm32_eval_sdio_sd.c
+ * @author MCD Application Team
+ * @version V4.6.1
+ * @date 18-April-2011
+ * @brief This file provides a set of functions needed to manage the SDIO SD
+ * Card memory mounted on STM32xx-EVAL board (refer to stm32_eval.h
+ * to know about the boards supporting this memory).
+ *
+ *
+ * @verbatim
+ *
+ * ===================================================================
+ * How to use this driver
+ * ===================================================================
+ * It implements a high level communication layer for read and write
+ * from/to this memory. The needed STM32 hardware resources (SDIO and
+ * GPIO) are defined in stm32xx_eval.h file, and the initialization is
+ * performed in SD_LowLevel_Init() function declared in stm32xx_eval.c
+ * file.
+ * You can easily tailor this driver to any other development board,
+ * by just adapting the defines for hardware resources and
+ * SD_LowLevel_Init() function.
+ *
+ * A - SD Card Initialization and configuration
+ * ============================================
+ * - To initialize the SD Card, use the SD_Init() function. It
+ * Initializes the SD Card and put it into StandBy State (Ready
+ * for data transfer). This function provide the following operations:
+ *
+ * 1 - Apply the SD Card initialization process at 400KHz and check
+ * the SD Card type (Standard Capacity or High Capacity). You
+ * can change or adapt this frequency by adjusting the
+ * "SDIO_INIT_CLK_DIV" define inside the stm32xx_eval.h file.
+ * The SD Card frequency (SDIO_CK) is computed as follows:
+ *
+ * +---------------------------------------------+
+ * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) |
+ * +---------------------------------------------+
+ *
+ * In initialization mode and according to the SD Card standard,
+ * make sure that the SDIO_CK frequency don't exceed 400KHz.
+ *
+ * 2 - Get the SD CID and CSD data. All these information are
+ * managed by the SDCardInfo structure. This structure provide
+ * also ready computed SD Card capacity and Block size.
+ *
+ * 3 - Configure the SD Card Data transfer frequency. By Default,
+ * the card transfer frequency is set to 24MHz. You can change
+ * or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV"
+ * define inside the stm32xx_eval.h file.
+ * The SD Card frequency (SDIO_CK) is computed as follows:
+ *
+ * +---------------------------------------------+
+ * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) |
+ * +---------------------------------------------+
+ *
+ * In transfer mode and according to the SD Card standard,
+ * make sure that the SDIO_CK frequency don't exceed 25MHz
+ * and 50MHz in High-speed mode switch.
+ * To be able to use a frequency higher than 24MHz, you should
+ * use the SDIO peripheral in bypass mode. Refer to the
+ * corresponding reference manual for more details.
+ *
+ * 4 - Select the corresponding SD Card according to the address
+ * read with the step 2.
+ *
+ * 5 - Configure the SD Card in wide bus mode: 4-bits data.
+ *
+ * B - SD Card Read operation
+ * ==========================
+ * - You can read SD card by using two function: SD_ReadBlock() and
+ * SD_ReadMultiBlocks() functions. These functions support only
+ * 512-byte block length.
+ * - The SD_ReadBlock() function read only one block (512-byte). This
+ * function can transfer the data using DMA controller or using
+ * polling mode. To select between DMA or polling mode refer to
+ * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h
+ * file and uncomment the corresponding line. By default the SD DMA
+ * mode is selected
+ * - The SD_ReadMultiBlocks() function read only mutli blocks (multiple
+ * of 512-byte).
+ * - Any read operation should be followed by two functions to check
+ * if the DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ *
+ * - The DMA transfer is finished by the SDIO Data End interrupt. User
+ * has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler().
+ * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.
+ *
+ * C - SD Card Write operation
+ * ===========================
+ * - You can write SD card by using two function: SD_WriteBlock() and
+ * SD_WriteMultiBlocks() functions. These functions support only
+ * 512-byte block length.
+ * - The SD_WriteBlock() function write only one block (512-byte). This
+ * function can transfer the data using DMA controller or using
+ * polling mode. To select between DMA or polling mode refer to
+ * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32_eval_sdio_sd.h
+ * file and uncomment the corresponding line. By default the SD DMA
+ * mode is selected
+ * - The SD_WriteMultiBlocks() function write only mutli blocks (multiple
+ * of 512-byte).
+ * - Any write operation should be followed by two functions to check
+ * if the DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ *
+ * - The DMA transfer is finished by the SDIO Data End interrupt. User
+ * has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler().
+ * Don't forget to enable the SDIO_IRQn interrupt using the NVIC controller.
+
+ *
+ * D - SD card status
+ * ==================
+ * - At any time, you can check the SD Card status and get the SD card
+ * state by using the SD_GetStatus() function. This function checks
+ * first if the SD card is still connected and then get the internal
+ * SD Card transfer state.
+ * - You can also get the SD card SD Status register by using the
+ * SD_SendSDStatus() function.
+ *
+ * E - Programming Model
+ * =====================
+ * Status = SD_Init(); // Initialization Step as described in section A
+ *
+ * // SDIO Interrupt ENABLE
+ * NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+ * NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ * NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ * NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ * NVIC_Init(&NVIC_InitStructure);
+ *
+ * // Write operation as described in Section C
+ * Status = SD_WriteBlock(buffer, address, 512);
+ * Status = SD_WaitWriteOperation();
+ * while(SD_GetStatus() != SD_TRANSFER_OK);
+ *
+ * Status = SD_WriteMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS);
+ * Status = SD_WaitWriteOperation();
+ * while(SD_GetStatus() != SD_TRANSFER_OK);
+ *
+ * // Read operation as described in Section B
+ * Status = SD_ReadBlock(buffer, address, 512);
+ * Status = SD_WaitReadOperation();
+ * while(SD_GetStatus() != SD_TRANSFER_OK);
+ *
+ * Status = SD_ReadMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS);
+ * Status = SD_WaitReadOperation();
+ * while(SD_GetStatus() != SD_TRANSFER_OK);
+ *
+ *
+ * STM32 SDIO Pin assignment
+ * =========================
+ * +-----------------------------------------------------------+
+ * | Pin assignment |
+ * +-----------------------------+---------------+-------------+
+ * | STM32 SDIO Pins | SD | Pin |
+ * +-----------------------------+---------------+-------------+
+ * | SDIO D2 | D2 | 1 |
+ * | SDIO D3 | D3 | 2 |
+ * | SDIO CMD | CMD | 3 |
+ * | | VCC | 4 (3.3 V)|
+ * | SDIO CLK | CLK | 5 |
+ * | | GND | 6 (0 V) |
+ * | SDIO D0 | D0 | 7 |
+ * | SDIO D1 | D1 | 8 |
+ * +-----------------------------+---------------+-------------+
+ *
+ * @endverbatim
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "sdio_sd.h"
+
+/** @addtogroup Utilities
+ * @{
+ */
+
+/** @addtogroup STM32_EVAL
+ * @{
+ */
+
+/** @addtogroup Common
+ * @{
+ */
+
+/** @addtogroup STM32_EVAL_SDIO_SD
+ * @brief This file provides all the SD Card driver firmware functions.
+ * @{
+ */
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Defines
+ * @{
+ */
+/**
+ * @brief SDIO Static flags, TimeOut, FIFO Address
+ */
+#define NULL 0
+#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF)
+#define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000)
+
+/**
+ * @brief Mask for errors Card Status R1 (OCR Register)
+ */
+#define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000)
+#define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000)
+#define SD_OCR_BLOCK_LEN_ERR ((uint32_t)0x20000000)
+#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000)
+#define SD_OCR_BAD_ERASE_PARAM ((uint32_t)0x08000000)
+#define SD_OCR_WRITE_PROT_VIOLATION ((uint32_t)0x04000000)
+#define SD_OCR_LOCK_UNLOCK_FAILED ((uint32_t)0x01000000)
+#define SD_OCR_COM_CRC_FAILED ((uint32_t)0x00800000)
+#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000)
+#define SD_OCR_CARD_ECC_FAILED ((uint32_t)0x00200000)
+#define SD_OCR_CC_ERROR ((uint32_t)0x00100000)
+#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000)
+#define SD_OCR_STREAM_READ_UNDERRUN ((uint32_t)0x00040000)
+#define SD_OCR_STREAM_WRITE_OVERRUN ((uint32_t)0x00020000)
+#define SD_OCR_CID_CSD_OVERWRIETE ((uint32_t)0x00010000)
+#define SD_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000)
+#define SD_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000)
+#define SD_OCR_ERASE_RESET ((uint32_t)0x00002000)
+#define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008)
+#define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008)
+
+/**
+ * @brief Masks for R6 Response
+ */
+#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000)
+#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000)
+#define SD_R6_COM_CRC_FAILED ((uint32_t)0x00008000)
+
+#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000)
+#define SD_HIGH_CAPACITY ((uint32_t)0x40000000)
+#define SD_STD_CAPACITY ((uint32_t)0x00000000)
+#define SD_CHECK_PATTERN ((uint32_t)0x000001AA)
+
+#define SD_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFF)
+#define SD_ALLZERO ((uint32_t)0x00000000)
+
+#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000)
+#define SD_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000)
+#define SD_CARD_LOCKED ((uint32_t)0x02000000)
+
+#define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF)
+#define SD_0TO7BITS ((uint32_t)0x000000FF)
+#define SD_8TO15BITS ((uint32_t)0x0000FF00)
+#define SD_16TO23BITS ((uint32_t)0x00FF0000)
+#define SD_24TO31BITS ((uint32_t)0xFF000000)
+#define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF)
+
+#define SD_HALFFIFO ((uint32_t)0x00000008)
+#define SD_HALFFIFOBYTES ((uint32_t)0x00000020)
+
+/**
+ * @brief Command Class Supported
+ */
+#define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080)
+#define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040)
+#define SD_CCCC_ERASE ((uint32_t)0x00000020)
+
+/**
+ * @brief Following commands are SD Card Specific commands.
+ * SDIO_APP_CMD should be sent before sending these commands.
+ */
+#define SDIO_SEND_IF_COND ((uint32_t)0x00000008)
+
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Variables
+ * @{
+ */
+static uint32_t CardType = SDIO_STD_CAPACITY_SD_CARD_V1_1;
+static uint32_t CSD_Tab[4], CID_Tab[4], RCA = 0;
+static uint8_t SDSTATUS_Tab[16];
+__IO uint32_t StopCondition = 0;
+__IO SD_Error TransferError = SD_OK;
+__IO uint32_t TransferEnd = 0;
+SD_CardInfo SDCardInfo;
+
+SDIO_InitTypeDef SDIO_InitStructure;
+SDIO_CmdInitTypeDef SDIO_CmdInitStructure;
+SDIO_DataInitTypeDef SDIO_DataInitStructure;
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Function_Prototypes
+ * @{
+ */
+static SD_Error CmdError(void);
+static SD_Error CmdResp1Error(uint8_t cmd);
+static SD_Error CmdResp7Error(void);
+static SD_Error CmdResp3Error(void);
+static SD_Error CmdResp2Error(void);
+static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca);
+static SD_Error SDEnWideBus(FunctionalState NewState);
+static SD_Error IsCardProgramming(uint8_t *pstatus);
+static SD_Error FindSCR(uint16_t rca, uint32_t *pscr);
+uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes);
+
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32_EVAL_SDIO_SD_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief DeInitializes the SDIO interface.
+ * @param None
+ * @retval None
+ */
+void SD_DeInit(void)
+{
+ SD_LowLevel_DeInit();
+}
+
+/**
+ * @brief Initializes the SD Card and put it into StandBy State (Ready for data
+ * transfer).
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_Init(void)
+{
+ __IO SD_Error errorstatus = SD_OK;
+
+ /* SDIO Peripheral Low Level Init */
+ SD_LowLevel_Init();
+
+ SDIO_DeInit();
+
+ errorstatus = SD_PowerON();
+
+ if (errorstatus != SD_OK)
+ {
+ /*!< CMD Response TimeOut (wait for CMDSENT flag) */
+ return(errorstatus);
+ }
+
+ errorstatus = SD_InitializeCards();
+
+ if (errorstatus != SD_OK)
+ {
+ /*!< CMD Response TimeOut (wait for CMDSENT flag) */
+ return(errorstatus);
+ }
+
+ /*!< Configure the SDIO peripheral */
+ /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_TRANSFER_CLK_DIV) */
+ /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */
+ SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
+ SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
+ SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
+ SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
+ SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b;
+ SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
+ SDIO_Init(&SDIO_InitStructure);
+
+ /*----------------- Read CSD/CID MSD registers ------------------*/
+ errorstatus = SD_GetCardInfo(&SDCardInfo);
+
+ if (errorstatus == SD_OK)
+ {
+ /*----------------- Select Card --------------------------------*/
+ errorstatus = SD_SelectDeselect((uint32_t) (SDCardInfo.RCA << 16));
+ }
+
+ if (errorstatus == SD_OK)
+ {
+ errorstatus = SD_EnableWideBusOperation(SDIO_BusWide_4b);
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Gets the cuurent sd card data transfer status.
+ * @param None
+ * @retval SDTransferState: Data Transfer state.
+ * This value can be:
+ * - SD_TRANSFER_OK: No data transfer is acting
+ * - SD_TRANSFER_BUSY: Data transfer is acting
+ */
+SDTransferState SD_GetStatus(void)
+{
+ SDCardState cardstate = SD_CARD_TRANSFER;
+
+ cardstate = SD_GetState();
+
+ if (cardstate == SD_CARD_TRANSFER)
+ {
+ return(SD_TRANSFER_OK);
+ }
+ else if(cardstate == SD_CARD_ERROR)
+ {
+ return (SD_TRANSFER_ERROR);
+ }
+ else
+ {
+ return(SD_TRANSFER_BUSY);
+ }
+}
+
+/**
+ * @brief Returns the current card's state.
+ * @param None
+ * @retval SDCardState: SD Card Error or SD Card Current State.
+ */
+SDCardState SD_GetState(void)
+{
+ uint32_t resp1 = 0;
+
+ if(SD_Detect()== SD_PRESENT)
+ {
+ if (SD_SendStatus(&resp1) != SD_OK)
+ {
+ return SD_CARD_ERROR;
+ }
+ else
+ {
+ return (SDCardState)((resp1 >> 9) & 0x0F);
+ }
+ }
+ else
+ {
+ return SD_CARD_ERROR;
+ }
+}
+
+/**
+ * @brief Detect if SD card is correctly plugged in the memory slot.
+ * @param None
+ * @retval Return if SD is detected or not
+ */
+uint8_t SD_Detect(void)
+{
+ __IO uint8_t status = SD_PRESENT;
+
+ /*!< Check GPIO to detect SD */
+ /*if (GPIO_ReadInputDataBit(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) != Bit_RESET)
+ {
+ status = SD_NOT_PRESENT;
+ } */
+ return status;
+}
+
+/**
+ * @brief Enquires cards about their operating voltage and configures
+ * clock controls.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_PowerON(void)
+{
+ __IO SD_Error errorstatus = SD_OK;
+ uint32_t response = 0, count = 0, validvoltage = 0;
+ uint32_t SDType = SD_STD_CAPACITY;
+
+ /*!< Power ON Sequence -----------------------------------------------------*/
+ /*!< Configure the SDIO peripheral */
+ /*!< SDIOCLK = HCLK, SDIO_CK = HCLK/(2 + SDIO_INIT_CLK_DIV) */
+ /*!< on STM32F2xx devices, SDIOCLK is fixed to 48MHz */
+ /*!< SDIO_CK for initialization should not exceed 400 KHz */
+ SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV;
+ SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
+ SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
+ SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
+ SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b;
+ SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
+ SDIO_Init(&SDIO_InitStructure);
+
+ /*!< Set Power State to ON */
+ SDIO_SetPowerState(SDIO_PowerState_ON);
+
+ /*!< Enable SDIO Clock */
+ SDIO_ClockCmd(ENABLE);
+
+ /*!< CMD0: GO_IDLE_STATE ---------------------------------------------------*/
+ /*!< No CMD response required */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x0;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_GO_IDLE_STATE;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdError();
+
+ if (errorstatus != SD_OK)
+ {
+ /*!< CMD Response TimeOut (wait for CMDSENT flag) */
+ return(errorstatus);
+ }
+
+ /*!< CMD8: SEND_IF_COND ----------------------------------------------------*/
+ /*!< Send CMD8 to verify SD card interface operating condition */
+ /*!< Argument: - [31:12]: Reserved (shall be set to '0')
+ - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
+ - [7:0]: Check Pattern (recommended 0xAA) */
+ /*!< CMD Response: R7 */
+ SDIO_CmdInitStructure.SDIO_Argument = SD_CHECK_PATTERN;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_IF_COND;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp7Error();
+
+ if (errorstatus == SD_OK)
+ {
+ CardType = SDIO_STD_CAPACITY_SD_CARD_V2_0; /*!< SD Card 2.0 */
+ SDType = SD_HIGH_CAPACITY;
+ }
+ else
+ {
+ /*!< CMD55 */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x00;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+ }
+ /*!< CMD55 */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x00;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ /*!< If errorstatus is Command TimeOut, it is a MMC card */
+ /*!< If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch)
+ or SD card 1.x */
+ if (errorstatus == SD_OK)
+ {
+ /*!< SD CARD */
+ /*!< Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */
+ while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL))
+ {
+
+ /*!< SEND CMD55 APP_CMD with RCA as 0 */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x00;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+ SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_SD | SDType;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_OP_COND;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp3Error();
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ response = SDIO_GetResponse(SDIO_RESP1);
+ validvoltage = (((response >> 31) == 1) ? 1 : 0);
+ count++;
+ }
+ if (count >= SD_MAX_VOLT_TRIAL)
+ {
+ errorstatus = SD_INVALID_VOLTRANGE;
+ return(errorstatus);
+ }
+
+ if (response &= SD_HIGH_CAPACITY)
+ {
+ CardType = SDIO_HIGH_CAPACITY_SD_CARD;
+ }
+
+ }/*!< else MMC Card */
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Turns the SDIO output signals off.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_PowerOFF(void)
+{
+ SD_Error errorstatus = SD_OK;
+
+ /*!< Set Power State to OFF */
+ SDIO_SetPowerState(SDIO_PowerState_OFF);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Intialises all cards or single card as the case may be Card(s) come
+ * into standby state.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_InitializeCards(void)
+{
+ SD_Error errorstatus = SD_OK;
+ uint16_t rca = 0x01;
+
+ if (SDIO_GetPowerState() == SDIO_PowerState_OFF)
+ {
+ errorstatus = SD_REQUEST_NOT_APPLICABLE;
+ return(errorstatus);
+ }
+
+ if (SDIO_SECURE_DIGITAL_IO_CARD != CardType)
+ {
+ /*!< Send CMD2 ALL_SEND_CID */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x0;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_ALL_SEND_CID;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp2Error();
+
+ if (SD_OK != errorstatus)
+ {
+ return(errorstatus);
+ }
+
+ CID_Tab[0] = SDIO_GetResponse(SDIO_RESP1);
+ CID_Tab[1] = SDIO_GetResponse(SDIO_RESP2);
+ CID_Tab[2] = SDIO_GetResponse(SDIO_RESP3);
+ CID_Tab[3] = SDIO_GetResponse(SDIO_RESP4);
+ }
+ if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == CardType)
+ || (SDIO_HIGH_CAPACITY_SD_CARD == CardType))
+ {
+ /*!< Send CMD3 SET_REL_ADDR with argument 0 */
+ /*!< SD Card publishes its RCA. */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x00;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_REL_ADDR;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp6Error(SD_CMD_SET_REL_ADDR, &rca);
+
+ if (SD_OK != errorstatus)
+ {
+ return(errorstatus);
+ }
+ }
+
+ if (SDIO_SECURE_DIGITAL_IO_CARD != CardType)
+ {
+ RCA = rca;
+
+ /*!< Send CMD9 SEND_CSD with argument as card's RCA */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16);
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEND_CSD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp2Error();
+
+ if (SD_OK != errorstatus)
+ {
+ return(errorstatus);
+ }
+
+ CSD_Tab[0] = SDIO_GetResponse(SDIO_RESP1);
+ CSD_Tab[1] = SDIO_GetResponse(SDIO_RESP2);
+ CSD_Tab[2] = SDIO_GetResponse(SDIO_RESP3);
+ CSD_Tab[3] = SDIO_GetResponse(SDIO_RESP4);
+ }
+
+ errorstatus = SD_OK; /*!< All cards get intialized */
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Returns information about specific card.
+ * @param cardinfo: pointer to a SD_CardInfo structure that contains all SD card
+ * information.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo)
+{
+ SD_Error errorstatus = SD_OK;
+ uint8_t tmp = 0;
+
+ cardinfo->CardType = (uint8_t)CardType;
+ cardinfo->RCA = (uint16_t)RCA;
+
+ /*!< Byte 0 */
+ tmp = (uint8_t)((CSD_Tab[0] & 0xFF000000) >> 24);
+ cardinfo->SD_csd.CSDStruct = (tmp & 0xC0) >> 6;
+ cardinfo->SD_csd.SysSpecVersion = (tmp & 0x3C) >> 2;
+ cardinfo->SD_csd.Reserved1 = tmp & 0x03;
+
+ /*!< Byte 1 */
+ tmp = (uint8_t)((CSD_Tab[0] & 0x00FF0000) >> 16);
+ cardinfo->SD_csd.TAAC = tmp;
+
+ /*!< Byte 2 */
+ tmp = (uint8_t)((CSD_Tab[0] & 0x0000FF00) >> 8);
+ cardinfo->SD_csd.NSAC = tmp;
+
+ /*!< Byte 3 */
+ tmp = (uint8_t)(CSD_Tab[0] & 0x000000FF);
+ cardinfo->SD_csd.MaxBusClkFrec = tmp;
+
+ /*!< Byte 4 */
+ tmp = (uint8_t)((CSD_Tab[1] & 0xFF000000) >> 24);
+ cardinfo->SD_csd.CardComdClasses = tmp << 4;
+
+ /*!< Byte 5 */
+ tmp = (uint8_t)((CSD_Tab[1] & 0x00FF0000) >> 16);
+ cardinfo->SD_csd.CardComdClasses |= (tmp & 0xF0) >> 4;
+ cardinfo->SD_csd.RdBlockLen = tmp & 0x0F;
+
+ /*!< Byte 6 */
+ tmp = (uint8_t)((CSD_Tab[1] & 0x0000FF00) >> 8);
+ cardinfo->SD_csd.PartBlockRead = (tmp & 0x80) >> 7;
+ cardinfo->SD_csd.WrBlockMisalign = (tmp & 0x40) >> 6;
+ cardinfo->SD_csd.RdBlockMisalign = (tmp & 0x20) >> 5;
+ cardinfo->SD_csd.DSRImpl = (tmp & 0x10) >> 4;
+ cardinfo->SD_csd.Reserved2 = 0; /*!< Reserved */
+
+ if ((CardType == SDIO_STD_CAPACITY_SD_CARD_V1_1) || (CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0))
+ {
+ cardinfo->SD_csd.DeviceSize = (tmp & 0x03) << 10;
+
+ /*!< Byte 7 */
+ tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF);
+ cardinfo->SD_csd.DeviceSize |= (tmp) << 2;
+
+ /*!< Byte 8 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24);
+ cardinfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6;
+
+ cardinfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3;
+ cardinfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07);
+
+ /*!< Byte 9 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16);
+ cardinfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5;
+ cardinfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2;
+ cardinfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1;
+ /*!< Byte 10 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8);
+ cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7;
+
+ cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ;
+ cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2));
+ cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen);
+ cardinfo->CardCapacity *= cardinfo->CardBlockSize;
+ }
+ else if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ /*!< Byte 7 */
+ tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF);
+ cardinfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16;
+
+ /*!< Byte 8 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24);
+
+ cardinfo->SD_csd.DeviceSize |= (tmp << 8);
+
+ /*!< Byte 9 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16);
+
+ cardinfo->SD_csd.DeviceSize |= (tmp);
+
+ /*!< Byte 10 */
+ tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8);
+
+ cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024;
+ cardinfo->CardBlockSize = 512;
+ }
+
+
+ cardinfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6;
+ cardinfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1;
+
+ /*!< Byte 11 */
+ tmp = (uint8_t)(CSD_Tab[2] & 0x000000FF);
+ cardinfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7;
+ cardinfo->SD_csd.WrProtectGrSize = (tmp & 0x7F);
+
+ /*!< Byte 12 */
+ tmp = (uint8_t)((CSD_Tab[3] & 0xFF000000) >> 24);
+ cardinfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7;
+ cardinfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5;
+ cardinfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2;
+ cardinfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2;
+
+ /*!< Byte 13 */
+ tmp = (uint8_t)((CSD_Tab[3] & 0x00FF0000) >> 16);
+ cardinfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6;
+ cardinfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5;
+ cardinfo->SD_csd.Reserved3 = 0;
+ cardinfo->SD_csd.ContentProtectAppli = (tmp & 0x01);
+
+ /*!< Byte 14 */
+ tmp = (uint8_t)((CSD_Tab[3] & 0x0000FF00) >> 8);
+ cardinfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7;
+ cardinfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6;
+ cardinfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5;
+ cardinfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4;
+ cardinfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2;
+ cardinfo->SD_csd.ECC = (tmp & 0x03);
+
+ /*!< Byte 15 */
+ tmp = (uint8_t)(CSD_Tab[3] & 0x000000FF);
+ cardinfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1;
+ cardinfo->SD_csd.Reserved4 = 1;
+
+
+ /*!< Byte 0 */
+ tmp = (uint8_t)((CID_Tab[0] & 0xFF000000) >> 24);
+ cardinfo->SD_cid.ManufacturerID = tmp;
+
+ /*!< Byte 1 */
+ tmp = (uint8_t)((CID_Tab[0] & 0x00FF0000) >> 16);
+ cardinfo->SD_cid.OEM_AppliID = tmp << 8;
+
+ /*!< Byte 2 */
+ tmp = (uint8_t)((CID_Tab[0] & 0x000000FF00) >> 8);
+ cardinfo->SD_cid.OEM_AppliID |= tmp;
+
+ /*!< Byte 3 */
+ tmp = (uint8_t)(CID_Tab[0] & 0x000000FF);
+ cardinfo->SD_cid.ProdName1 = tmp << 24;
+
+ /*!< Byte 4 */
+ tmp = (uint8_t)((CID_Tab[1] & 0xFF000000) >> 24);
+ cardinfo->SD_cid.ProdName1 |= tmp << 16;
+
+ /*!< Byte 5 */
+ tmp = (uint8_t)((CID_Tab[1] & 0x00FF0000) >> 16);
+ cardinfo->SD_cid.ProdName1 |= tmp << 8;
+
+ /*!< Byte 6 */
+ tmp = (uint8_t)((CID_Tab[1] & 0x0000FF00) >> 8);
+ cardinfo->SD_cid.ProdName1 |= tmp;
+
+ /*!< Byte 7 */
+ tmp = (uint8_t)(CID_Tab[1] & 0x000000FF);
+ cardinfo->SD_cid.ProdName2 = tmp;
+
+ /*!< Byte 8 */
+ tmp = (uint8_t)((CID_Tab[2] & 0xFF000000) >> 24);
+ cardinfo->SD_cid.ProdRev = tmp;
+
+ /*!< Byte 9 */
+ tmp = (uint8_t)((CID_Tab[2] & 0x00FF0000) >> 16);
+ cardinfo->SD_cid.ProdSN = tmp << 24;
+
+ /*!< Byte 10 */
+ tmp = (uint8_t)((CID_Tab[2] & 0x0000FF00) >> 8);
+ cardinfo->SD_cid.ProdSN |= tmp << 16;
+
+ /*!< Byte 11 */
+ tmp = (uint8_t)(CID_Tab[2] & 0x000000FF);
+ cardinfo->SD_cid.ProdSN |= tmp << 8;
+
+ /*!< Byte 12 */
+ tmp = (uint8_t)((CID_Tab[3] & 0xFF000000) >> 24);
+ cardinfo->SD_cid.ProdSN |= tmp;
+
+ /*!< Byte 13 */
+ tmp = (uint8_t)((CID_Tab[3] & 0x00FF0000) >> 16);
+ cardinfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4;
+ cardinfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8;
+
+ /*!< Byte 14 */
+ tmp = (uint8_t)((CID_Tab[3] & 0x0000FF00) >> 8);
+ cardinfo->SD_cid.ManufactDate |= tmp;
+
+ /*!< Byte 15 */
+ tmp = (uint8_t)(CID_Tab[3] & 0x000000FF);
+ cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1;
+ cardinfo->SD_cid.Reserved2 = 1;
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Enables wide bus opeartion for the requeseted card if supported by
+ * card.
+ * @param WideMode: Specifies the SD card wide bus mode.
+ * This parameter can be one of the following values:
+ * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC)
+ * @arg SDIO_BusWide_4b: 4-bit data transfer
+ * @arg SDIO_BusWide_1b: 1-bit data transfer
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus)
+{
+ SD_Error errorstatus = SD_OK;
+ uint8_t tmp = 0;
+
+ errorstatus = SD_SendSDStatus((uint32_t *)SDSTATUS_Tab);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< Byte 0 */
+ tmp = (uint8_t)((SDSTATUS_Tab[0] & 0xC0) >> 6);
+ cardstatus->DAT_BUS_WIDTH = tmp;
+
+ /*!< Byte 0 */
+ tmp = (uint8_t)((SDSTATUS_Tab[0] & 0x20) >> 5);
+ cardstatus->SECURED_MODE = tmp;
+
+ /*!< Byte 2 */
+ tmp = (uint8_t)((SDSTATUS_Tab[2] & 0xFF));
+ cardstatus->SD_CARD_TYPE = tmp << 8;
+
+ /*!< Byte 3 */
+ tmp = (uint8_t)((SDSTATUS_Tab[3] & 0xFF));
+ cardstatus->SD_CARD_TYPE |= tmp;
+
+ /*!< Byte 4 */
+ tmp = (uint8_t)(SDSTATUS_Tab[4] & 0xFF);
+ cardstatus->SIZE_OF_PROTECTED_AREA = tmp << 24;
+
+ /*!< Byte 5 */
+ tmp = (uint8_t)(SDSTATUS_Tab[5] & 0xFF);
+ cardstatus->SIZE_OF_PROTECTED_AREA |= tmp << 16;
+
+ /*!< Byte 6 */
+ tmp = (uint8_t)(SDSTATUS_Tab[6] & 0xFF);
+ cardstatus->SIZE_OF_PROTECTED_AREA |= tmp << 8;
+
+ /*!< Byte 7 */
+ tmp = (uint8_t)(SDSTATUS_Tab[7] & 0xFF);
+ cardstatus->SIZE_OF_PROTECTED_AREA |= tmp;
+
+ /*!< Byte 8 */
+ tmp = (uint8_t)((SDSTATUS_Tab[8] & 0xFF));
+ cardstatus->SPEED_CLASS = tmp;
+
+ /*!< Byte 9 */
+ tmp = (uint8_t)((SDSTATUS_Tab[9] & 0xFF));
+ cardstatus->PERFORMANCE_MOVE = tmp;
+
+ /*!< Byte 10 */
+ tmp = (uint8_t)((SDSTATUS_Tab[10] & 0xF0) >> 4);
+ cardstatus->AU_SIZE = tmp;
+
+ /*!< Byte 11 */
+ tmp = (uint8_t)(SDSTATUS_Tab[11] & 0xFF);
+ cardstatus->ERASE_SIZE = tmp << 8;
+
+ /*!< Byte 12 */
+ tmp = (uint8_t)(SDSTATUS_Tab[12] & 0xFF);
+ cardstatus->ERASE_SIZE |= tmp;
+
+ /*!< Byte 13 */
+ tmp = (uint8_t)((SDSTATUS_Tab[13] & 0xFC) >> 2);
+ cardstatus->ERASE_TIMEOUT = tmp;
+
+ /*!< Byte 13 */
+ tmp = (uint8_t)((SDSTATUS_Tab[13] & 0x3));
+ cardstatus->ERASE_OFFSET = tmp;
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Enables wide bus opeartion for the requeseted card if supported by
+ * card.
+ * @param WideMode: Specifies the SD card wide bus mode.
+ * This parameter can be one of the following values:
+ * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC)
+ * @arg SDIO_BusWide_4b: 4-bit data transfer
+ * @arg SDIO_BusWide_1b: 1-bit data transfer
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_EnableWideBusOperation(uint32_t WideMode)
+{
+ SD_Error errorstatus = SD_OK;
+
+ /*!< MMC Card doesn't support this feature */
+ if (SDIO_MULTIMEDIA_CARD == CardType)
+ {
+ errorstatus = SD_UNSUPPORTED_FEATURE;
+ return(errorstatus);
+ }
+ else if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType))
+ {
+ if (SDIO_BusWide_8b == WideMode)
+ {
+ errorstatus = SD_UNSUPPORTED_FEATURE;
+ return(errorstatus);
+ }
+ else if (SDIO_BusWide_4b == WideMode)
+ {
+ errorstatus = SDEnWideBus(ENABLE);
+
+ if (SD_OK == errorstatus)
+ {
+ /*!< Configure the SDIO peripheral */
+ SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
+ SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
+ SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
+ SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
+ SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_4b;
+ SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
+ SDIO_Init(&SDIO_InitStructure);
+ }
+ }
+ else
+ {
+ errorstatus = SDEnWideBus(DISABLE);
+
+ if (SD_OK == errorstatus)
+ {
+ /*!< Configure the SDIO peripheral */
+ SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV;
+ SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
+ SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
+ SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
+ SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b;
+ SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
+ SDIO_Init(&SDIO_InitStructure);
+ }
+ }
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Selects od Deselects the corresponding card.
+ * @param addr: Address of the Card to be selected.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_SelectDeselect(uint32_t addr)
+{
+ SD_Error errorstatus = SD_OK;
+
+ /*!< Send CMD7 SDIO_SEL_DESEL_CARD */
+ SDIO_CmdInitStructure.SDIO_Argument = addr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEL_DESEL_CARD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SEL_DESEL_CARD);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to read one block from a specified address in a card. The Data
+ * transfer can be managed by DMA mode or Polling mode.
+ * @note This operation should be followed by two functions to check if the
+ * DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ * @param readbuff: pointer to the buffer that will contain the received data
+ * @param ReadAddr: Address from where data are to be read.
+ * @param BlockSize: the SD card Data block size. The Block size should be 512.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize)
+{
+ SD_Error errorstatus = SD_OK;
+#if defined (SD_POLLING_MODE)
+ uint32_t count = 0, *tempbuff = (uint32_t *)readbuff;
+#endif
+
+ TransferError = SD_OK;
+ TransferEnd = 0;
+ StopCondition = 0;
+
+ SDIO->DCTRL = 0x0;
+
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ BlockSize = 512;
+ //ReadAddr /= 512;
+ }
+
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = BlockSize;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+ /*!< Send CMD17 READ_SINGLE_BLOCK */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)ReadAddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_READ_SINGLE_BLOCK;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_READ_SINGLE_BLOCK);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+#if defined (SD_POLLING_MODE)
+ /*!< In case of single block transfer, no need of stop transfer at all.*/
+ /*!< Polling mode */
+ while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR)))
+ {
+ if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET)
+ {
+ for (count = 0; count < 8; count++)
+ {
+ *(tempbuff + count) = SDIO_ReadData();
+ }
+ tempbuff += 8;
+ }
+ }
+
+ if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT);
+ errorstatus = SD_DATA_TIMEOUT;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL);
+ errorstatus = SD_DATA_CRC_FAIL;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_RXOVERR);
+ errorstatus = SD_RX_OVERRUN;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_STBITERR);
+ errorstatus = SD_START_BIT_ERR;
+ return(errorstatus);
+ }
+ while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET)
+ {
+ *tempbuff = SDIO_ReadData();
+ tempbuff++;
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+#elif defined (SD_DMA_MODE)
+ SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE);
+ SDIO_DMACmd(ENABLE);
+ SD_LowLevel_DMA_RxConfig((uint32_t *)readbuff, BlockSize);
+#endif
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to read blocks from a specified address in a card. The Data
+ * transfer can be managed by DMA mode or Polling mode.
+ * @note This operation should be followed by two functions to check if the
+ * DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ * @param readbuff: pointer to the buffer that will contain the received data.
+ * @param ReadAddr: Address from where data are to be read.
+ * @param BlockSize: the SD card Data block size. The Block size should be 512.
+ * @param NumberOfBlocks: number of blocks to be read.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize, uint32_t NumberOfBlocks)
+{
+ SD_Error errorstatus = SD_OK;
+ TransferError = SD_OK;
+ TransferEnd = 0;
+ StopCondition = 1;
+
+ SDIO->DCTRL = 0x0;
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ BlockSize = 512;
+ //ReadAddr /= 512;
+ }
+
+ /*!< Set Block Size for Card */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN);
+
+ if (SD_OK != errorstatus)
+ {
+ return(errorstatus);
+ }
+
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+ /*!< Send CMD18 READ_MULT_BLOCK with argument data address */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)ReadAddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_READ_MULT_BLOCK;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_READ_MULT_BLOCK);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE);
+ SDIO_DMACmd(ENABLE);
+ SD_LowLevel_DMA_RxConfig((uint32_t *)readbuff, (NumberOfBlocks * BlockSize));
+
+ return(errorstatus);
+}
+
+/**
+ * @brief This function waits until the SDIO DMA data transfer is finished.
+ * This function should be called after SDIO_ReadMultiBlocks() function
+ * to insure that all data sent by the card are already transferred by
+ * the DMA controller.
+ * @param None.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_WaitReadOperation(void)
+{
+ SD_Error errorstatus = SD_OK;
+
+ while ((SD_DMAEndOfTransferStatus() == RESET) && (TransferEnd == 0) && (TransferError == SD_OK))
+ {}
+
+ if (TransferError != SD_OK)
+ {
+ return(TransferError);
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to write one block starting from a specified address in a card.
+ * The Data transfer can be managed by DMA mode or Polling mode.
+ * @note This operation should be followed by two functions to check if the
+ * DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ * @param writebuff: pointer to the buffer that contain the data to be transferred.
+ * @param WriteAddr: Address from where data are to be read.
+ * @param BlockSize: the SD card Data block size. The Block size should be 512.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSize)
+{
+ SD_Error errorstatus = SD_OK;
+
+#if defined (SD_POLLING_MODE)
+ uint32_t bytestransferred = 0, count = 0, restwords = 0;
+ uint32_t *tempbuff = (uint32_t *)writebuff;
+#endif
+
+ TransferError = SD_OK;
+ TransferEnd = 0;
+ StopCondition = 0;
+
+ SDIO->DCTRL = 0x0;
+
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ BlockSize = 512;
+ //WriteAddr /= 512;
+ }
+
+ /*!< Send CMD24 WRITE_SINGLE_BLOCK */
+ SDIO_CmdInitStructure.SDIO_Argument = WriteAddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_WRITE_SINGLE_BLOCK);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = BlockSize;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+ /*!< In case of single data block transfer no need of stop command at all */
+#if defined (SD_POLLING_MODE)
+ while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR)))
+ {
+ if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET)
+ {
+ if ((512 - bytestransferred) < 32)
+ {
+ restwords = ((512 - bytestransferred) % 4 == 0) ? ((512 - bytestransferred) / 4) : (( 512 - bytestransferred) / 4 + 1);
+ for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4)
+ {
+ SDIO_WriteData(*tempbuff);
+ }
+ }
+ else
+ {
+ for (count = 0; count < 8; count++)
+ {
+ SDIO_WriteData(*(tempbuff + count));
+ }
+ tempbuff += 8;
+ bytestransferred += 32;
+ }
+ }
+ }
+ if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT);
+ errorstatus = SD_DATA_TIMEOUT;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL);
+ errorstatus = SD_DATA_CRC_FAIL;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_TXUNDERR);
+ errorstatus = SD_TX_UNDERRUN;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_STBITERR);
+ errorstatus = SD_START_BIT_ERR;
+ return(errorstatus);
+ }
+#elif defined (SD_DMA_MODE)
+ SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE);
+ SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, BlockSize);
+ SDIO_DMACmd(ENABLE);
+#endif
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to write blocks starting from a specified address in a card.
+ * The Data transfer can be managed by DMA mode only.
+ * @note This operation should be followed by two functions to check if the
+ * DMA Controller and SD Card status.
+ * - SD_ReadWaitOperation(): this function insure that the DMA
+ * controller has finished all data transfer.
+ * - SD_GetStatus(): to check that the SD Card has finished the
+ * data transfer and it is ready for data.
+ * @param WriteAddr: Address from where data are to be read.
+ * @param writebuff: pointer to the buffer that contain the data to be transferred.
+ * @param BlockSize: the SD card Data block size. The Block size should be 512.
+ * @param NumberOfBlocks: number of blocks to be written.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSize, uint32_t NumberOfBlocks)
+{
+ SD_Error errorstatus = SD_OK;
+
+ TransferError = SD_OK;
+ TransferEnd = 0;
+ StopCondition = 1;
+
+ SDIO->DCTRL = 0x0;
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ BlockSize = 512;
+ //WriteAddr /= 512;
+ }
+
+ /*!< To improve performance */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16);
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+ /*!< To improve performance */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)NumberOfBlocks;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCK_COUNT;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SET_BLOCK_COUNT);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+
+ /*!< Send CMD25 WRITE_MULT_BLOCK with argument data address */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)WriteAddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_MULT_BLOCK;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_WRITE_MULT_BLOCK);
+
+ if (SD_OK != errorstatus)
+ {
+ return(errorstatus);
+ }
+
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+ SDIO_ITConfig(SDIO_IT_DATAEND, ENABLE);
+ SDIO_DMACmd(ENABLE);
+ SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, (NumberOfBlocks * BlockSize));
+
+ return(errorstatus);
+}
+
+/**
+ * @brief This function waits until the SDIO DMA data transfer is finished.
+ * This function should be called after SDIO_WriteBlock() and
+ * SDIO_WriteMultiBlocks() function to insure that all data sent by the
+ * card are already transferred by the DMA controller.
+ * @param None.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_WaitWriteOperation(void)
+{
+ SD_Error errorstatus = SD_OK;
+
+ while ((SD_DMAEndOfTransferStatus() == RESET) && (TransferEnd == 0) && (TransferError == SD_OK))
+ {}
+
+ if (TransferError != SD_OK)
+ {
+ return(TransferError);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Gets the cuurent data transfer state.
+ * @param None
+ * @retval SDTransferState: Data Transfer state.
+ * This value can be:
+ * - SD_TRANSFER_OK: No data transfer is acting
+ * - SD_TRANSFER_BUSY: Data transfer is acting
+ */
+SDTransferState SD_GetTransferState(void)
+{
+ if (SDIO->STA & (SDIO_FLAG_TXACT | SDIO_FLAG_RXACT))
+ {
+ return(SD_TRANSFER_BUSY);
+ }
+ else
+ {
+ return(SD_TRANSFER_OK);
+ }
+}
+
+/**
+ * @brief Aborts an ongoing data transfer.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_StopTransfer(void)
+{
+ SD_Error errorstatus = SD_OK;
+
+ /*!< Send CMD12 STOP_TRANSMISSION */
+ SDIO->ARG = 0x0;
+ SDIO->CMD = 0x44C;
+ errorstatus = CmdResp1Error(SD_CMD_STOP_TRANSMISSION);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to erase memory area specified for the given card.
+ * @param startaddr: the start address.
+ * @param endaddr: the end address.
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t delay = 0;
+ __IO uint32_t maxdelay = 0;
+ uint8_t cardstate = 0;
+
+ /*!< Check if the card coomnd class supports erase command */
+ if (((CSD_Tab[1] >> 20) & SD_CCCC_ERASE) == 0)
+ {
+ errorstatus = SD_REQUEST_NOT_APPLICABLE;
+ return(errorstatus);
+ }
+
+ maxdelay = 120000 / ((SDIO->CLKCR & 0xFF) + 2);
+
+ if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED)
+ {
+ errorstatus = SD_LOCK_UNLOCK_FAILED;
+ return(errorstatus);
+ }
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ {
+ startaddr /= 512;
+ endaddr /= 512;
+ }
+
+ /*!< According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */
+ if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType))
+ {
+ /*!< Send CMD32 SD_ERASE_GRP_START with argument as addr */
+ SDIO_CmdInitStructure.SDIO_Argument = startaddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_ERASE_GRP_START;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SD_ERASE_GRP_START);
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< Send CMD33 SD_ERASE_GRP_END with argument as addr */
+ SDIO_CmdInitStructure.SDIO_Argument = endaddr;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_ERASE_GRP_END;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SD_ERASE_GRP_END);
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+ }
+
+ /*!< Send CMD38 ERASE */
+ SDIO_CmdInitStructure.SDIO_Argument = 0;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_ERASE;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_ERASE);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ for (delay = 0; delay < maxdelay; delay++)
+ {}
+
+ /*!< Wait till the card is in programming state */
+ errorstatus = IsCardProgramming(&cardstate);
+
+ while ((errorstatus == SD_OK) && ((SD_CARD_PROGRAMMING == cardstate) || (SD_CARD_RECEIVING == cardstate)))
+ {
+ errorstatus = IsCardProgramming(&cardstate);
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Returns the current card's status.
+ * @param pcardstatus: pointer to the buffer that will contain the SD card
+ * status (Card Status register).
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_SendStatus(uint32_t *pcardstatus)
+{
+ SD_Error errorstatus = SD_OK;
+
+ SDIO->ARG = (uint32_t) RCA << 16;
+ SDIO->CMD = 0x44D;
+
+ errorstatus = CmdResp1Error(SD_CMD_SEND_STATUS);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ *pcardstatus = SDIO->RESP1;
+ return(errorstatus);
+}
+
+/**
+ * @brief Returns the current SD card's status.
+ * @param psdstatus: pointer to the buffer that will contain the SD card status
+ * (SD Status register).
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_SendSDStatus(uint32_t *psdstatus)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t count = 0;
+
+ if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED)
+ {
+ errorstatus = SD_LOCK_UNLOCK_FAILED;
+ return(errorstatus);
+ }
+
+ /*!< Set block size for card if it is not equal to current block size for card. */
+ SDIO_CmdInitStructure.SDIO_Argument = 64;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< CMD55 */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = 64;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_64b;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+ /*!< Send ACMD13 SD_APP_STAUS with argument as card's RCA.*/
+ SDIO_CmdInitStructure.SDIO_Argument = 0;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_STAUS;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+ errorstatus = CmdResp1Error(SD_CMD_SD_APP_STAUS);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR)))
+ {
+ if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET)
+ {
+ for (count = 0; count < 8; count++)
+ {
+ *(psdstatus + count) = SDIO_ReadData();
+ }
+ psdstatus += 8;
+ }
+ }
+
+ if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT);
+ errorstatus = SD_DATA_TIMEOUT;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL);
+ errorstatus = SD_DATA_CRC_FAIL;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_RXOVERR);
+ errorstatus = SD_RX_OVERRUN;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_STBITERR);
+ errorstatus = SD_START_BIT_ERR;
+ return(errorstatus);
+ }
+
+ while (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET)
+ {
+ *psdstatus = SDIO_ReadData();
+ psdstatus++;
+ }
+
+ /*!< Clear all the static status flags*/
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Allows to process all the interrupts that are high.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+SD_Error SD_ProcessIRQSrc(void)
+{
+ if (StopCondition == 1)
+ {
+ SDIO->ARG = 0x0;
+ SDIO->CMD = 0x44C;
+ TransferError = CmdResp1Error(SD_CMD_STOP_TRANSMISSION);
+ }
+ else
+ {
+ TransferError = SD_OK;
+ }
+ SDIO_ClearITPendingBit(SDIO_IT_DATAEND);
+ SDIO_ITConfig(SDIO_IT_DATAEND, DISABLE);
+ TransferEnd = 1;
+ return(TransferError);
+}
+
+/**
+ * @brief Checks for error conditions for CMD0.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdError(void)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t timeout;
+
+ timeout = SDIO_CMD0TIMEOUT; /*!< 10000 */
+
+ while ((timeout > 0) && (SDIO_GetFlagStatus(SDIO_FLAG_CMDSENT) == RESET))
+ {
+ timeout--;
+ }
+
+ if (timeout == 0)
+ {
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ return(errorstatus);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Checks for error conditions for R7 response.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdResp7Error(void)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t status;
+ uint32_t timeout = SDIO_CMD0TIMEOUT;
+
+ status = SDIO->STA;
+
+ while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) && (timeout > 0))
+ {
+ timeout--;
+ status = SDIO->STA;
+ }
+
+ if ((timeout == 0) || (status & SDIO_FLAG_CTIMEOUT))
+ {
+ /*!< Card is not V2.0 complient or card does not support the set voltage range */
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT);
+ return(errorstatus);
+ }
+
+ if (status & SDIO_FLAG_CMDREND)
+ {
+ /*!< Card is SD V2.0 compliant */
+ errorstatus = SD_OK;
+ SDIO_ClearFlag(SDIO_FLAG_CMDREND);
+ return(errorstatus);
+ }
+ return(errorstatus);
+}
+
+/**
+ * @brief Checks for error conditions for R1 response.
+ * @param cmd: The sent command index.
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdResp1Error(uint8_t cmd)
+{
+ while (!(SDIO->STA & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)))
+ {
+ }
+
+ SDIO->ICR = SDIO_STATIC_FLAGS;
+
+ return (SD_Error)(SDIO->RESP1 & SD_OCR_ERRORBITS);
+}
+
+/**
+ * @brief Checks for error conditions for R3 (OCR) response.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdResp3Error(void)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t status;
+
+ status = SDIO->STA;
+
+ while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)))
+ {
+ status = SDIO->STA;
+ }
+
+ if (status & SDIO_FLAG_CTIMEOUT)
+ {
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT);
+ return(errorstatus);
+ }
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+ return(errorstatus);
+}
+
+/**
+ * @brief Checks for error conditions for R2 (CID or CSD) response.
+ * @param None
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdResp2Error(void)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t status;
+
+ status = SDIO->STA;
+
+ while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND)))
+ {
+ status = SDIO->STA;
+ }
+
+ if (status & SDIO_FLAG_CTIMEOUT)
+ {
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT);
+ return(errorstatus);
+ }
+ else if (status & SDIO_FLAG_CCRCFAIL)
+ {
+ errorstatus = SD_CMD_CRC_FAIL;
+ SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL);
+ return(errorstatus);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Checks for error conditions for R6 (RCA) response.
+ * @param cmd: The sent command index.
+ * @param prca: pointer to the variable that will contain the SD card relative
+ * address RCA.
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca)
+{
+ SD_Error errorstatus = SD_OK;
+ uint32_t status;
+ uint32_t response_r1;
+
+ status = SDIO->STA;
+
+ while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND)))
+ {
+ status = SDIO->STA;
+ }
+
+ if (status & SDIO_FLAG_CTIMEOUT)
+ {
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT);
+ return(errorstatus);
+ }
+ else if (status & SDIO_FLAG_CCRCFAIL)
+ {
+ errorstatus = SD_CMD_CRC_FAIL;
+ SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL);
+ return(errorstatus);
+ }
+
+ /*!< Check response received is of desired command */
+ if (SDIO_GetCommandResponse() != cmd)
+ {
+ errorstatus = SD_ILLEGAL_CMD;
+ return(errorstatus);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ /*!< We have received response, retrieve it. */
+ response_r1 = SDIO_GetResponse(SDIO_RESP1);
+
+ if (SD_ALLZERO == (response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED)))
+ {
+ *prca = (uint16_t) (response_r1 >> 16);
+ return(errorstatus);
+ }
+
+ if (response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR)
+ {
+ return(SD_GENERAL_UNKNOWN_ERROR);
+ }
+
+ if (response_r1 & SD_R6_ILLEGAL_CMD)
+ {
+ return(SD_ILLEGAL_CMD);
+ }
+
+ if (response_r1 & SD_R6_COM_CRC_FAILED)
+ {
+ return(SD_COM_CRC_FAILED);
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Enables or disables the SDIO wide bus mode.
+ * @param NewState: new state of the SDIO wide bus mode.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error SDEnWideBus(FunctionalState NewState)
+{
+ SD_Error errorstatus = SD_OK;
+
+ uint32_t scr[2] = {0, 0};
+
+ if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED)
+ {
+ errorstatus = SD_LOCK_UNLOCK_FAILED;
+ return(errorstatus);
+ }
+
+ /*!< Get SCR Register */
+ errorstatus = FindSCR(RCA, scr);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< If wide bus operation to be enabled */
+ if (NewState == ENABLE)
+ {
+ /*!< If requested card supports wide bus operation */
+ if ((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO)
+ {
+ /*!< Send CMD55 APP_CMD with argument as card's RCA.*/
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< Send ACMD6 APP_CMD with argument as 2 for wide bus mode */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x2;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_SD_SET_BUSWIDTH);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+ return(errorstatus);
+ }
+ else
+ {
+ errorstatus = SD_REQUEST_NOT_APPLICABLE;
+ return(errorstatus);
+ }
+ } /*!< If wide bus operation to be disabled */
+ else
+ {
+ /*!< If requested card supports 1 bit mode operation */
+ if ((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO)
+ {
+ /*!< Send CMD55 APP_CMD with argument as card's RCA.*/
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< Send ACMD6 APP_CMD with argument as 2 for wide bus mode */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x00;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_SD_SET_BUSWIDTH);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ return(errorstatus);
+ }
+ else
+ {
+ errorstatus = SD_REQUEST_NOT_APPLICABLE;
+ return(errorstatus);
+ }
+ }
+}
+
+/**
+ * @brief Checks if the SD card is in programming state.
+ * @param pstatus: pointer to the variable that will contain the SD card state.
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error IsCardProgramming(uint8_t *pstatus)
+{
+ SD_Error errorstatus = SD_OK;
+ __IO uint32_t respR1 = 0, status = 0;
+
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEND_STATUS;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ status = SDIO->STA;
+ while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)))
+ {
+ status = SDIO->STA;
+ }
+
+ if (status & SDIO_FLAG_CTIMEOUT)
+ {
+ errorstatus = SD_CMD_RSP_TIMEOUT;
+ SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT);
+ return(errorstatus);
+ }
+ else if (status & SDIO_FLAG_CCRCFAIL)
+ {
+ errorstatus = SD_CMD_CRC_FAIL;
+ SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL);
+ return(errorstatus);
+ }
+
+ status = (uint32_t)SDIO_GetCommandResponse();
+
+ /*!< Check response received is of desired command */
+ if (status != SD_CMD_SEND_STATUS)
+ {
+ errorstatus = SD_ILLEGAL_CMD;
+ return(errorstatus);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+
+ /*!< We have received response, retrieve it for analysis */
+ respR1 = SDIO_GetResponse(SDIO_RESP1);
+
+ /*!< Find out card status */
+ *pstatus = (uint8_t) ((respR1 >> 9) & 0x0000000F);
+
+ if ((respR1 & SD_OCR_ERRORBITS) == SD_ALLZERO)
+ {
+ return(errorstatus);
+ }
+
+ if (respR1 & SD_OCR_ADDR_OUT_OF_RANGE)
+ {
+ return(SD_ADDR_OUT_OF_RANGE);
+ }
+
+ if (respR1 & SD_OCR_ADDR_MISALIGNED)
+ {
+ return(SD_ADDR_MISALIGNED);
+ }
+
+ if (respR1 & SD_OCR_BLOCK_LEN_ERR)
+ {
+ return(SD_BLOCK_LEN_ERR);
+ }
+
+ if (respR1 & SD_OCR_ERASE_SEQ_ERR)
+ {
+ return(SD_ERASE_SEQ_ERR);
+ }
+
+ if (respR1 & SD_OCR_BAD_ERASE_PARAM)
+ {
+ return(SD_BAD_ERASE_PARAM);
+ }
+
+ if (respR1 & SD_OCR_WRITE_PROT_VIOLATION)
+ {
+ return(SD_WRITE_PROT_VIOLATION);
+ }
+
+ if (respR1 & SD_OCR_LOCK_UNLOCK_FAILED)
+ {
+ return(SD_LOCK_UNLOCK_FAILED);
+ }
+
+ if (respR1 & SD_OCR_COM_CRC_FAILED)
+ {
+ return(SD_COM_CRC_FAILED);
+ }
+
+ if (respR1 & SD_OCR_ILLEGAL_CMD)
+ {
+ return(SD_ILLEGAL_CMD);
+ }
+
+ if (respR1 & SD_OCR_CARD_ECC_FAILED)
+ {
+ return(SD_CARD_ECC_FAILED);
+ }
+
+ if (respR1 & SD_OCR_CC_ERROR)
+ {
+ return(SD_CC_ERROR);
+ }
+
+ if (respR1 & SD_OCR_GENERAL_UNKNOWN_ERROR)
+ {
+ return(SD_GENERAL_UNKNOWN_ERROR);
+ }
+
+ if (respR1 & SD_OCR_STREAM_READ_UNDERRUN)
+ {
+ return(SD_STREAM_READ_UNDERRUN);
+ }
+
+ if (respR1 & SD_OCR_STREAM_WRITE_OVERRUN)
+ {
+ return(SD_STREAM_WRITE_OVERRUN);
+ }
+
+ if (respR1 & SD_OCR_CID_CSD_OVERWRIETE)
+ {
+ return(SD_CID_CSD_OVERWRITE);
+ }
+
+ if (respR1 & SD_OCR_WP_ERASE_SKIP)
+ {
+ return(SD_WP_ERASE_SKIP);
+ }
+
+ if (respR1 & SD_OCR_CARD_ECC_DISABLED)
+ {
+ return(SD_CARD_ECC_DISABLED);
+ }
+
+ if (respR1 & SD_OCR_ERASE_RESET)
+ {
+ return(SD_ERASE_RESET);
+ }
+
+ if (respR1 & SD_OCR_AKE_SEQ_ERROR)
+ {
+ return(SD_AKE_SEQ_ERROR);
+ }
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Find the SD card SCR register value.
+ * @param rca: selected card address.
+ * @param pscr: pointer to the buffer that will contain the SCR value.
+ * @retval SD_Error: SD Card Error code.
+ */
+static SD_Error FindSCR(uint16_t rca, uint32_t *pscr)
+{
+ uint32_t index = 0;
+ SD_Error errorstatus = SD_OK;
+ uint32_t tempscr[2] = {0, 0};
+
+ /*!< Set Block Size To 8 Bytes */
+ /*!< Send CMD55 APP_CMD with argument as card's RCA */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)8;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ /*!< Send CMD55 APP_CMD with argument as card's RCA */
+ SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+ SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT;
+ SDIO_DataInitStructure.SDIO_DataLength = 8;
+ SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_8b;
+ SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO;
+ SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block;
+ SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable;
+ SDIO_DataConfig(&SDIO_DataInitStructure);
+
+
+ /*!< Send ACMD51 SD_APP_SEND_SCR with argument as 0 */
+ SDIO_CmdInitStructure.SDIO_Argument = 0x0;
+ SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_SEND_SCR;
+ SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short;
+ SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
+ SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
+ SDIO_SendCommand(&SDIO_CmdInitStructure);
+
+ errorstatus = CmdResp1Error(SD_CMD_SD_APP_SEND_SCR);
+
+ if (errorstatus != SD_OK)
+ {
+ return(errorstatus);
+ }
+
+ while (!(SDIO->STA & (SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR)))
+ {
+ if (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET)
+ {
+ *(tempscr + index) = SDIO_ReadData();
+ index++;
+ }
+ }
+
+ if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT);
+ errorstatus = SD_DATA_TIMEOUT;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL);
+ errorstatus = SD_DATA_CRC_FAIL;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_RXOVERR);
+ errorstatus = SD_RX_OVERRUN;
+ return(errorstatus);
+ }
+ else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET)
+ {
+ SDIO_ClearFlag(SDIO_FLAG_STBITERR);
+ errorstatus = SD_START_BIT_ERR;
+ return(errorstatus);
+ }
+
+ /*!< Clear all the static flags */
+ SDIO_ClearFlag(SDIO_STATIC_FLAGS);
+
+ *(pscr + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) | ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24);
+
+ *(pscr) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) | ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24);
+
+ return(errorstatus);
+}
+
+/**
+ * @brief Converts the number of bytes in power of two and returns the power.
+ * @param NumberOfBytes: number of bytes.
+ * @retval None
+ */
+uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes)
+{
+ uint8_t count = 0;
+
+ while (NumberOfBytes != 1)
+ {
+ NumberOfBytes >>= 1;
+ count++;
+ }
+ return(count);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+
+/*
+ * RT-Thread SD Card Driver
+ * 20100715 Bernard support SDHC card great than 4G.
+ * 20110905 JoyChen support to STM32F2xx
+ */
+#include <rtthread.h>
+#include <dfs_fs.h>
+
+/* set sector size to 512 */
+#define SECTOR_SIZE 512
+
+static struct rt_device sdcard_device;
+//static SD_CardInfo SDCardInfo;
+static struct dfs_partition part;
+static struct rt_semaphore sd_lock;
+static rt_uint8_t _sdcard_buffer[SECTOR_SIZE];
+/* RT-Thread Device Driver Interface */
+static rt_err_t rt_sdcard_init(rt_device_t dev)
+{
+/* NVIC_InitTypeDef NVIC_InitStructure;
+
+ NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure); */
+
+ if (rt_sem_init(&sd_lock, "sdlock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
+ {
+ rt_kprintf("init sd lock semaphore failed\n");
+ }
+ else
+ rt_kprintf("SD Card init OK\n");
+
+ return RT_EOK;
+}
+
+static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ return RT_EOK;
+}
+
+static rt_err_t rt_sdcard_close(rt_device_t dev)
+{
+ return RT_EOK;
+}
+
+static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ SD_Error status;
+ rt_uint32_t retry;
+ rt_uint32_t factor;
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
+ else factor = SECTOR_SIZE;
+ //rt_kprintf("sd: read 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer ,pos, size);
+ rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
+
+ retry = 3;
+ while(retry)
+ {
+ /* read all sectors */
+ if (((rt_uint32_t)buffer % 4 != 0) ||
+ ((rt_uint32_t)buffer > 0x20080000))
+ {
+ rt_uint32_t index;
+
+ /* which is not alignment with 4 or chip SRAM */
+ for (index = 0; index < size; index ++)
+ {
+ status = SD_ReadBlock((part.offset + index + pos) * factor,
+ (uint8_t*)_sdcard_buffer, SECTOR_SIZE);
+
+ status = SD_WaitReadOperation();
+ while(SD_GetStatus() != SD_TRANSFER_OK);
+ if (status != SD_OK) break;
+
+ /* copy to the buffer */
+ rt_memcpy(((rt_uint8_t*)buffer + index * SECTOR_SIZE), _sdcard_buffer, SECTOR_SIZE);
+ }
+ }
+ else
+ {
+ if (size == 1)
+ {
+ status = SD_ReadBlock((part.offset + pos) * factor,
+ (uint8_t*)buffer, SECTOR_SIZE);
+ }
+ else
+ {
+ status = SD_ReadMultiBlocks((part.offset + pos) * factor,
+ (uint8_t*)buffer, SECTOR_SIZE, size);
+ }
+ status = SD_WaitReadOperation();
+ while(SD_GetStatus() != SD_TRANSFER_OK);
+ /*rt_kprintf("===DUMP SECTOR %d===\n",pos);
+ {
+ int i, j;
+ char* tmp = (char*)buffer;
+ for(i =0; i < 32;i++)
+ {
+ rt_kprintf("%2d: ",i);
+ for(j= 0; j < 16;j++)
+ rt_kprintf("%02X ",tmp[i*16+j]);
+ rt_kprintf("\n");
+ }
+ } */
+ }
+
+ if (status == SD_OK) break;
+
+ retry --;
+ }
+ rt_sem_release(&sd_lock);
+ if (status == SD_OK) return size;
+
+ rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
+ return 0;
+}
+
+static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+ SD_Error status;
+ rt_uint32_t factor;
+
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) factor = 1;
+ else factor = SECTOR_SIZE;
+
+ //rt_kprintf("sd: write 0x%X, sector 0x%X, 0x%X\n", (uint32_t)buffer , pos, size);
+ rt_sem_take(&sd_lock, RT_WAITING_FOREVER);
+
+ /* read all sectors */
+ if (((rt_uint32_t)buffer % 4 != 0) ||
+ ((rt_uint32_t)buffer > 0x20080000))
+ {
+ rt_uint32_t index;
+
+ /* which is not alignment with 4 or not chip SRAM */
+ for (index = 0; index < size; index ++)
+ {
+ /* copy to the buffer */
+ rt_memcpy(_sdcard_buffer, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE);
+
+ status = SD_WriteBlock((part.offset + index + pos) * factor,
+ (uint8_t*)_sdcard_buffer, SECTOR_SIZE);
+
+ status = SD_WaitWriteOperation();
+ while(SD_GetStatus() != SD_TRANSFER_OK);
+
+ if (status != SD_OK) break;
+ }
+ }
+ else
+ {
+ if (size == 1)
+ {
+ status = SD_WriteBlock((part.offset + pos) * factor,
+ (uint8_t*)buffer, SECTOR_SIZE);
+ }
+ else
+ {
+ status = SD_WriteMultiBlocks((part.offset + pos) * factor,
+ (uint8_t*)buffer, SECTOR_SIZE, size);
+ }
+
+ status = SD_WaitWriteOperation();
+ while(SD_GetStatus() != SD_TRANSFER_OK);
+ }
+ rt_sem_release(&sd_lock);
+
+ if (status == SD_OK) return size;
+
+ rt_kprintf("write failed: %d, buffer 0x%08x\n", status, buffer);
+ return 0;
+}
+
+static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+ RT_ASSERT(dev != RT_NULL);
+
+ if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
+ {
+ struct rt_device_blk_geometry *geometry;
+
+ geometry = (struct rt_device_blk_geometry *)args;
+ if (geometry == RT_NULL) return -RT_ERROR;
+
+ geometry->bytes_per_sector = 512;
+ geometry->block_size = SDCardInfo.CardBlockSize;
+ if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
+ geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024;
+ else
+ geometry->sector_count = SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
+ }
+
+ return RT_EOK;
+}
+
+void rt_hw_sdcard_init()
+{
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ if (SD_Init() == SD_OK)
+ {
+ SD_Error status;
+ rt_uint8_t *sector;
+
+ /*status = SD_GetCardInfo(&SDCardInfo);
+ if (status != SD_OK) goto __return;
+
+ status = SD_SelectDeselect((u32) (SDCardInfo.RCA << 16));
+ if (status != SD_OK) goto __return;
+
+ SD_EnableWideBusOperation(SDIO_BusWide_4b);
+ SD_SetDeviceMode(SD_DMA_MODE); */
+
+ // SDIO Interrupt ENABLE
+ NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure);
+
+ /* get the first sector to read partition table */
+ sector = (rt_uint8_t*) rt_malloc (512);
+ if (sector == RT_NULL)
+ {
+ rt_kprintf("allocate partition sector buffer failed\n");
+ return;
+ }
+ status = SD_ReadBlock(0, (uint8_t*)sector, 512);
+ status = SD_WaitReadOperation();
+ while(SD_GetStatus() != SD_TRANSFER_OK);
+
+ if (status == SD_OK)
+ {
+ /* get the first partition */
+ if (dfs_filesystem_get_partition(&part, sector, 0) != 0)
+ {
+ /* there is no partition */
+ part.offset = 0;
+ part.size = 0;
+ }
+ }
+ else
+ {
+ /* there is no partition table */
+ part.offset = 0;
+ part.size = 0;
+ }
+
+ /* release sector buffer */
+ rt_free(sector);
+
+ /* register sdcard device */
+ sdcard_device.type = RT_Device_Class_Block;
+ sdcard_device.init = rt_sdcard_init;
+ sdcard_device.open = rt_sdcard_open;
+ sdcard_device.close = rt_sdcard_close;
+ sdcard_device.read = rt_sdcard_read;
+ sdcard_device.write = rt_sdcard_write;
+ sdcard_device.control = rt_sdcard_control;
+
+ /* no private */
+ sdcard_device.user_data = &SDCardInfo;
+
+ rt_device_register(&sdcard_device, "sd0",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
+
+ return;
+ }
+
+__return:
+ rt_kprintf("sdcard init failed\n");
+}
diff --git a/bsp/stm32f20x/Drivers/sdio_sd.h b/bsp/stm32f20x/Drivers/sdio_sd.h new file mode 100644 index 0000000000..0741da7da0 --- /dev/null +++ b/bsp/stm32f20x/Drivers/sdio_sd.h @@ -0,0 +1,397 @@ +/**
+ ******************************************************************************
+ * @file stm32_eval_sdio_sd.h
+ * @author MCD Application Team
+ * @version V4.6.1
+ * @date 18-April-2011
+ * @brief This file contains all the functions prototypes for the SD Card
+ * stm32_eval_sdio_sd driver firmware library.
+ ******************************************************************************
+ * @attention
+ *
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32_EVAL_SDIO_SD_H
+#define __STM32_EVAL_SDIO_SD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "board.h"
+
+/** @addtogroup Utilities
+ * @{
+ */
+
+/** @addtogroup STM32_EVAL
+ * @{
+ */
+
+/** @addtogroup Common
+ * @{
+ */
+
+/** @addtogroup STM32_EVAL_SDIO_SD
+ * @{
+ */
+
+/** @defgroup STM32_EVAL_SDIO_SD_Exported_Types
+ * @{
+ */
+typedef enum
+{
+/**
+ * @brief SDIO specific error defines
+ */
+ SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
+ SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */
+ SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
+ SD_DATA_TIMEOUT = (4), /*!< Data time out */
+ SD_TX_UNDERRUN = (5), /*!< Transmit FIFO under-run */
+ SD_RX_OVERRUN = (6), /*!< Receive FIFO over-run */
+ SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in widE bus mode */
+ SD_CMD_OUT_OF_RANGE = (8), /*!< CMD's argument was out of range.*/
+ SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
+ SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
+ SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs.*/
+ SD_BAD_ERASE_PARAM = (12), /*!< An Invalid selection for erase groups */
+ SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
+ SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
+ SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
+ SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
+ SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
+ SD_CC_ERROR = (18), /*!< Internal card controller error */
+ SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or Unknown error */
+ SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
+ SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
+ SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
+ SD_WP_ERASE_SKIP = (23), /*!< only partial address space was erased */
+ SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
+ SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
+ SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
+ SD_INVALID_VOLTRANGE = (27),
+ SD_ADDR_OUT_OF_RANGE = (28),
+ SD_SWITCH_ERROR = (29),
+ SD_SDIO_DISABLED = (30),
+ SD_SDIO_FUNCTION_BUSY = (31),
+ SD_SDIO_FUNCTION_FAILED = (32),
+ SD_SDIO_UNKNOWN_FUNCTION = (33),
+
+/**
+ * @brief Standard error defines
+ */
+ SD_INTERNAL_ERROR,
+ SD_NOT_CONFIGURED,
+ SD_REQUEST_PENDING,
+ SD_REQUEST_NOT_APPLICABLE,
+ SD_INVALID_PARAMETER,
+ SD_UNSUPPORTED_FEATURE,
+ SD_UNSUPPORTED_HW,
+ SD_ERROR,
+ SD_OK = 0
+} SD_Error;
+
+/**
+ * @brief SDIO Transfer state
+ */
+typedef enum
+{
+ SD_TRANSFER_OK = 0,
+ SD_TRANSFER_BUSY = 1,
+ SD_TRANSFER_ERROR
+} SDTransferState;
+
+/**
+ * @brief SD Card States
+ */
+typedef enum
+{
+ SD_CARD_READY = ((uint32_t)0x00000001),
+ SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002),
+ SD_CARD_STANDBY = ((uint32_t)0x00000003),
+ SD_CARD_TRANSFER = ((uint32_t)0x00000004),
+ SD_CARD_SENDING = ((uint32_t)0x00000005),
+ SD_CARD_RECEIVING = ((uint32_t)0x00000006),
+ SD_CARD_PROGRAMMING = ((uint32_t)0x00000007),
+ SD_CARD_DISCONNECTED = ((uint32_t)0x00000008),
+ SD_CARD_ERROR = ((uint32_t)0x000000FF)
+}SDCardState;
+
+
+/**
+ * @brief Card Specific Data: CSD Register
+ */
+typedef struct
+{
+ __IO uint8_t CSDStruct; /*!< CSD structure */
+ __IO uint8_t SysSpecVersion; /*!< System specification version */
+ __IO uint8_t Reserved1; /*!< Reserved */
+ __IO uint8_t TAAC; /*!< Data read access-time 1 */
+ __IO uint8_t NSAC; /*!< Data read access-time 2 in CLK cycles */
+ __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
+ __IO uint16_t CardComdClasses; /*!< Card command classes */
+ __IO uint8_t RdBlockLen; /*!< Max. read data block length */
+ __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
+ __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
+ __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
+ __IO uint8_t DSRImpl; /*!< DSR implemented */
+ __IO uint8_t Reserved2; /*!< Reserved */
+ __IO uint32_t DeviceSize; /*!< Device Size */
+ __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
+ __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
+ __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
+ __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
+ __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
+ __IO uint8_t EraseGrSize; /*!< Erase group size */
+ __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
+ __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
+ __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
+ __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
+ __IO uint8_t WrSpeedFact; /*!< Write speed factor */
+ __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
+ __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
+ __IO uint8_t Reserved3; /*!< Reserded */
+ __IO uint8_t ContentProtectAppli; /*!< Content protection application */
+ __IO uint8_t FileFormatGrouop; /*!< File format group */
+ __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
+ __IO uint8_t PermWrProtect; /*!< Permanent write protection */
+ __IO uint8_t TempWrProtect; /*!< Temporary write protection */
+ __IO uint8_t FileFormat; /*!< File Format */
+ __IO uint8_t ECC; /*!< ECC code */
+ __IO uint8_t CSD_CRC; /*!< CSD CRC */
+ __IO uint8_t Reserved4; /*!< always 1*/
+} SD_CSD;
+
+/**
+ * @brief Card Identification Data: CID Register
+ */
+typedef struct
+{
+ __IO uint8_t ManufacturerID; /*!< ManufacturerID */
+ __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
+ __IO uint32_t ProdName1; /*!< Product Name part1 */
+ __IO uint8_t ProdName2; /*!< Product Name part2*/
+ __IO uint8_t ProdRev; /*!< Product Revision */
+ __IO uint32_t ProdSN; /*!< Product Serial Number */
+ __IO uint8_t Reserved1; /*!< Reserved1 */
+ __IO uint16_t ManufactDate; /*!< Manufacturing Date */
+ __IO uint8_t CID_CRC; /*!< CID CRC */
+ __IO uint8_t Reserved2; /*!< always 1 */
+} SD_CID;
+
+/**
+ * @brief SD Card Status
+ */
+typedef struct
+{
+ __IO uint8_t DAT_BUS_WIDTH;
+ __IO uint8_t SECURED_MODE;
+ __IO uint16_t SD_CARD_TYPE;
+ __IO uint32_t SIZE_OF_PROTECTED_AREA;
+ __IO uint8_t SPEED_CLASS;
+ __IO uint8_t PERFORMANCE_MOVE;
+ __IO uint8_t AU_SIZE;
+ __IO uint16_t ERASE_SIZE;
+ __IO uint8_t ERASE_TIMEOUT;
+ __IO uint8_t ERASE_OFFSET;
+} SD_CardStatus;
+
+
+/**
+ * @brief SD Card information
+ */
+typedef struct
+{
+ SD_CSD SD_csd;
+ SD_CID SD_cid;
+ uint32_t CardCapacity; /*!< Card Capacity */
+ uint32_t CardBlockSize; /*!< Card Block Size */
+ uint16_t RCA;
+ uint8_t CardType;
+} SD_CardInfo;
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32_EVAL_SDIO_SD_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief SDIO Commands Index
+ */
+#define SD_CMD_GO_IDLE_STATE ((uint8_t)0)
+#define SD_CMD_SEND_OP_COND ((uint8_t)1)
+#define SD_CMD_ALL_SEND_CID ((uint8_t)2)
+#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< SDIO_SEND_REL_ADDR for SD Card */
+#define SD_CMD_SET_DSR ((uint8_t)4)
+#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5)
+#define SD_CMD_HS_SWITCH ((uint8_t)6)
+#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7)
+#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8)
+#define SD_CMD_SEND_CSD ((uint8_t)9)
+#define SD_CMD_SEND_CID ((uint8_t)10)
+#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD Card doesn't support it */
+#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12)
+#define SD_CMD_SEND_STATUS ((uint8_t)13)
+#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
+#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15)
+#define SD_CMD_SET_BLOCKLEN ((uint8_t)16)
+#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17)
+#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18)
+#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19)
+#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< SD Card doesn't support it */
+#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< SD Card doesn't support it */
+#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24)
+#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25)
+#define SD_CMD_PROG_CID ((uint8_t)26) /*!< reserved for manufacturers */
+#define SD_CMD_PROG_CSD ((uint8_t)27)
+#define SD_CMD_SET_WRITE_PROT ((uint8_t)28)
+#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29)
+#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30)
+#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< To set the address of the first write
+ block to be erased. (For SD card only) */
+#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< To set the address of the last write block of the
+ continuous range to be erased. (For SD card only) */
+#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< To set the address of the first write block to be erased.
+ (For MMC card only spec 3.31) */
+
+#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< To set the address of the last write block of the
+ continuous range to be erased. (For MMC card only spec 3.31) */
+
+#define SD_CMD_ERASE ((uint8_t)38)
+#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD Card doesn't support it */
+#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD Card doesn't support it */
+#define SD_CMD_LOCK_UNLOCK ((uint8_t)42)
+#define SD_CMD_APP_CMD ((uint8_t)55)
+#define SD_CMD_GEN_CMD ((uint8_t)56)
+#define SD_CMD_NO_CMD ((uint8_t)64)
+
+/**
+ * @brief Following commands are SD Card Specific commands.
+ * SDIO_APP_CMD should be sent before sending these commands.
+ */
+#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< For SD Card only */
+#define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< For SD Card only */
+#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< For SD Card only */
+#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O Card only */
+#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O Card only */
+
+/**
+ * @brief Following commands are SD Card Specific security commands.
+ * SDIO_APP_CMD should be sent before sending these commands.
+ */
+#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD Card only */
+#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD Card only */
+#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD Card only */
+#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD Card only */
+#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD Card only */
+#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD Card only */
+
+/* Uncomment the following line to select the SDIO Data transfer mode */
+#define SD_DMA_MODE ((uint32_t)0x00000000)
+/*#define SD_POLLING_MODE ((uint32_t)0x00000002)*/
+
+/**
+ * @brief SD detection on its memory slot
+ */
+#define SD_PRESENT ((uint8_t)0x01)
+#define SD_NOT_PRESENT ((uint8_t)0x00)
+
+/**
+ * @brief Supported SD Memory Cards
+ */
+#define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
+#define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
+#define SDIO_HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
+#define SDIO_MULTIMEDIA_CARD ((uint32_t)0x00000003)
+#define SDIO_SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
+#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
+#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
+#define SDIO_HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32_EVAL_SDIO_SD_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup STM32_EVAL_SDIO_SD_Exported_Functions
+ * @{
+ */
+void SD_DeInit(void);
+SD_Error SD_Init(void);
+SDTransferState SD_GetStatus(void);
+SDCardState SD_GetState(void);
+uint8_t SD_Detect(void);
+SD_Error SD_PowerON(void);
+SD_Error SD_PowerOFF(void);
+SD_Error SD_InitializeCards(void);
+SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo);
+SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus);
+SD_Error SD_EnableWideBusOperation(uint32_t WideMode);
+SD_Error SD_SelectDeselect(uint32_t addr);
+SD_Error SD_ReadBlock(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize);
+SD_Error SD_ReadMultiBlocks(uint32_t ReadAddr, uint8_t *readbuff, uint16_t BlockSize, uint32_t NumberOfBlocks);
+SD_Error SD_WriteBlock(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSize);
+SD_Error SD_WriteMultiBlocks(uint32_t WriteAddr, uint8_t *writebuff, uint16_t BlockSize, uint32_t NumberOfBlocks);
+SDTransferState SD_GetTransferState(void);
+SD_Error SD_StopTransfer(void);
+SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr);
+SD_Error SD_SendStatus(uint32_t *pcardstatus);
+SD_Error SD_SendSDStatus(uint32_t *psdstatus);
+SD_Error SD_ProcessIRQSrc(void);
+SD_Error SD_WaitReadOperation(void);
+SD_Error SD_WaitWriteOperation(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32_EVAL_SDIO_SD_H */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32f20x/Drivers/serial.c b/bsp/stm32f20x/Drivers/serial.c new file mode 100644 index 0000000000..7a3713aab4 --- /dev/null +++ b/bsp/stm32f20x/Drivers/serial.c @@ -0,0 +1,418 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-02-05 Bernard first version + * 2009-10-25 Bernard fix rt_serial_read bug when there is no data + * in the buffer. + * 2010-03-29 Bernard cleanup code. + */ + +#include "serial.h" +#include <stm32f2xx_dma.h> +#include <stm32f2xx_usart.h> + +static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, + rt_uint32_t address, rt_uint32_t size); + +/** + * @addtogroup STM32 + */ +/*@{*/ + +/* RT-Thread Device Interface */ +static rt_err_t rt_serial_init (rt_device_t dev) +{ + struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data; + + if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + rt_memset(uart->int_rx->rx_buffer, 0, + sizeof(uart->int_rx->rx_buffer)); + uart->int_rx->read_index = 0; + uart->int_rx->save_index = 0; + } + + if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL); + uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL; + + /* init data node memory pool */ + rt_mp_init(&(uart->dma_tx->data_node_mp), "dn", + uart->dma_tx->data_node_mem_pool, + sizeof(uart->dma_tx->data_node_mem_pool), + sizeof(struct stm32_serial_data_node)); + } + + /* Enable USART */ + USART_Cmd(uart->uart_device, ENABLE); + + dev->flag |= RT_DEVICE_FLAG_ACTIVATED; + } + + return RT_EOK; +} + +static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) +{ + return RT_EOK; +} + +static rt_err_t rt_serial_close(rt_device_t dev) +{ + return RT_EOK; +} + +static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; + + ptr = buffer; + err_code = RT_EOK; + uart = (struct stm32_serial_device*)dev->user_data; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* interrupt mode Rx */ + while (size) + { + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + if (uart->int_rx->read_index != uart->int_rx->save_index) + { + /* read a character */ + *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index]; + size--; + + /* move to next position */ + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } + else + { + /* set error code */ + err_code = -RT_EEMPTY; + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size) + { + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + *ptr = uart->uart_device->DR & 0xff; + ptr ++; + } + } + } + + /* set error code */ + rt_set_errno(err_code); + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; +} + +static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel, + rt_uint32_t address, rt_uint32_t size) +{ + RT_ASSERT(dma_channel != RT_NULL); + + /* disable DMA */ + DMA_Cmd(dma_channel, DISABLE); +
+ /* set buffer address */ + dma_channel->M0AR = address; + /* set size */ + dma_channel->NDTR = size; + + /* enable DMA */ + DMA_Cmd(dma_channel, ENABLE); +} + +static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + rt_err_t err_code; + struct stm32_serial_device* uart; + + err_code = RT_EOK; + ptr = (rt_uint8_t*)buffer; + uart = (struct stm32_serial_device*)dev->user_data; + + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* interrupt mode Tx, does not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* DMA mode Tx */ + + /* allocate a data node */ + struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*) + rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER); + if (data_node == RT_NULL) + { + /* set error code */ + err_code = -RT_ENOMEM; + } + else + { + rt_uint32_t level; + + /* fill data node */ + data_node->data_ptr = ptr; + data_node->data_size = size; + + /* insert to data link */ + data_node->next = RT_NULL; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + data_node->prev = uart->dma_tx->list_tail; + if (uart->dma_tx->list_tail != RT_NULL) + uart->dma_tx->list_tail->next = data_node; + uart->dma_tx->list_tail = data_node; + + if (uart->dma_tx->list_head == RT_NULL) + { + /* start DMA to transmit data */ + uart->dma_tx->list_head = data_node; + + /* Enable DMA Channel */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + } + else + { + /* polling mode */ + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = '\r'; + } + + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); + + ++ptr; --size; + } + } + else + { + /* write data directly */ + while (size) + { + while (!(uart->uart_device->SR & USART_FLAG_TXE)); + uart->uart_device->DR = (*ptr & 0x1FF); + + ++ptr; --size; + } + } + } + + /* set error code */ + rt_set_errno(err_code); + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; +} + +static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args) +{ + struct stm32_serial_device* uart; + + RT_ASSERT(dev != RT_NULL); + + uart = (struct stm32_serial_device*)dev->user_data; + switch (cmd) + { + case RT_DEVICE_CTRL_SUSPEND: + /* suspend device */ + dev->flag |= RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, DISABLE); + break; + + case RT_DEVICE_CTRL_RESUME: + /* resume device */ + dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED; + USART_Cmd(uart->uart_device, ENABLE); + break; + } + + return RT_EOK; +} + +/* + * serial register for STM32 + * support STM32F103VB and STM32F103ZE + */ +rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial) +{ + RT_ASSERT(device != RT_NULL); + + if ((flag & RT_DEVICE_FLAG_DMA_RX) || + (flag & RT_DEVICE_FLAG_INT_TX)) + { + RT_ASSERT(0); + } + + device->type = RT_Device_Class_Char; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + device->init = rt_serial_init; + device->open = rt_serial_open; + device->close = rt_serial_close; + device->read = rt_serial_read; + device->write = rt_serial_write; + device->control = rt_serial_control; + device->user_data = serial; + + /* register a character device */ + return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag); +} + +/* ISR for serial interrupt */ +void rt_hw_serial_isr(rt_device_t device) +{ + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + /* interrupt mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX); + + /* save on rx buffer */ + while (uart->uart_device->SR & USART_FLAG_RXNE) + { + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* save character */ + uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff; + uart->int_rx->save_index ++; + if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (uart->int_rx->save_index == uart->int_rx->read_index) + { + uart->int_rx->read_index ++; + if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE) + uart->int_rx->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + + /* invoke callback */ + if (device->rx_indicate != RT_NULL) + { + rt_size_t rx_length; + + /* get rx length */ + rx_length = uart->int_rx->read_index > uart->int_rx->save_index ? + UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index : + uart->int_rx->save_index - uart->int_rx->read_index; + + device->rx_indicate(device, rx_length); + } + } + + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } +} + +/* + * ISR for DMA mode Tx + */ +void rt_hw_serial_dma_tx_isr(rt_device_t device) +{ + rt_uint32_t level; + struct stm32_serial_data_node* data_node; + struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data; + + /* DMA mode receive */ + RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX); + + /* get the first data node */ + data_node = uart->dma_tx->list_head; + RT_ASSERT(data_node != RT_NULL); + + /* invoke call to notify tx complete */ + if (device->tx_complete != RT_NULL) + device->tx_complete(device, data_node->data_ptr); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* remove list head */ + uart->dma_tx->list_head = data_node->next; + if (uart->dma_tx->list_head == RT_NULL) /* data link empty */ + uart->dma_tx->list_tail = RT_NULL; + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + /* release data node memory */ + rt_mp_free(data_node); + + if (uart->dma_tx->list_head != RT_NULL) + { + /* transmit next data node */ + rt_serial_enable_dma(uart->dma_tx->dma_channel, + (rt_uint32_t)uart->dma_tx->list_head->data_ptr, + uart->dma_tx->list_head->data_size); + } + else + { + /* no data to be transmitted, disable DMA */ + DMA_Cmd(uart->dma_tx->dma_channel, DISABLE); + } +} + +/*@}*/ diff --git a/bsp/stm32f20x/Drivers/serial.h b/bsp/stm32f20x/Drivers/serial.h new file mode 100644 index 0000000000..67eecd4fe5 --- /dev/null +++ b/bsp/stm32f20x/Drivers/serial.h @@ -0,0 +1,70 @@ +/*
+ * File : serial.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard first version
+ * 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
+ */
+#ifndef __RT_HW_SERIAL_H__
+#define __RT_HW_SERIAL_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+/* STM32F10x library definitions */
+#include <stm32f2xx.h>
+
+#define UART_RX_BUFFER_SIZE 64
+#define UART_TX_DMA_NODE_SIZE 4
+
+/* data node for Tx Mode */
+struct stm32_serial_data_node
+{
+ rt_uint8_t *data_ptr;
+ rt_size_t data_size;
+ struct stm32_serial_data_node *next, *prev;
+};
+struct stm32_serial_dma_tx
+{
+ /* DMA Channel */
+ DMA_Stream_TypeDef* dma_channel;
+
+ /* data list head and tail */
+ struct stm32_serial_data_node *list_head, *list_tail;
+
+ /* data node memory pool */
+ struct rt_mempool data_node_mp;
+ rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
+ (sizeof(struct stm32_serial_data_node) + sizeof(void*))];
+};
+
+struct stm32_serial_int_rx
+{
+ rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
+ rt_uint32_t read_index, save_index;
+};
+
+struct stm32_serial_device
+{
+ USART_TypeDef* uart_device;
+
+ /* rx structure */
+ struct stm32_serial_int_rx* int_rx;
+
+ /* tx structure */
+ struct stm32_serial_dma_tx* dma_tx;
+};
+
+rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial);
+
+void rt_hw_serial_isr(rt_device_t device);
+void rt_hw_serial_dma_tx_isr(rt_device_t device);
+
+#endif
diff --git a/bsp/stm32f20x/Drivers/stm32f2_eth.c b/bsp/stm32f20x/Drivers/stm32f2_eth.c new file mode 100644 index 0000000000..ee4543badb --- /dev/null +++ b/bsp/stm32f20x/Drivers/stm32f2_eth.c @@ -0,0 +1,581 @@ +/*
+ * STM32 Eth Driver for RT-Thread
+ * Change Logs:
+ * Date Author Notes
+ * 2009-10-05 Bernard eth interface driver for STM32F107 CL
+ */
+#include <rtthread.h>
+#include <netif/ethernetif.h>
+#include "lwipopts.h"
+#include "stm32f2x7_eth.h"
+#include "stm32f2x7_eth_conf.h"
+
+#define STM32_ETH_DEBUG 0
+#define CHECKSUM_BY_HARDWARE
+
+/* MII and RMII mode selection, for STM322xG-EVAL Board(MB786) RevB ***********/
+//#define MII_MODE
+
+#define RMII_MODE // In this case the System clock frequency is configured
+ // to 100 MHz, for more details refer to system_stm32f2xx.c
+
+#define DP83848_PHY_ADDRESS 0x01 /* Relative to STM322xG-EVAL Board */
+
+#define netifGUARD_BLOCK_TIME 250
+
+/* Ethernet Rx & Tx DMA Descriptors */
+extern ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
+
+/* Ethernet Receive buffers */
+extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE];
+
+/* Ethernet Transmit buffers */
+extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE];
+
+/* Global pointers to track current transmit and receive descriptors */
+extern ETH_DMADESCTypeDef *DMATxDescToSet;
+extern ETH_DMADESCTypeDef *DMARxDescToGet;
+
+/* Global pointer for last received frame infos */
+extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos;
+
+#define MAX_ADDR_LEN 6
+struct rt_stm32_eth
+{
+ /* inherit from ethernet device */
+ struct eth_device parent;
+
+ /* interface address info. */
+ rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
+};
+static struct rt_stm32_eth stm32_eth_device;
+static struct rt_semaphore tx_wait;
+static rt_bool_t tx_is_waiting = RT_FALSE;
+
+static void ETH_MACDMA_Config(void);
+
+static struct rt_semaphore tx_wait;
+
+/* interrupt service routine */
+void ETH_IRQHandler(void)
+{
+ rt_uint32_t status;
+
+ status = ETH->DMASR;
+
+ /* Frame received */
+ if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET)
+ {
+ rt_err_t result;
+ //rt_kprintf("Frame comming\n");
+ /* Clear the interrupt flags. */
+ /* Clear the Eth DMA Rx IT pending bits */
+ ETH_DMAClearITPendingBit(ETH_DMA_IT_R);
+
+ /* a frame has been received */
+ result = eth_device_ready(&(stm32_eth_device.parent));
+ if( result != RT_EOK ) rt_kprintf("RX err =%d\n", result );
+ //RT_ASSERT(result == RT_EOK);
+ }
+ if (ETH_GetDMAITStatus(ETH_DMA_IT_T) == SET) /* packet transmission */
+ {
+ ETH_DMAClearITPendingBit(ETH_DMA_IT_T);
+ }
+
+ ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS);
+//
+
+}
+
+/* RT-Thread Device Interface */
+/* initialize the interface */
+static rt_err_t rt_stm32_eth_init(rt_device_t dev)
+{
+ int i;
+
+ /* MAC address configuration */
+ ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&stm32_eth_device.dev_addr[0]);
+
+ /* Initialize Tx Descriptors list: Chain Mode */
+ ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
+ /* Initialize Rx Descriptors list: Chain Mode */
+ ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+
+ /* Enable Ethernet Rx interrrupt */
+ {
+ for(i=0; i<ETH_RXBUFNB; i++)
+ {
+ ETH_DMARxDescReceiveITConfig(&DMARxDscrTab[i], ENABLE);
+ }
+ }
+
+ #ifdef CHECKSUM_BY_HARDWARE
+ /* Enable the checksum insertion for the Tx frames */
+ {
+ for(i=0; i<ETH_TXBUFNB; i++)
+ {
+ ETH_DMATxDescChecksumInsertionConfig(&DMATxDscrTab[i], ETH_DMATxDesc_ChecksumTCPUDPICMPFull);
+ }
+ }
+ #endif
+
+ {
+ uint16_t tmp, i=10000;
+
+ tmp = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR);
+ ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_CDCTRL1, BIST_CONT_MODE );
+ ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_CR, tmp | BIST_START );//BIST_START
+
+ while(i--);
+
+ //tmp = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR);
+
+ if( ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR) & BIST_STATUS == BIST_STATUS )
+ {
+ rt_kprintf("BIST pass\n");
+ }
+ else
+ {
+ uint16_t ctrl;
+
+ ctrl = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CDCTRL1);
+ rt_kprintf("BIST faild count =%d\n", BIST_ERROR_COUNT(ctrl) );
+ }
+ tmp &= ~BIST_START; //Stop BIST
+ ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_CR, tmp);
+
+
+ }
+
+ /* Enable MAC and DMA transmission and reception */
+ ETH_Start();
+
+ //rt_kprintf("DMASR = 0x%X\n", ETH->DMASR );
+// rt_kprintf("ETH Init\n");
+
+ return RT_EOK;
+}
+
+static rt_err_t rt_stm32_eth_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ return RT_EOK;
+}
+
+static rt_err_t rt_stm32_eth_close(rt_device_t dev)
+{
+ return RT_EOK;
+}
+
+static rt_size_t rt_stm32_eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ rt_set_errno(-RT_ENOSYS);
+ return 0;
+}
+
+static rt_size_t rt_stm32_eth_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+ rt_set_errno(-RT_ENOSYS);
+ return 0;
+}
+
+static rt_err_t rt_stm32_eth_control(rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+ switch(cmd)
+ {
+ case NIOCTL_GADDR:
+ /* get mac address */
+ if(args) rt_memcpy(args, stm32_eth_device.dev_addr, 6);
+ else return -RT_ERROR;
+ break;
+
+ default :
+ break;
+ }
+
+ return RT_EOK;
+}
+
+void show_frame(struct pbuf *q)
+{
+ int i = 0;
+ int j = 0;
+ char *ptr = q->payload;
+
+ for( i = 0; i < q->len; i++ )
+ rt_kprintf("0x%02X ", *(ptr++));
+ rt_kprintf("\n");
+}
+
+/* ethernet device interface */
+/* transmit packet. */
+rt_err_t rt_stm32_eth_tx( rt_device_t dev, struct pbuf* p)
+{
+ rt_err_t ret;
+ struct pbuf *q;
+ uint32_t l = 0;
+ u8 *buffer ;
+
+ if (( ret = rt_sem_take(&tx_wait, netifGUARD_BLOCK_TIME) ) == RT_EOK)
+ {
+ buffer = (u8 *)(DMATxDescToSet->Buffer1Addr);
+ for(q = p; q != NULL; q = q->next)
+ {
+ //show_frame(q);
+ rt_memcpy((u8_t*)&buffer[l], q->payload, q->len);
+ l = l + q->len;
+ }
+ if( ETH_Prepare_Transmit_Descriptors(l) == ETH_ERROR )
+ rt_kprintf("Tx Error\n");
+ //rt_sem_release(xTxSemaphore);
+ rt_sem_release(&tx_wait);
+ //rt_kprintf("Tx packet, len = %d\n", l);
+ }
+ else
+ {
+ rt_kprintf("Tx Timeout\n");
+ return ret;
+ }
+
+ /* Return SUCCESS */
+ return RT_EOK;
+}
+
+/* reception packet. */
+struct pbuf *rt_stm32_eth_rx(rt_device_t dev)
+{
+ struct pbuf *p, *q;
+ u16_t len;
+ uint32_t l=0,i =0;
+ FrameTypeDef frame;
+ static framecnt = 1;
+ u8 *buffer;
+ __IO ETH_DMADESCTypeDef *DMARxNextDesc;
+
+ p = RT_NULL;
+
+// rt_kprintf("ETH rx\n");
+ /* Get received frame */
+ frame = ETH_Get_Received_Frame_interrupt();
+
+ if( frame.length > 0 )
+ {
+ /* check that frame has no error */
+ if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET)
+ {
+ //rt_kprintf("Get a frame %d buf = 0x%X, len= %d\n", framecnt++, frame.buffer, frame.length);
+ /* Obtain the size of the packet and put it into the "len" variable. */
+ len = frame.length;
+ buffer = (u8 *)frame.buffer;
+
+ /* We allocate a pbuf chain of pbufs from the pool. */
+ p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+ //p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
+
+ /* Copy received frame from ethernet driver buffer to stack buffer */
+ if (p != NULL)
+ {
+ for (q = p; q != NULL; q = q->next)
+ {
+ rt_memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len);
+ l = l + q->len;
+ }
+ }
+ }
+
+ /* Release descriptors to DMA */
+ /* Check if received frame with multiple DMA buffer segments */
+ if (DMA_RX_FRAME_infos->Seg_Count > 1)
+ {
+ DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc;
+ }
+ else
+ {
+ DMARxNextDesc = frame.descriptor;
+ }
+
+ /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+ for (i=0; i<DMA_RX_FRAME_infos->Seg_Count; i++)
+ {
+ DMARxNextDesc->Status = ETH_DMARxDesc_OWN;
+ DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr);
+ }
+
+ /* Clear Segment_Count */
+ DMA_RX_FRAME_infos->Seg_Count =0;
+
+
+ /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+ if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)
+ {
+ /* Clear RBUS ETHERNET DMA flag */
+ ETH->DMASR = ETH_DMASR_RBUS;
+
+ /* Resume DMA reception */
+ ETH->DMARPDR = 0;
+ }
+ }
+ return p;
+}
+
+static void NVIC_Configuration(void)
+{
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* 2 bit for pre-emption priority, 2 bits for subpriority */
+ NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
+ /* Enable the Ethernet global Interrupt */
+ NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure);
+}
+
+/*
+ * GPIO Configuration for ETH
+ */
+static void GPIO_Configuration(void)
+{
+
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /* Enable GPIOs clocks */
+ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
+ RCC_AHB1Periph_GPIOC
+ , ENABLE);
+
+ /* Enable SYSCFG clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+
+ /* Configure MCO (PA8) */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
+ //GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_MCO );
+
+#ifdef MII_MODE
+ /* Output PLL clock divided by 2 (25MHz) on MCO pin (PA8) to clock the PHY */
+ RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
+
+ SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
+#elif defined RMII_MODE
+ /* Output PLL clock divided by 2 (50MHz) on MCO pin (PA8) to clock the PHY */
+ //RCC_MCO1Config(RCC_MCO1Source_PLLCLK, RCC_MCO1Div_2);
+
+ SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
+#endif
+
+/* Ethernet pins configuration ************************************************/
+
+ /*
+ ETH_MDIO -------------------------> PA2
+ ETH_MDC --------------------------> PC1
+ ETH_MII_RX_CLK/ETH_RMII_REF_CLK---> PA1
+ ETH_MII_RX_DV/ETH_RMII_CRS_DV ----> PA7
+ ETH_MII_RXD0/ETH_RMII_RXD0 -------> PC4
+ ETH_MII_RXD1/ETH_RMII_RXD1 -------> PC5
+ ETH_MII_TX_EN/ETH_RMII_TX_EN -----> PB11
+ ETH_MII_TXD0/ETH_RMII_TXD0 -------> PB12
+ ETH_MII_TXD1/ETH_RMII_TXD1 -------> PB13
+
+ **** Just for MII Mode ****
+ ETH_MII_CRS ----------------------> PA0
+ ETH_MII_COL ----------------------> PA3
+ ETH_MII_TX_CLK -------------------> PC3
+ ETH_MII_RX_ER --------------------> PB10
+ ETH_MII_RXD2 ---------------------> PB0
+ ETH_MII_RXD3 ---------------------> PB1
+ ETH_MII_TXD2 ---------------------> PC2
+ ETH_MII_TXD3 ---------------------> PB8
+ */
+ /* Configure PC1, PC4 and PC5 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 |GPIO_Pin_4 | GPIO_Pin_5;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
+
+ /* Configure PB11, PB12 and PB13 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_ETH);
+
+ /* Configure PA1, PA2 and PA7 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1|GPIO_Pin_2 | GPIO_Pin_7;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
+
+#ifdef MII_MODE
+ /* Configure PC2, PC3 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 |GPIO_Pin_3;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource2, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_ETH);
+
+ /* Configure PB0, PB1, PB10 and PB8 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1, GPIO_Pin_10 | GPIO_Pin_8;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource0, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_ETH);
+
+ /* Configure PA0, PA3 */
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_3;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_ETH);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_ETH);
+#endif
+
+
+}
+
+/**
+ * @brief Configures the Ethernet Interface
+ * @param None
+ * @retval None
+ */
+static void ETH_MACDMA_Config(void)
+{
+ ETH_InitTypeDef ETH_InitStructure;
+
+ /* Enable ETHERNET clock */
+ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
+ RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
+
+ /* Reset ETHERNET on AHB Bus */
+ ETH_DeInit();
+
+ /* Software reset */
+ ETH_SoftwareReset();
+
+ /* Wait for software reset */
+ while (ETH_GetSoftwareResetStatus() == SET);
+
+ /* ETHERNET Configuration --------------------------------------------------*/
+ /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
+ ETH_StructInit(Ð_InitStructure);
+
+ /* Fill ETH_InitStructure parametrs */
+ /*------------------------ MAC -----------------------------------*/
+ ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
+ //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
+ // ETH_InitStructure.ETH_Speed = ETH_Speed_10M;
+ // ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
+
+ ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
+ ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
+ ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
+ ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
+ ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
+ ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
+ ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
+ ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
+#ifdef CHECKSUM_BY_HARDWARE
+ ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
+#endif
+
+ /*------------------------ DMA -----------------------------------*/
+
+ /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
+ the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
+ if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
+ ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
+ ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
+ ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
+
+ ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+ ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
+ ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
+ ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
+ ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
+ ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
+ ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
+ ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
+
+ /* Configure Ethernet */
+ if( ETH_Init(Ð_InitStructure, DP83848_PHY_ADDRESS) == ETH_ERROR )
+ rt_kprintf("ETH init error, may be no link\n");
+
+ /* Enable the Ethernet Rx Interrupt */
+ ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R , ENABLE);
+}
+
+#define DevID_SNo0 (*((rt_uint32_t *)0x1FFF7A10));
+#define DevID_SNo1 (*((rt_uint32_t *)0x1FFF7A10+32));
+#define DevID_SNo2 (*((rt_uint32_t *)0x1FFF7A10+64));
+void rt_hw_stm32_eth_init(void)
+{
+ GPIO_Configuration();
+ NVIC_Configuration();
+ ETH_MACDMA_Config();
+
+ stm32_eth_device.dev_addr[0] = 0x00;
+ stm32_eth_device.dev_addr[1] = 0x60;
+ stm32_eth_device.dev_addr[2] = 0x6e;
+ {
+ uint32_t cpu_id[3] = {0};
+ cpu_id[2] = DevID_SNo2; cpu_id[1] = DevID_SNo1; cpu_id[0] = DevID_SNo0;
+
+ // generate MAC addr from 96bit unique ID (only for test)
+ stm32_eth_device.dev_addr[3] = (uint8_t)((cpu_id[0]>>16)&0xFF);
+ stm32_eth_device.dev_addr[4] = (uint8_t)((cpu_id[0]>>8)&0xFF);
+ stm32_eth_device.dev_addr[5] = (uint8_t)(cpu_id[0]&0xFF);
+
+// stm32_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+7);
+// stm32_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+8);
+// stm32_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+9);
+ }
+
+ stm32_eth_device.parent.parent.init = rt_stm32_eth_init;
+ stm32_eth_device.parent.parent.open = rt_stm32_eth_open;
+ stm32_eth_device.parent.parent.close = rt_stm32_eth_close;
+ stm32_eth_device.parent.parent.read = rt_stm32_eth_read;
+ stm32_eth_device.parent.parent.write = rt_stm32_eth_write;
+ stm32_eth_device.parent.parent.control = rt_stm32_eth_control;
+ stm32_eth_device.parent.parent.user_data = RT_NULL;
+
+ stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx;
+ stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx;
+
+ /* init tx semaphore */
+ rt_sem_init(&tx_wait, "tx_wait", 1, RT_IPC_FLAG_FIFO);
+
+ /* register eth device */
+ eth_device_init(&(stm32_eth_device.parent), "e0");
+}
+static char led = 0;
+
+void dp83483()
+{
+ uint16_t bsr,sts, bcr, phycr;
+
+ bsr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BSR);
+ sts = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_SR);
+ bcr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_BCR);
+ phycr = ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_CR);
+
+ rt_kprintf("BCR = 0x%X\tBSR = 0x%X\tPHY_STS = 0x%X\tPHY_CR = 0x%X\n", bcr,bsr,sts, phycr);
+
+ rt_kprintf("PHY_FCSCR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_FCSCR ) );
+ rt_kprintf("PHY_MISR = 0x%X\n", ETH_ReadPHYRegister(DP83848_PHY_ADDRESS, PHY_MISR ) );
+
+ rt_kprintf("DMASR = 0x%X\n", ETH->DMASR );
+
+ //ETH_WritePHYRegister(DP83848_PHY_ADDRESS, PHY_LEDCR, (uint16_t)(0x38 | led));
+ led = (led==7)?0:7;
+
+}
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+FINSH_FUNCTION_EXPORT(dp83483, Show PHY register.);
+#endif
diff --git a/bsp/stm32f20x/Drivers/stm32f2xx_conf.h b/bsp/stm32f20x/Drivers/stm32f2xx_conf.h new file mode 100644 index 0000000000..e0e84209de --- /dev/null +++ b/bsp/stm32f20x/Drivers/stm32f2xx_conf.h @@ -0,0 +1,88 @@ +/**
+ ******************************************************************************
+ * @file USART/USART_Printf/stm32f2xx_conf.h
+ * @author MCD Application Team
+ * @version V1.0.0
+ * @date 18-April-2011
+ * @brief Library configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F2xx_CONF_H
+#define __STM32F2xx_CONF_H
+
+/* Includes ------------------------------------------------------------------*/
+/* Uncomment the line below to enable peripheral header file inclusion */
+#include "stm32f2xx_adc.h"
+#include "stm32f2xx_can.h"
+#include "stm32f2xx_crc.h"
+#include "stm32f2xx_cryp.h"
+#include "stm32f2xx_dac.h"
+#include "stm32f2xx_dbgmcu.h"
+#include "stm32f2xx_dcmi.h"
+#include "stm32f2xx_dma.h"
+#include "stm32f2xx_exti.h"
+#include "stm32f2xx_flash.h"
+#include "stm32f2xx_fsmc.h"
+#include "stm32f2xx_hash.h"
+#include "stm32f2xx_gpio.h"
+#include "stm32f2xx_i2c.h"
+#include "stm32f2xx_iwdg.h"
+#include "stm32f2xx_pwr.h"
+#include "stm32f2xx_rcc.h"
+#include "stm32f2xx_rng.h"
+#include "stm32f2xx_rtc.h"
+#include "stm32f2xx_sdio.h"
+#include "stm32f2xx_spi.h"
+#include "stm32f2xx_syscfg.h"
+#include "stm32f2xx_tim.h"
+#include "stm32f2xx_usart.h"
+#include "stm32f2xx_wwdg.h"
+#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* If an external clock source is used, then the value of the following define
+ should be set to the value of the external clock source, else, if no external
+ clock is used, keep this define commented */
+/*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
+
+
+/* Uncomment the line below to expanse the "assert_param" macro in the
+ Standard Peripheral Library drivers code */
+/* #define USE_FULL_ASSERT 1 */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0)
+#endif /* USE_FULL_ASSERT */
+
+#endif /* __STM32F2xx_CONF_H */
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32f20x/Drivers/stm32f2xx_it.c b/bsp/stm32f20x/Drivers/stm32f2xx_it.c new file mode 100644 index 0000000000..8d623197e5 --- /dev/null +++ b/bsp/stm32f20x/Drivers/stm32f2xx_it.c @@ -0,0 +1,156 @@ +/**
+ ******************************************************************************
+ * @file Project/STM32F2xx_StdPeriph_Template/stm32f2xx_it.c
+ * @author MCD Application Team
+ * @version V1.0.0
+ * @date 18-April-2011
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+ *
+ * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f2xx.h"
+#include <rtthread.h>
+#include "board.h"
+
+
+/** @addtogroup Template_Project
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************/
+/* Cortex-M3 Processor Exceptions Handlers */
+/******************************************************************************/
+
+/**
+ * @brief This function handles NMI exception.
+ * @param None
+ * @retval None
+ */
+void NMI_Handler(void)
+{
+}
+
+/**
+ * @brief This function handles Memory Manage exception.
+ * @param None
+ * @retval None
+ */
+void MemManage_Handler(void)
+{
+ /* Go to infinite loop when Memory Manage exception occurs */
+ while (1)
+ {
+ }
+}
+
+/**
+ * @brief This function handles Bus Fault exception.
+ * @param None
+ * @retval None
+ */
+void BusFault_Handler(void)
+{
+ /* Go to infinite loop when Bus Fault exception occurs */
+ while (1)
+ {
+ }
+}
+
+/**
+ * @brief This function handles Usage Fault exception.
+ * @param None
+ * @retval None
+ */
+void UsageFault_Handler(void)
+{
+ /* Go to infinite loop when Usage Fault exception occurs */
+ while (1)
+ {
+ }
+}
+
+/**
+ * @brief This function handles SVCall exception.
+ * @param None
+ * @retval None
+ */
+void SVC_Handler(void)
+{
+}
+
+/**
+ * @brief This function handles Debug Monitor exception.
+ * @param None
+ * @retval None
+ */
+void DebugMon_Handler(void)
+{
+}
+
+/******************************************************************************/
+/* STM32F2xx Peripherals Interrupt Handlers */
+/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
+/* available peripheral interrupt handler's name please refer to the startup */
+/* file (startup_stm32f2xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles PPP interrupt request.
+ * @param None
+ * @retval None
+ */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/**
+ * @}
+ */
+
+#if defined(RT_USING_DFS) && STM32_USE_SDIO
+/*******************************************************************************
+* Function Name : SDIO_IRQHandler
+* Description : This function handles SDIO global interrupt request.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SDIO_IRQHandler(void)
+{
+ extern int SD_ProcessIRQSrc(void);
+
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ /* Process All SDIO Interrupt Sources */
+ if( SD_ProcessIRQSrc() == 2)
+ rt_kprintf("SD Error\n");
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+#endif
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm32f20x/Drivers/usart.c b/bsp/stm32f20x/Drivers/usart.c new file mode 100644 index 0000000000..7687a9831c --- /dev/null +++ b/bsp/stm32f20x/Drivers/usart.c @@ -0,0 +1,281 @@ +/*
+ * File : usart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard the first version
+ * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
+ */
+
+#include "usart.h"
+#include <serial.h>
+#include <stm32f2xx.h>
+#include <stm32f2xx_dma.h>
+
+/*
+ * Use UART1 as console output and finsh input
+ * interrupt Rx and poll Tx (stream mode)
+ *
+ * Use UART2 with interrupt Rx and poll Tx
+ * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
+ *
+ * USART DMA setting on STM32
+ * USART1 Tx --> DMA Channel 4
+ * USART1 Rx --> DMA Channel 5
+ * USART2 Tx --> DMA Channel 7
+ * USART2 Rx --> DMA Channel 6
+ * USART3 Tx --> DMA Channel 2
+ * USART3 Rx --> DMA Channel 3
+ */
+
+#ifdef RT_USING_UART1
+struct stm32_serial_int_rx uart1_int_rx;
+struct stm32_serial_device uart1 =
+{
+ USART1,
+ &uart1_int_rx,
+ RT_NULL
+};
+struct rt_device uart1_device;
+#endif
+
+#ifdef RT_USING_UART6
+struct stm32_serial_int_rx uart6_int_rx;
+struct stm32_serial_device uart6 =
+{
+ USART6,
+ &uart6_int_rx,
+ RT_NULL
+};
+struct rt_device uart6_device;
+#endif
+
+#ifdef RT_USING_UART2
+struct stm32_serial_int_rx uart2_int_rx;
+struct stm32_serial_device uart2 =
+{
+ USART2,
+ &uart2_int_rx,
+ RT_NULL
+};
+struct rt_device uart2_device;
+#endif
+
+#ifdef RT_USING_UART3
+struct stm32_serial_int_rx uart3_int_rx;
+struct stm32_serial_dma_tx uart3_dma_tx;
+struct stm32_serial_device uart3 =
+{
+ USART3,
+ &uart3_int_rx,
+ &uart3_dma_tx
+};
+struct rt_device uart3_device;
+#endif
+
+#define USART1_DR_Base 0x40013804
+#define USART2_DR_Base 0x40004404
+#define USART3_DR_Base 0x40004804
+
+/* USART1_REMAP = 0 */
+#define UART1_GPIO_TX GPIO_Pin_9
+#define UART1_GPIO_RX GPIO_Pin_10
+#define UART1_GPIO GPIOA
+#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
+#define UART1_TX_DMA DMA1_Channel4
+#define UART1_RX_DMA DMA1_Channel5
+
+#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
+#define UART2_GPIO_TX GPIO_Pin_5
+#define UART2_GPIO_RX GPIO_Pin_6
+#define UART2_GPIO GPIOD
+#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
+#else /* for STM32F10X_HD */
+/* USART2_REMAP = 0 */
+#define UART2_GPIO_TX GPIO_Pin_2
+#define UART2_GPIO_RX GPIO_Pin_3
+#define UART2_GPIO GPIOA
+#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
+#define UART2_TX_DMA DMA1_Channel7
+#define UART2_RX_DMA DMA1_Channel6
+#endif
+
+/* USART3_REMAP[1:0] = 00 */
+#define UART3_GPIO_RX GPIO_Pin_11
+#define UART3_GPIO_TX GPIO_Pin_10
+#define UART3_GPIO GPIOB
+#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
+#define UART3_TX_DMA DMA1_Channel2
+#define UART3_RX_DMA DMA1_Channel3
+
+/* USART6_REMAP = 0 */
+#define UART6_GPIO_TX GPIO_Pin_6
+#define UART6_GPIO_RX GPIO_Pin_7
+#define UART6_GPIO GPIOC
+#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6
+//#define UART1_TX_DMA DMA1_Channel?
+//#define UART1_RX_DMA DMA1_Channel?
+
+static void RCC_Configuration(void)
+{
+#ifdef RT_USING_UART1
+ /* Enable USART1 and GPIOA clocks */
+ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
+#endif
+
+#ifdef RT_USING_UART6
+ /* Enable USART6 and GPIOC clocks */
+ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
+#endif
+}
+
+static void GPIO_Configuration(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+#ifdef RT_USING_UART1
+ GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
+ GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
+ GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
+
+ GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10;
+ GPIO_Init(GPIOA,&GPIO_InitStruct);
+
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
+#endif
+
+#ifdef RT_USING_UART6
+ GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
+ GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
+ GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
+
+ GPIO_InitStruct.GPIO_Pin=UART6_GPIO_TX|UART6_GPIO_RX;
+ GPIO_Init(UART6_GPIO,&GPIO_InitStruct);
+
+ GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource6, GPIO_AF_USART6);
+ GPIO_PinAFConfig(UART6_GPIO, GPIO_PinSource7, GPIO_AF_USART6);
+#endif
+}
+
+static void NVIC_Configuration(void)
+{
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+#ifdef RT_USING_UART1
+ /* Enable the USART1 Interrupt */
+ NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure);
+#endif
+
+#ifdef RT_USING_UART6
+ /* Enable the USART1 Interrupt */
+ NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ NVIC_Init(&NVIC_InitStructure);
+#endif
+}
+
+/*
+ * Init all related hardware in here
+ * rt_hw_serial_init() will register all supported USART device
+ */
+void rt_hw_usart_init()
+{
+ USART_InitTypeDef USART_InitStructure;
+
+ RCC_Configuration();
+
+ GPIO_Configuration();
+
+ NVIC_Configuration();
+
+ /* uart init */
+#ifdef RT_USING_UART1
+ USART_DeInit(USART1);
+ USART_InitStructure.USART_BaudRate = 115200;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No ;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+
+ USART_Init(USART1, &USART_InitStructure);
+
+ /* register uart1 */
+ rt_hw_serial_register(&uart1_device, "uart1",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+ &uart1);
+
+ /* enable interrupt */
+ USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
+ /* Enable USART1 */
+ USART_Cmd(USART1, ENABLE);
+ USART_ClearFlag(USART1,USART_FLAG_TXE);
+#endif
+
+ /* uart init */
+#ifdef RT_USING_UART6
+ USART_DeInit(USART6);
+ USART_InitStructure.USART_BaudRate = 115200;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No ;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+
+ USART_Init(USART6, &USART_InitStructure);
+
+ /* register uart1 */
+ rt_hw_serial_register(&uart6_device, "uart6",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+ &uart6);
+
+ /* enable interrupt */
+ USART_ITConfig(USART6, USART_IT_RXNE, ENABLE);
+ /* Enable USART6 */
+ USART_Cmd(USART6, ENABLE);
+ USART_ClearFlag(USART6,USART_FLAG_TXE);
+#endif
+}
+
+#ifdef RT_USING_UART1
+void USART1_IRQHandler()
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ rt_hw_serial_isr(&uart1_device);
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+#endif
+
+#ifdef RT_USING_UART6
+void USART6_IRQHandler()
+{
+ /* enter interrupt */
+ rt_interrupt_enter();
+
+ rt_hw_serial_isr(&uart6_device);
+
+ /* leave interrupt */
+ rt_interrupt_leave();
+}
+#endif
diff --git a/bsp/stm32f20x/Drivers/usart.h b/bsp/stm32f20x/Drivers/usart.h new file mode 100644 index 0000000000..36c5f19b1e --- /dev/null +++ b/bsp/stm32f20x/Drivers/usart.h @@ -0,0 +1,23 @@ +/*
+ * File : usart.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard the first version
+ */
+
+#ifndef __USART_H__
+#define __USART_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+void rt_hw_usart_init(void);
+
+#endif
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