[bsp][stm32l476-nucleo] format code

4 files changed, 88 insertions, 48 deletions

diff --git a/bsp/stm32l476-nucleo/applications/main.c b/bsp/stm32l476-nucleo/applications/main.c
index 2ed011d010..5f289cf43d 100644
--- a/bsp/stm32l476-nucleo/applications/main.c
+++ b/bsp/stm32l476-nucleo/applications/main.c
@@ -21,9 +21,12 @@
  * Date           Author       Notes
  * 2018-05-14     ZYH          first implementation
  */
+ 
 #include <stdio.h>
+
 int main(void)
 {
     printf("Hello RT-Thread\n");
+
     return 0;
 }
diff --git a/bsp/stm32l476-nucleo/drivers/board.c b/bsp/stm32l476-nucleo/drivers/board.c
index 7f40dc2f0c..063e5806ff 100644
--- a/bsp/stm32l476-nucleo/drivers/board.c
+++ b/bsp/stm32l476-nucleo/drivers/board.c
@@ -21,75 +21,75 @@
  * Date           Author       Notes
  * 2018-05-14     ZYH          first implementation
  */
+
 #include <stdint.h>
 #include <rthw.h>
 #include <rtthread.h>
 #include "board.h"
+
 #ifdef BSP_USING_HSI
     #error Can not using HSI on this bsp
 #endif
 
 static void SystemClock_Config(void)
 {
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+    RCC_PeriphCLKInitTypeDef PeriphClkInit;
 
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInit;
-
-    /**Initializes the CPU, AHB and APB busses clocks 
+    /**Initializes the CPU, AHB and APB busses clocks
     */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_MSI;
-  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
-  RCC_OscInitStruct.MSICalibrationValue = 0;
-  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
-  RCC_OscInitStruct.PLL.PLLM = 1;
-  RCC_OscInitStruct.PLL.PLLN = 40;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+    RCC_OscInitStruct.MSICalibrationValue = 0;
+    RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 40;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
-    /**Initializes the CPU, AHB and APB busses clocks 
+    /**Initializes the CPU, AHB and APB busses clocks
     */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
 
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
-                              |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4
-                              |RCC_PERIPHCLK_UART5|RCC_PERIPHCLK_LPUART1
-                              |RCC_PERIPHCLK_USB;
-  PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
-  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
-  PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
-  PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
-  PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1;
-  PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
-  PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
-  PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
-  PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
-  PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
-  PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
-  PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
-  PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
-  PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
-  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2
+                                         | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4
+                                         | RCC_PERIPHCLK_UART5 | RCC_PERIPHCLK_LPUART1
+                                         | RCC_PERIPHCLK_USB;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+    PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+    PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
+    PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1;
+    PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+    PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
+    PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
+    PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
+    PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
+    PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
+    PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
+    PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
+    PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
+    HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
 
-    /**Configure the main internal regulator output voltage 
+    /**Configure the main internal regulator output voltage
     */
-  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+    HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
 
 }
 
-
 void SysTick_Handler(void)
 {
     /* enter interrupt */
@@ -157,6 +157,7 @@ void HAL_MspInit(void)
     /* PendSV_IRQn interrupt configuration */
     HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 }
+
 /**
  * This function will initial STM32 board.
  */
diff --git a/bsp/stm32l476-nucleo/drivers/drv_gpio.c b/bsp/stm32l476-nucleo/drivers/drv_gpio.c
index 6d8c785193..92b4697dd1 100644
--- a/bsp/stm32l476-nucleo/drivers/drv_gpio.c
+++ b/bsp/stm32l476-nucleo/drivers/drv_gpio.c
@@ -479,6 +479,7 @@ struct pin_irq_map
     rt_uint16_t pinbit;
     IRQn_Type irqno;
 };
+
 static const struct pin_irq_map pin_irq_map[] =
 {
     {GPIO_PIN_0, EXTI0_IRQn},
@@ -498,6 +499,7 @@ static const struct pin_irq_map pin_irq_map[] =
     {GPIO_PIN_14, EXTI15_10_IRQn},
     {GPIO_PIN_15, EXTI15_10_IRQn},
 };
+
 struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
 {
     {-1, 0, RT_NULL, RT_NULL},
@@ -621,6 +623,7 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
 
     HAL_GPIO_Init(index->gpio, &GPIO_InitStruct);
 }
+
 rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
 {
     int i;
@@ -633,6 +636,7 @@ rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
     }
     return -1;
 }
+
 rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
 {
     rt_int32_t mapindex = bit2bitno(pinbit);
@@ -642,6 +646,7 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
     }
     return &pin_irq_map[mapindex];
 };
+
 rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
                               rt_uint32_t mode, void (*hdr)(void *args), void *args)
 {
@@ -682,6 +687,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
 
     return RT_EOK;
 }
+
 rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
 {
     const struct pin_index *index;
@@ -713,6 +719,7 @@ rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
 
     return RT_EOK;
 }
+
 rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
                               rt_uint32_t enabled)
 {
@@ -780,6 +787,7 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
 
     return RT_EOK;
 }
+
 const static struct rt_pin_ops _stm32_pin_ops =
 {
     stm32_pin_mode,
@@ -818,30 +826,35 @@ void EXTI0_IRQHandler(void)
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
     rt_interrupt_leave();
 }
+
 void EXTI1_IRQHandler(void)
 {
     rt_interrupt_enter();
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
     rt_interrupt_leave();
 }
+
 void EXTI2_IRQHandler(void)
 {
     rt_interrupt_enter();
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
     rt_interrupt_leave();
 }
+
 void EXTI3_IRQHandler(void)
 {
     rt_interrupt_enter();
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
     rt_interrupt_leave();
 }
+
 void EXTI4_IRQHandler(void)
 {
     rt_interrupt_enter();
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
     rt_interrupt_leave();
 }
+
 void EXTI9_5_IRQHandler(void)
 {
     rt_interrupt_enter();
@@ -852,6 +865,7 @@ void EXTI9_5_IRQHandler(void)
     HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
     rt_interrupt_leave();
 }
+
 void EXTI15_10_IRQHandler(void)
 {
     rt_interrupt_enter();
diff --git a/bsp/stm32l476-nucleo/drivers/drv_usart.c b/bsp/stm32l476-nucleo/drivers/drv_usart.c
index 0f4dab8528..c5f5e728a3 100644
--- a/bsp/stm32l476-nucleo/drivers/drv_usart.c
+++ b/bsp/stm32l476-nucleo/drivers/drv_usart.c
@@ -24,11 +24,13 @@
 * 2016-01-15     ArdaFu       the first version for stm32f4xx with STM32 HAL
 * 2016-01-15     zyh          the first version for stm32f401rc with STM32 HAL
 */
+
 #include "drv_usart.h"
 #include "board.h"
 #include <rtdevice.h>
 #include <rthw.h>
 #include <rtthread.h>
+
 /* STM32 uart driver */
 struct drv_uart
 {
@@ -40,14 +42,17 @@ static rt_err_t drv_configure(struct rt_serial_device *serial,
                               struct serial_configure *cfg)
 {
     struct drv_uart *uart;
+
     RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
+
     uart = (struct drv_uart *)serial->parent.user_data;
     uart->UartHandle.Init.BaudRate   = cfg->baud_rate;
     uart->UartHandle.Init.HwFlowCtl  = UART_HWCONTROL_NONE;
     uart->UartHandle.Init.Mode       = UART_MODE_TX_RX;
     uart->UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
     uart->UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+
     switch (cfg->data_bits)
     {
     case DATA_BITS_8:
@@ -60,6 +65,7 @@ static rt_err_t drv_configure(struct rt_serial_device *serial,
         uart->UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
         break;
     }
+
     switch (cfg->stop_bits)
     {
     case STOP_BITS_1:
@@ -72,6 +78,7 @@ static rt_err_t drv_configure(struct rt_serial_device *serial,
         uart->UartHandle.Init.StopBits   = UART_STOPBITS_1;
         break;
     }
+
     switch (cfg->parity)
     {
     case PARITY_NONE:
@@ -87,10 +94,12 @@ static rt_err_t drv_configure(struct rt_serial_device *serial,
         uart->UartHandle.Init.Parity     = UART_PARITY_NONE;
         break;
     }
+
     if (HAL_UART_Init(&uart->UartHandle) != HAL_OK)
     {
         return RT_ERROR;
     }
+
     return RT_EOK;
 }
 
@@ -98,8 +107,11 @@ static rt_err_t drv_control(struct rt_serial_device *serial,
                             int cmd, void *arg)
 {
     struct drv_uart *uart;
+
     RT_ASSERT(serial != RT_NULL);
+
     uart = (struct drv_uart *)serial->parent.user_data;
+
     switch (cmd)
     {
     case RT_DEVICE_CTRL_CLR_INT:
@@ -108,6 +120,7 @@ static rt_err_t drv_control(struct rt_serial_device *serial,
         /* disable interrupt */
         __HAL_UART_DISABLE_IT(&uart->UartHandle, UART_IT_RXNE);
         break;
+
     case RT_DEVICE_CTRL_SET_INT:
         /* enable rx irq */
         HAL_NVIC_SetPriority(uart->irq, 5, 0);
@@ -116,16 +129,21 @@ static rt_err_t drv_control(struct rt_serial_device *serial,
         __HAL_UART_ENABLE_IT(&uart->UartHandle, UART_IT_RXNE);
         break;
     }
+
     return RT_EOK;
 }
 
 static int drv_putc(struct rt_serial_device *serial, char c)
 {
     struct drv_uart *uart;
+
     RT_ASSERT(serial != RT_NULL);
+
     uart = (struct drv_uart *)serial->parent.user_data;
+
     while ((__HAL_UART_GET_FLAG(&uart->UartHandle, UART_FLAG_TXE) == RESET));
     uart->UartHandle.Instance->TDR = c;
+
     return 1;
 }
 
@@ -133,11 +151,15 @@ static int drv_getc(struct rt_serial_device *serial)
 {
     int ch;
     struct drv_uart *uart;
+
     RT_ASSERT(serial != RT_NULL);
+
     uart = (struct drv_uart *)serial->parent.user_data;
+
     ch = -1;
     if (__HAL_UART_GET_FLAG(&uart->UartHandle, UART_FLAG_RXNE) != RESET)
         ch = uart->UartHandle.Instance->RDR & 0xff;
+
     return ch;
 }