summaryrefslogtreecommitdiff
path: root/bsp
diff options
context:
space:
mode:
authorlzp <[email protected]>2018-03-28 14:40:05 +0800
committerlzp <[email protected]>2018-03-28 14:40:05 +0800
commit342f883acbde330afd39f7456ac632b36f5dcc24 (patch)
tree1cf79e8b26c778954840dc0ab391aa05aacc6a0e /bsp
parentc6a5a2a3864e54d773afd207f3da7d159415d151 (diff)
[BSP]NUC472
1.增加MDK4工程 2.修复GCC的链接文件 栈内存与动态内存地址重复 3.修复EMAC驱动宏错误
Diffstat (limited to 'bsp')
-rw-r--r--bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c6
-rw-r--r--bsp/nuvoton_nuc472/README.md2
-rw-r--r--bsp/nuvoton_nuc472/drivers/board.c4
-rw-r--r--bsp/nuvoton_nuc472/drivers/nuc472_eth.c6
-rw-r--r--bsp/nuvoton_nuc472/ldscripts/libs.ld8
-rw-r--r--bsp/nuvoton_nuc472/ldscripts/mem.ld25
-rw-r--r--bsp/nuvoton_nuc472/ldscripts/sections.ld386
-rw-r--r--bsp/nuvoton_nuc472/project.uvproj1153
-rw-r--r--bsp/nuvoton_nuc472/template.uvproj407
9 files changed, 1640 insertions, 357 deletions
diff --git a/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c b/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
index c4bc353cf6..388f88671f 100644
--- a/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
+++ b/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
@@ -150,9 +150,9 @@ extern unsigned char _sdata;
// End address for the .data section// defined in linker script
extern unsigned char _edata;
// Begin address for the .bss section// defined in linker script
-extern unsigned char __bss_start__;
+extern unsigned char __bss_start;
// End address for the .bss section// defined in linker script
-extern unsigned char __bss_end__;
+extern unsigned char __bss_end;
extern int entry(void);
@@ -333,7 +333,7 @@ pHandler g_pfnVectors[] =
void _start()
{
memcpy(&_sdata, &_sidata, &_edata - &_sdata);
- memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__);
+ memset(&__bss_start, 0, &__bss_end - &__bss_start);
}
static void Reset_Handler(void)
diff --git a/bsp/nuvoton_nuc472/README.md b/bsp/nuvoton_nuc472/README.md
index a3febd4e36..5bc4e9c7b3 100644
--- a/bsp/nuvoton_nuc472/README.md
+++ b/bsp/nuvoton_nuc472/README.md
@@ -3,7 +3,7 @@
NuTiny-EVB-NUC472
## note:
- support the GCC MDK5 IAR
+ support the GCC MDK4 MDK5 IAR
**TODO**
diff --git a/bsp/nuvoton_nuc472/drivers/board.c b/bsp/nuvoton_nuc472/drivers/board.c
index f8135a795e..3184e138f9 100644
--- a/bsp/nuvoton_nuc472/drivers/board.c
+++ b/bsp/nuvoton_nuc472/drivers/board.c
@@ -22,7 +22,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
-extern int __bss_end__;
+extern int __bss_end;
#endif
/**
@@ -80,7 +80,7 @@ void rt_hw_board_init(void)
rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
#else
/* init memory system */
- rt_system_heap_init((void*)&__bss_end__, (void*)SRAM_END);
+ rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
#endif
#endif /* RT_USING_HEAP */
diff --git a/bsp/nuvoton_nuc472/drivers/nuc472_eth.c b/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
index de9f32eedd..e082669ca8 100644
--- a/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
+++ b/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
@@ -181,7 +181,7 @@ static void init_rx_desc(rt_nuc472_emac_t emac)
emac->rx_desc[i].status1 = OWNERSHIP_EMAC;
emac->rx_desc[i].buf = &emac->rx_buf[i][0];
emac->rx_desc[i].status2 = 0;
- emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % TX_DESCRIPTOR_NUM];
+ emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % RX_DESCRIPTOR_NUM];
}
emac_base->RXDSA = (unsigned int)&emac->rx_desc[0];
return;
@@ -205,8 +205,8 @@ static void set_mac_addr(rt_nuc472_emac_t emac, rt_uint8_t *addr)
void EMAC_init(rt_nuc472_emac_t emac, rt_uint8_t *mac_addr)
{
+ EMAC_T *emac_base = emac->emac_base;
RT_ASSERT(emac->dev_addr != RT_NULL);
- EMAC_T *emac_base = emac->emac_base;
CLK_EnableModuleClock(EMAC_MODULE);
@@ -445,12 +445,12 @@ rt_err_t rt_nuc472_emac_tx(rt_device_t dev, struct pbuf* p)
struct pbuf *rt_nuc472_emac_rx(rt_device_t dev)
{
rt_nuc472_emac_t emac = (rt_nuc472_emac_t)dev;
+ unsigned int status;
struct pbuf* p;
/* init p pointer */
p = RT_NULL;
- unsigned int status;
status = emac->cur_rx_desc_ptr->status1;
if(status & OWNERSHIP_EMAC)
diff --git a/bsp/nuvoton_nuc472/ldscripts/libs.ld b/bsp/nuvoton_nuc472/ldscripts/libs.ld
deleted file mode 100644
index 70fea89265..0000000000
--- a/bsp/nuvoton_nuc472/ldscripts/libs.ld
+++ /dev/null
@@ -1,8 +0,0 @@
-
-/*
- * Placeholder to list other libraries required by the application.
-
-GROUP(
-)
-
- */
diff --git a/bsp/nuvoton_nuc472/ldscripts/mem.ld b/bsp/nuvoton_nuc472/ldscripts/mem.ld
deleted file mode 100644
index 351c8f767a..0000000000
--- a/bsp/nuvoton_nuc472/ldscripts/mem.ld
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Memory Spaces Definitions.
- *
- * Need modifying for a specific board.
- * FLASH.ORIGIN: starting address of flash
- * FLASH.LENGTH: length of flash
- * RAM.ORIGIN: starting address of RAM bank 0
- * RAM.LENGTH: length of RAM bank 0
- *
- * The values below can be addressed in further linker scripts
- * using functions like 'ORIGIN(RAM)' or 'LENGTH(RAM)'.
- */
-
-MEMORY
-{
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
- FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K /*4K*/
-}
-
-/*
- * For external ram use something like:
-
- RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 8K
-
- */
diff --git a/bsp/nuvoton_nuc472/ldscripts/sections.ld b/bsp/nuvoton_nuc472/ldscripts/sections.ld
index d7989ad7f9..9e7ed857ca 100644
--- a/bsp/nuvoton_nuc472/ldscripts/sections.ld
+++ b/bsp/nuvoton_nuc472/ldscripts/sections.ld
@@ -1,129 +1,32 @@
/*
- * Default linker script for Cortex-M
- *
- * To make use of the multi-region initialisations, define
- * OS_INCLUDE_STARTUP_INIT_MULTIPLE_RAM_SECTIONS for the _startup.c file.
+ * linker script for STM32F10x with GNU ld
+ * bernard.xiong 2009-10-14
*/
-/*
- * The '__stack' definition is required by crt0, do not remove it.
- */
-__stack = ORIGIN(RAM) + LENGTH(RAM);
-
-_estack = __stack; /* STM specific definition */
-
-/*
- * Default stack sizes.
- * These are used by the startup in order to allocate stacks
- * for the different modes.
- */
-
-__Main_Stack_Size = 1024 ;
-
-PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;
-
-__Main_Stack_Limit = __stack - __Main_Stack_Size ;
-
-/* "PROVIDE" allows to easily override these values from an
- * object file or the command line. */
-PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;
-
-/*
- * There will be a link error if there is not this amount of
- * RAM free at the end.
- */
-_Minimum_Stack_Size = 256 ;
-
-/*
- * Default heap definitions.
- * The heap start immediately after the last statically allocated
- * .sbss/.noinit section, and extends up to the main stack limit.
- */
-PROVIDE ( _Heap_Begin = _end_noinit ) ;
-PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;
-
-/*
- * The entry point is informative, for debuggers and simulators,
- * since the Cortex-M vector points to it anyway.
- */
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 128K sram */
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 512KB flash */
+}
ENTRY(_start)
-
-
-/* Sections Definitions */
+_system_stack_size = 0x400;
SECTIONS
{
- /*
- * For Cortex-M devices, the beginning of the startup code is stored in
- * the .isr_vector section, which goes to FLASH.
- */
- .isr_vector : ALIGN(4)
- {
- FILL(0xFF)
-
- __vectors_start = ABSOLUTE(.) ;
- __vectors_start__ = ABSOLUTE(.) ; /* STM specific definition */
- KEEP(*(.isr_vector)) /* Interrupt vectors */
-
- KEEP(*(.cfmconfig)) /* Freescale configuration words */
-
- /*
- * This section is here for convenience, to store the
- * startup code at the beginning of the flash area, hoping that
- * this will increase the readability of the listing.
- */
- *(.after_vectors .after_vectors.*) /* Startup code and ISR */
-
- } >FLASH
-
- .inits : ALIGN(4)
+ .text :
{
- /*
- * Memory regions initialisation arrays.
- *
- * Thee are two kinds of arrays for each RAM region, one for
- * data and one for bss. Each is iterrated at startup and the
- * region initialisation is performed.
- *
- * The data array includes:
- * - from (LOADADDR())
- * - region_begin (ADDR())
- * - region_end (ADDR()+SIZEOF())
- *
- * The bss array includes:
- * - region_begin (ADDR())
- * - region_end (ADDR()+SIZEOF())
- *
- * WARNING: It is mandatory that the regions are word aligned,
- * since the initialisation code works only on words.
- */
-
- __data_regions_array_start = .;
-
- LONG(LOADADDR(.data));
- LONG(ADDR(.data));
- LONG(ADDR(.data)+SIZEOF(.data));
-
- __data_regions_array_end = .;
-
- __bss_regions_array_start = .;
-
- LONG(ADDR(.bss));
- LONG(ADDR(.bss)+SIZEOF(.bss));
-
-
- __bss_regions_array_end = .;
-
- /* End of memory regions initialisation arrays. */
-
- /*
- * These are the old initialisation sections, intended to contain
- * naked code, with the prologue/epilogue added by crti.o/crtn.o
- * when linking with startup files. The standalone startup code
- * currently does not run these, better use the init arrays below.
- */
- KEEP(*(.init))
- KEEP(*(.fini))
+ . = ALIGN(4);
+ _stext = .;
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
@@ -135,7 +38,7 @@ SECTIONS
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
-
+
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
@@ -143,212 +46,67 @@ SECTIONS
__rt_init_end = .;
. = ALIGN(4);
+ . = ALIGN(4);
+ _etext = .;
+ } > CODE = 0
- /*
- * The preinit code, i.e. an array of pointers to initialisation
- * functions to be performed before constructors.
- */
- PROVIDE_HIDDEN (__preinit_array_start = .);
-
- /*
- * Used to run the SystemInit() before anything else.
- */
- KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))
-
- /*
- * Used for other platform inits.
- */
- KEEP(*(.preinit_array_platform .preinit_array_platform.*))
-
- /*
- * The application inits. If you need to enforce some order in
- * execution, create new sections, as before.
- */
- KEEP(*(.preinit_array .preinit_array.*))
-
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
-
- /*
- * The init code, i.e. an array of pointers to static constructors.
- */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
- . = ALIGN(4);
-
- /*
- * The fini code, i.e. an array of pointers to static destructors.
- */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- } >FLASH
-
- /*
- * For some STRx devices, the beginning of the startup code
- * is stored in the .flashtext section, which goes to FLASH.
- */
- .flashtext : ALIGN(4)
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
{
- *(.flashtext .flashtext.*) /* Startup code */
- } >FLASH
-
-
- /*
- * The program code is stored in the .text section,
- * which goes to FLASH.
- */
- .text : ALIGN(4)
- {
- *(.text .text.*) /* all remaining code */
-
- /* read-only data (constants) */
- *(.rodata .rodata.* .constdata .constdata.*)
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- *(vtable) /* C++ virtual tables */
+ /* This is used by the startup in order to initialize the .data secion */
+ _sidata = .;
+ } > CODE
+ __exidx_end = .;
- KEEP(*(.eh_frame*))
+ /* .data section which is used for initialized data */
- /*
- * Stub sections generated by the linker, to glue together
- * ARM and Thumb code. .glue_7 is used for ARM code calling
- * Thumb code, and .glue_7t is used for Thumb code calling
- * ARM code. Apparently always generated by the linker, for some
- * architectures, so better leave them here.
- */
- *(.glue_7)
- *(.glue_7t)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- } >FLASH
-
- /* ARM magic sections */
- .ARM.extab : ALIGN(4)
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > FLASH
-
- . = ALIGN(4);
- __exidx_start = .;
- .ARM.exidx : ALIGN(4)
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- } > FLASH
- __exidx_end = .;
-
- . = ALIGN(4);
- _etext = .;
- __etext = .;
-
- /* MEMORY_ARRAY */
- /*
- .ROarraySection :
+ .data : AT (_sidata)
{
- *(.ROarraySection .ROarraySection.*)
- } >MEMORY_ARRAY
- */
-
- /*
- * This address is used by the startup code to
- * initialise the .data section.
- */
- _sidata = LOADADDR(.data);
-
- /*
- * The initialised data section.
- *
- * The program executes knowing that the data is in the RAM
- * but the loader puts the initial values in the FLASH (inidata).
- * It is one task of the startup to copy the initial values from
- * FLASH to RAM.
- */
- .data : ALIGN(4)
- {
- FILL(0xFF)
- /* This is used by the startup code to initialise the .data section */
- _sdata = . ; /* STM specific definition */
- __data_start__ = . ;
- *(.data_begin .data_begin.*)
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
- *(.data .data.*)
-
- *(.data_end .data_end.*)
- . = ALIGN(4);
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
- /* This is used by the startup code to initialise the .data section */
- _edata = . ; /* STM specific definition */
- __data_end__ = . ;
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >DATA
- } >RAM AT>FLASH
-
- /*
- * The uninitialised data sections. NOLOAD is used to avoid
- * the "section `.bss' type changed to PROGBITS" warning
- */
+ .stack :
+ {
+ _sstack = .;
+ . = . + _system_stack_size;
+ . = ALIGN(4);
+ _estack = .;
+ } >DATA
- /* The primary uninitialised data section. */
- .bss (NOLOAD) : ALIGN(4)
+ __bss_start = .;
+ .bss :
{
- __bss_start__ = .; /* standard newlib definition */
- _sbss = .; /* STM specific definition */
- *(.bss_begin .bss_begin.*)
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
- *(.bss .bss.*)
+ *(.bss)
+ *(.bss.*)
*(COMMON)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
- *(.bss_end .bss_end.*)
- . = ALIGN(4);
- __bss_end__ = .; /* standard newlib definition */
- _ebss = . ; /* STM specific definition */
- } >RAM
-
- .noinit (NOLOAD) : ALIGN(4)
- {
- _noinit = .;
-
- *(.noinit .noinit.*)
-
- . = ALIGN(4) ;
- _end_noinit = .;
- } > RAM
-
- /* Mandatory to be word aligned, _sbrk assumes this */
- PROVIDE ( end = _end_noinit ); /* was _ebss */
- PROVIDE ( _end = _end_noinit );
- PROVIDE ( __end = _end_noinit );
- PROVIDE ( __end__ = _end_noinit );
-
- /*
- * Used for validation only, do not allocate anything here!
- *
- * This is just to check that there is enough RAM left for the Main
- * stack. It should generate an error if it's full.
- */
- ._check_stack : ALIGN(4)
- {
- . = . + _Minimum_Stack_Size ;
- } >RAM
+ *(.bss.init)
+ } > DATA
+ __bss_end = .;
+
+ _end = .;
- /* After that there are only debugging sections. */
-
- /* This can remove the debugging information from the standard libraries */
- /*
- DISCARD :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
- */
-
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
@@ -357,11 +115,9 @@ SECTIONS
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
- /*
- * DWARF debug sections.
+ /* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
- * of the section so we begin them at 0.
- */
+ * of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
@@ -383,5 +139,5 @@ SECTIONS
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
}
diff --git a/bsp/nuvoton_nuc472/project.uvproj b/bsp/nuvoton_nuc472/project.uvproj
new file mode 100644
index 0000000000..0888eb8df9
--- /dev/null
+++ b/bsp/nuvoton_nuc472/project.uvproj
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+ <SchemaVersion>1.1</SchemaVersion>
+ <Header>### uVision Project, (C) Keil Software</Header>
+ <Targets>
+ <Target>
+ <TargetName>rtthread-nuc472</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>NUC472HI8AE</Device>
+ <Vendor>Nuvoton</Vendor>
+ <Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec />
+ <StartupFile>undefined</StartupFile>
+ <FlashDriverDll />
+ <DeviceId>0</DeviceId>
+ <RegisterFile />
+ <MemoryEnv />
+ <Cmp />
+ <Asm />
+ <Linker />
+ <OHString />
+ <InfinionOptionDll />
+ <SLE66CMisc />
+ <SLE66AMisc />
+ <SLE66LinkerMisc />
+ <SFDFile>SFD\Nuvoton\NUC400_v1.SFR</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath />
+ <IncludePath />
+ <LibPath />
+ <RegisterFilePath />
+ <DBRegisterFilePath />
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\build\</OutputDirectory>
+ <OutputName>template</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>1</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\build\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name />
+ <UserProg2Name />
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name />
+ <UserProg2Name />
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name />
+ <UserProg2Name />
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString />
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument />
+ <IncludeLibraryModules />
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments />
+ <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+ <SimDlgDllArguments />
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments />
+ <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+ <TargetDlgDllArguments />
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>1</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ <RestoreSysVw>1</RestoreSysVw>
+ </Simulator>
+ <Target>
+ <UseTarget>0</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <RestoreTracepoints>1</RestoreTracepoints>
+ <RestoreSysVw>1</RestoreSysVw>
+ <UsePdscDebugDescription>1</UsePdscDebugDescription>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>-1</TargetSelection>
+ <SimDlls>
+ <CpuDll />
+ <CpuDllArguments />
+ <PeripheralDll />
+ <PeripheralDllArguments />
+ <InitializationFile />
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll />
+ <CpuDllArguments />
+ <PeripheralDll />
+ <PeripheralDllArguments />
+ <InitializationFile />
+ <Driver />
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>0</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+ <Capability>0</Capability>
+ <DriverSelection>-1</DriverSelection>
+ </Flash1>
+ <bUseTDR>0</bUseTDR>
+ <Flash2 />
+ <Flash3 />
+ <Flash4 />
+ <pFcarmOut />
+ <pFcarmGrp />
+ <pFcArmRoot />
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName />
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x10000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x10000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector />
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <VariousControls>
+ <MiscControls />
+ <Define />
+ <Undefine />
+ <IncludePath>applications;.;drivers;Libraries\CMSIS\Include;Libraries\Device\Nuvoton\NUC472_442\Include;Libraries\StdDriver\inc;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <VariousControls>
+ <MiscControls />
+ <Define />
+ <Undefine />
+ <IncludePath />
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>1</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase />
+ <ScatterFile />
+ <IncludeLibs />
+ <IncludeLibsPath />
+ <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc>
+ <LinkerInputFile />
+ <DisabledWarnings />
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Applications</GroupName>
+ <Files>
+ <File>
+ <FileName>application.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>applications\application.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Drivers</GroupName>
+ <Files>
+ <File>
+ <FileName>board.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>drivers\board.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>nuc472_eth.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>drivers\nuc472_eth.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>usart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>drivers\usart.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>CMSIS</GroupName>
+ <Files>
+ <File>
+ <FileName>system_NUC472_442.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\Device\Nuvoton\NUC472_442\Source\system_NUC472_442.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>startup_NUC472_442.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>Libraries\Device\Nuvoton\NUC472_442\Source\ARM\startup_NUC472_442.s</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>NUC472_StdPeriph</GroupName>
+ <Files>
+ <File>
+ <FileName>acmp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\acmp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>adc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\adc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>can.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\can.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>cap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\cap.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>clk.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\clk.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>crc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\crc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>crypto.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\crypto.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>eadc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\eadc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ebi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\ebi.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>emac.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\emac.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>epwm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\epwm.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>fmc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\fmc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>gpio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\gpio.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>i2c.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\i2c.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>i2s.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\i2s.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>pdma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\pdma.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ps2.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\ps2.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>pwm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\pwm.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>rtc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\rtc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>sc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\sc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>scuart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\scuart.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>sd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\sd.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>spi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\spi.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>sys_.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\sys_.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>timer_.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\timer_.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\uart.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>usbd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\usbd.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>wdt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\wdt.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>wwdt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>Libraries\StdDriver\src\wwdt.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>Kernel</GroupName>
+ <Files>
+ <File>
+ <FileName>clock.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\clock.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>components.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\components.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>device.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\device.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>idle.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\idle.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ipc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\ipc.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>irq.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\irq.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>kservice.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\kservice.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>mem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\mem.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>mempool.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\mempool.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>object.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\object.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>scheduler.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\scheduler.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>signal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\signal.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>thread.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\thread.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>timer.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\src\timer.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>CORTEX-M4</GroupName>
+ <Files>
+ <File>
+ <FileName>cpuport.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>context_rvds.S</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>backtrace.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>div0.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>showmem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>DeviceDrivers</GroupName>
+ <Files>
+ <File>
+ <FileName>serial.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>completion.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>dataqueue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>pipe.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ringbuffer.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>waitqueue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>workqueue.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>finsh</GroupName>
+ <Files>
+ <File>
+ <FileName>shell.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\shell.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>symbol.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\symbol.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>cmd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\cmd.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>msh.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\msh.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>msh_cmd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\msh_cmd.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>msh_file.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\finsh\msh_file.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>lwIP</GroupName>
+ <Files>
+ <File>
+ <FileName>sys_arch.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\arch\sys_arch.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>api_lib.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\api_lib.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>api_msg.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\api_msg.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>err.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\err.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>netbuf.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\netbuf.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>netdb.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\netdb.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>netifapi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\netifapi.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>sockets.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\sockets.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>tcpip.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\api\tcpip.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>def.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\def.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>dns.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\dns.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>inet_chksum.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>init.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\init.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ip.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ip.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>memp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\memp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>netif.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\netif.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>pbuf.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\pbuf.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>raw.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\raw.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>stats.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\stats.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>sys.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\sys.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>tcp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>tcp_in.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp_in.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>tcp_out.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp_out.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>timeouts.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\timeouts.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>udp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\udp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ethernet.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\netif\ethernet.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ethernetif.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>lowpan6.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>autoip.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>dhcp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>etharp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>icmp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>igmp.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ip4.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ip4_addr.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>ip4_frag.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_frag.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+</Project>
diff --git a/bsp/nuvoton_nuc472/template.uvproj b/bsp/nuvoton_nuc472/template.uvproj
new file mode 100644
index 0000000000..61af4cfa37
--- /dev/null
+++ b/bsp/nuvoton_nuc472/template.uvproj
@@ -0,0 +1,407 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>rtthread-nuc472</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>NUC472HI8AE</Device>
+ <Vendor>Nuvoton</Vendor>
+ <Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>undefined</StartupFile>
+ <FlashDriverDll></FlashDriverDll>
+ <DeviceId>0</DeviceId>
+ <RegisterFile></RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>SFD\Nuvoton\NUC400_v1.SFR</SFDFile>
+ <bCustSvd>0</bCustSvd>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath></RegisterFilePath>
+ <DBRegisterFilePath></DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\build\</OutputDirectory>
+ <OutputName>template</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>1</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\build\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ <ComprImg>1</ComprImg>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments></SimDllArguments>
+ <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+ <SimDlgDllArguments></SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+ <TargetDlgDllArguments></TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>1</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ <RestoreSysVw>1</RestoreSysVw>
+ </Simulator>
+ <Target>
+ <UseTarget>0</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <RestoreTracepoints>1</RestoreTracepoints>
+ <RestoreSysVw>1</RestoreSysVw>
+ <UsePdscDebugDescription>1</UsePdscDebugDescription>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>-1</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver></Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>0</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+ <Capability>0</Capability>
+ <DriverSelection>-1</DriverSelection>
+ </Flash1>
+ <bUseTDR>0</bUseTDR>
+ <Flash2></Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ <pFcarmOut></pFcarmOut>
+ <pFcarmGrp></pFcarmGrp>
+ <pFcArmRoot></pFcArmRoot>
+ <FcArmLst>0</FcArmLst>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x10000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x10000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <uC99>0</uC99>
+ <useXO>0</useXO>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <useXO>0</useXO>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath></IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>1</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x00000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <pXoBase></pXoBase>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ </Target>
+ </Targets>
+
+</Project>