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authorhichard <[email protected]>2017-10-18 09:08:21 +0800
committerhichard <[email protected]>2017-10-18 09:08:21 +0800
commit4b83744a6cdbbd7b56396032a4e1a44393ec5691 (patch)
tree57aa39e85ecdd41957ada36a025823cd84e922f3 /include
parent41f3d1f9de7635200c5341125f81e1b131710d4d (diff)
renhaibo-branch
Diffstat (limited to 'include')
-rw-r--r--include/rthw.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/include/rthw.h b/include/rthw.h
index 960437d5a4..fd5e6f3195 100644
--- a/include/rthw.h
+++ b/include/rthw.h
@@ -23,6 +23,7 @@
* 2006-04-25 Bernard add rt_hw_context_switch_interrupt declaration
* 2006-09-24 Bernard add rt_hw_context_switch_to declaration
* 2012-12-29 Bernard add rt_hw_exception_install declaration
+ * 2017-10-17 Hichard add some micros
*/
#ifndef __RT_HW_H__
@@ -35,6 +36,19 @@ extern "C" {
#endif
/*
+ * Some macros define
+ */
+#ifndef HWREG32
+#define HWREG32(x) (*((volatile rt_uint32_t *)(x)))
+#endif
+#ifndef HWREG16
+#define HWREG16(x) (*((volatile rt_uint16_t *)(x)))
+#endif
+#ifndef HWREG8
+#define HWREG8(x) (*((volatile rt_uint8_t *)(x)))
+#endif
+
+/*
* CPU interfaces
*/
void rt_hw_cpu_icache_enable(void);
@@ -98,6 +112,11 @@ void rt_hw_show_memory(rt_uint32_t addr, rt_uint32_t size);
*/
void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context));
+/*
+ * delay interfaces
+ */
+void rt_hw_us_delay(rt_uint32_t us);
+
#ifdef __cplusplus
}
#endif