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authoryangjie11 <[email protected]>2018-12-13 09:22:12 +0800
committerGitHub <[email protected]>2018-12-13 09:22:12 +0800
commit2b98f4720c827ae1850df78299f6b273d568c8c7 (patch)
tree142d000d78e3b874b7bdd2313388b00a3ddf1000 /libcpu/SConscript
parent1a7f95f92b84b0a3acd6243cb2a658b4f9b6f1ac (diff)
parentdcf7bce2cc5d04bcb006b84a27a5498f42268184 (diff)
Merge pull request #2 from RT-Thread/master
更新
Diffstat (limited to 'libcpu/SConscript')
-rw-r--r--libcpu/SConscript21
1 files changed, 14 insertions, 7 deletions
diff --git a/libcpu/SConscript b/libcpu/SConscript
index a42909e64c..568da67cc9 100644
--- a/libcpu/SConscript
+++ b/libcpu/SConscript
@@ -2,30 +2,37 @@ Import('RTT_ROOT')
Import('rtconfig')
from building import *
+arch = rtconfig.ARCH
comm = rtconfig.ARCH + '/common'
path = rtconfig.ARCH + '/' + rtconfig.CPU
+src = []
ASFLAGS = ''
# The set of source files associated with this SConscript file.
if rtconfig.PLATFORM == 'armcc':
- src = Glob(path + '/*.c') + Glob(path + '/*_rvds.S') + Glob(comm + '/*.c')
+ src += Glob(path + '/*.c') + Glob(path + '/*_rvds.S')
+ src += Glob(comm + '/*.c') + Glob(comm + '/*_rvds.S')
if rtconfig.PLATFORM == 'gcc':
- src = Glob(path + '/*.c') + Glob(path + '/*_gcc.S') + Glob(comm + '/*.c') + Glob(path + '/*_init.S')
+ src += Glob(path + '/*_init.S')
+ src += Glob(path + '/*.c') + Glob(path + '/*_gcc.S')
+ src += Glob(comm + '/*.c') + Glob(comm + '/*_gcc.S')
if rtconfig.PLATFORM == 'iar':
- src = Glob(path + '/*.c') + Glob(path + '/*_iar.S') + Glob(comm + '/*.c')
+ src += Glob(path + '/*.c') + Glob(path + '/*_iar.S')
+ src += Glob(comm + '/*.c') + Glob(comm + '/*_iar.S')
if rtconfig.PLATFORM == 'cl':
- src = Glob(path + '/*.c')
+ src = Glob(path + '/*.c')
if rtconfig.PLATFORM == 'mingw':
- src = Glob(path + '/*.c')
+ src = Glob(path + '/*.c')
if rtconfig.PLATFORM == 'armcc' and rtconfig.ARCH == 'arm' and rtconfig.CPU == 'arm926':
ASFLAGS = ' --cpreproc'
-
-CPPPATH = [RTT_ROOT + '/libcpu/' + rtconfig.ARCH + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + rtconfig.ARCH + '/common']
+
+CPPPATH = [RTT_ROOT + '/libcpu/' + arch + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + arch + '/common']
+
group = DefineGroup(rtconfig.CPU.upper(), src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
Return('group')