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authorhuanghe <[email protected]>2023-05-11 10:25:21 +0800
committerGitHub <[email protected]>2023-05-11 10:25:21 +0800
commit50a4e8c6625694eedfc2f4db20951daed754c4a3 (patch)
tree433eba3562e6ca6c28ca5b5f781a0f0db191db35 /libcpu/aarch64/common/interrupt.c
parent23f91e83ab2df736f03e28466b5acf32c803e80e (diff)
[bsp][phytium]适配rt-thread5.0.0 版本 (#7441)
Co-authored-by: 朱耿宇 <[email protected]>
Diffstat (limited to 'libcpu/aarch64/common/interrupt.c')
-rw-r--r--libcpu/aarch64/common/interrupt.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/libcpu/aarch64/common/interrupt.c b/libcpu/aarch64/common/interrupt.c
index e30223a696..dc142dd9e8 100644
--- a/libcpu/aarch64/common/interrupt.c
+++ b/libcpu/aarch64/common/interrupt.c
@@ -109,11 +109,11 @@ void rt_hw_interrupt_init(void)
/* initialize ARM GIC */
#ifdef RT_USING_SMART
- gic_dist_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_dist_base(), 0x2000);
+ gic_dist_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_dist_base(), 0x40000);
gic_cpu_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_cpu_base(), 0x1000);
#ifdef BSP_USING_GICV3
gic_rdist_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_redist_base(),
- RT_CPUS_NR * (2 << 16));
+ ARM_GIC_CPU_NUM * (2 << 16));
#endif
#else
gic_dist_base = platform_get_gic_dist_base();