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authoraozima <[email protected]>2013-06-23 18:08:16 +0800
committeraozima <[email protected]>2013-06-23 18:08:16 +0800
commitb045f93b47d4da57df034e201fff168219880605 (patch)
tree0d77257bac644746b5ca68a65640ccb06df7c483 /libcpu/arm/cortex-m3/context_gcc.S
parent93b9b282971441b6cb7ab3342e6f20b959126e2d (diff)
fixed bug: correct cortex-m SCB->VTOR address.
Diffstat (limited to 'libcpu/arm/cortex-m3/context_gcc.S')
-rw-r--r--libcpu/arm/cortex-m3/context_gcc.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/libcpu/arm/cortex-m3/context_gcc.S b/libcpu/arm/cortex-m3/context_gcc.S
index fad274aea8..c36ca9a7c3 100644
--- a/libcpu/arm/cortex-m3/context_gcc.S
+++ b/libcpu/arm/cortex-m3/context_gcc.S
@@ -22,7 +22,7 @@
.thumb
.text
- .equ SCB_VTOR, 0xE000ED04 /* Vector Table Offset Register */
+ .equ SCB_VTOR, 0xE000ED08 /* Vector Table Offset Register */
.equ ICSR, 0xE000ED04 /* interrupt control state register */
.equ PENDSVSET_BIT, 0x10000000 /* value to trigger PendSV exception */