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authoraozima <[email protected]>2015-05-13 11:54:10 +0800
committeraozima <[email protected]>2015-05-13 11:57:34 +0800
commit73df162d3f9de24158eec9cc66f2662ecd9ec269 (patch)
treed43bcc3cdb4c834de54e5741eb8a8c2557d13ec0 /libcpu/arm
parent2313424f811c59563090e77966d906dd3eb7f127 (diff)
fixed assembly warnings.
Diffstat (limited to 'libcpu/arm')
-rw-r--r--libcpu/arm/cortex-m0/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m3/context_rvds.S6
-rw-r--r--libcpu/arm/cortex-m4/context_rvds.S3
3 files changed, 7 insertions, 6 deletions
diff --git a/libcpu/arm/cortex-m0/context_rvds.S b/libcpu/arm/cortex-m0/context_rvds.S
index 89ac029282..bf68592e63 100644
--- a/libcpu/arm/cortex-m0/context_rvds.S
+++ b/libcpu/arm/cortex-m0/context_rvds.S
@@ -183,13 +183,11 @@ rt_hw_context_switch_to PROC
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
- NOP
; restore MSP
LDR r0, =SCB_VTOR
LDR r0, [r0]
LDR r0, [r0]
- NOP
MSR msp, r0
; enable interrupts at processor level
@@ -216,4 +214,6 @@ HardFault_Handler PROC
POP {pc}
ENDP
+ ALIGN 4
+
END
diff --git a/libcpu/arm/cortex-m3/context_rvds.S b/libcpu/arm/cortex-m3/context_rvds.S
index 33fcd124d9..ebfd5c8da8 100644
--- a/libcpu/arm/cortex-m3/context_rvds.S
+++ b/libcpu/arm/cortex-m3/context_rvds.S
@@ -177,7 +177,6 @@ rt_hw_context_switch_to PROC
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
BX lr
- NOP
ENDP
IMPORT rt_hw_hard_fault_exception
@@ -203,5 +202,6 @@ HardFault_Handler PROC
BX lr
ENDP
- NOP
- END \ No newline at end of file
+ ALIGN 4
+
+ END
diff --git a/libcpu/arm/cortex-m4/context_rvds.S b/libcpu/arm/cortex-m4/context_rvds.S
index af7461fd49..d7cb34d5c3 100644
--- a/libcpu/arm/cortex-m4/context_rvds.S
+++ b/libcpu/arm/cortex-m4/context_rvds.S
@@ -218,7 +218,6 @@ rt_hw_context_switch_to PROC
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
BX lr
- NOP
ENDP
IMPORT rt_hw_hard_fault_exception
@@ -235,4 +234,6 @@ HardFault_Handler PROC
BX lr
ENDP
+ ALIGN 4
+
END