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authorWayne <[email protected]>2023-03-31 10:06:28 +0800
committerGitHub <[email protected]>2023-03-31 10:06:28 +0800
commit3309ef60011f2ddaf8ab32f5c0243c054188f152 (patch)
tree5ba944b309c96d9b37699a8e3d23de390f0b92f8 /libcpu/arm
parent3c2169e6379ccc522e6192b6589f0e0d1d922e44 (diff)
[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796)
* Revert safety MMU initialization. Co-authored-by: Wayne Lin <[email protected]>
Diffstat (limited to 'libcpu/arm')
-rw-r--r--libcpu/arm/cortex-a/start_gcc.S9
1 files changed, 8 insertions, 1 deletions
diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S
index b1cddebe0b..658ff5a649 100644
--- a/libcpu/arm/cortex-a/start_gcc.S
+++ b/libcpu/arm/cortex-a/start_gcc.S
@@ -147,7 +147,14 @@ after_enable_mmu:
/* disable the data alignment check */
mrc p15, 0, r1, c1, c0, 0
- bic r1, #(1<<1)
+ bic r1, #(1<<1) /* Disable Alignment fault checking */
+#ifndef RT_USING_SMART
+ bic r1, #(1<<0) /* Disable MMU */
+ bic r1, #(1<<2) /* Disable data cache */
+ bic r1, #(1<<11) /* Disable program flow prediction */
+ bic r1, #(1<<12) /* Disable instruction cache */
+ bic r1, #(3<<19) /* bit[20:19] must be zero */
+#endif /* RT_USING_SMART */
mcr p15, 0, r1, c1, c0, 0
/* enable I cache + branch prediction */