diff options
| author | qiuyiuestc <[email protected]> | 2010-10-10 11:50:44 +0000 |
|---|---|---|
| committer | qiuyiuestc <[email protected]> | 2010-10-10 11:50:44 +0000 |
| commit | 809f8c5fd3117c72b6136fd73c47c5eb72a86c6f (patch) | |
| tree | 5ddec37c04ef1fe47d0a03ca2dfeaf5d1ea5b7e2 /libcpu/arm | |
| parent | acfbfad25e9304019b83e6825818da9fc02f7fcf (diff) | |
fix MMU table overwrite issue
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1007 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu/arm')
| -rw-r--r-- | libcpu/arm/s3c24x0/mmu.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/libcpu/arm/s3c24x0/mmu.c b/libcpu/arm/s3c24x0/mmu.c index 36b3eb3c9a..cb14c4cab7 100644 --- a/libcpu/arm/s3c24x0/mmu.c +++ b/libcpu/arm/s3c24x0/mmu.c @@ -16,14 +16,13 @@ #include <rtthread.h>
#include "s3c24x0.h"
-// #define _MMUTT_STARTADDRESS 0x30080000
-#define _MMUTT_STARTADDRESS 0x30400000
+#define _MMUTT_STARTADDRESS 0x33FF0000
#define DESC_SEC (0x2|(1<<4))
#define CB (3<<2) //cache_on, write_back
#define CNB (2<<2) //cache_on, write_through
#define NCB (1<<2) //cache_off,WR_BUF on
-#define NCNB (0<<2) //cache_off,WR_BUF off
+#define NCNB (0<<2) //cache_off,WR_BUF off
#define AP_RW (3<<10) //supervisor=RW, user=RW
#define AP_RO (2<<10) //supervisor=RW, user=RO
@@ -367,9 +366,9 @@ void rt_hw_mmu_init(void) mmu_setmtt(0x28000000,0x2ff00000,0x28000000,RW_NCNB); //bank5
//30f00000->30100000, 31000000->30200000
mmu_setmtt(0x30000000,0x30100000,0x30000000,RW_CB); //bank6-1
- mmu_setmtt(0x30200000,0x33e00000,0x30200000,RW_NCNB); //bank6-2
+ mmu_setmtt(0x30200000,0x33e00000,0x30200000,RW_CB); //bank6-2
- mmu_setmtt(0x33f00000,0x33f00000,0x33f00000,RW_CB); //bank6-3
+ mmu_setmtt(0x33f00000,0x34000000,0x33f00000,RW_NCNB); //bank6-3
mmu_setmtt(0x38000000,0x3ff00000,0x38000000,RW_NCNB); //bank7
mmu_setmtt(0x40000000,0x47f00000,0x40000000,RW_NCNB); //SFR
@@ -392,3 +391,4 @@ void rt_hw_mmu_init(void) /* DCache should be turned on after mmu is turned on. */
mmu_enable_dcache();
}
+
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