diff options
| author | Shell <[email protected]> | 2023-03-30 08:25:15 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-03-30 08:25:15 +0800 |
| commit | eec78d9f5d3f0a944500a1cac5802dfee2befc7b (patch) | |
| tree | 8a29c0d564ea854d41f27a385f55100f3a8bd341 /libcpu/arm | |
| parent | dc77d8fcb62024f8dbb6de73cd2b4a604ae20f3a (diff) | |
[rt-smart] testcase & improvements for memory management (#7099)
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm
* [libcpu/aarch64] fix user stack check routine
* [kservice] export API for utest
* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map
* [lwp/user_mm] add user_map_varea for mmap feature
* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix
* [utest/mm] testcase for synchronization
* [mm] modify unmap api to improve throughput
* [utest/mm] testcases for cache and varea map
* [format] remove extra space
* [utest/mm] fix testcase problem in header
* [lwp] extend map_user_varea with a flag
* [utest/mm] testcase for lwp_map_user_varea
* [libcpu/arm/cortex-a] fix kernel space layout
* [utest/mm] adjust for armv7 arch
Diffstat (limited to 'libcpu/arm')
| -rw-r--r-- | libcpu/arm/cortex-a/mmu.c | 21 | ||||
| -rw-r--r-- | libcpu/arm/cortex-a/mmu.h | 1 | ||||
| -rw-r--r-- | libcpu/arm/cortex-a/trap.c | 6 |
3 files changed, 23 insertions, 5 deletions
diff --git a/libcpu/arm/cortex-a/mmu.c b/libcpu/arm/cortex-a/mmu.c index ed96e96d18..c573611616 100644 --- a/libcpu/arm/cortex-a/mmu.c +++ b/libcpu/arm/cortex-a/mmu.c @@ -11,6 +11,10 @@ #include <rthw.h> #include <rtthread.h> +#define DBG_TAG "hw.mmu" +#define DBG_LVL DBG_LOG +#include <rtdbg.h> + #include <board.h> #include "cp15.h" #include "mm_page.h" @@ -55,11 +59,26 @@ void rt_hw_mmu_setmtt(rt_uint32_t vaddrStart, rt_uint32_t vaddrEnd, void rt_hw_init_mmu_table(struct mem_desc *mdesc, rt_uint32_t size) { + void *vaddr; + size_t length; + /* init kernel space */ +#ifdef RT_USING_SMART + rt_aspace_init(&rt_kernel_space, (void *)USER_VADDR_TOP, -USER_VADDR_TOP, (void *)MMUTable); +#else + rt_aspace_init(&rt_kernel_space, (void *)0x1000, 0 - 0x1000, (void *)MMUTable); +#endif /* RT_USING_SMART */ + /* set page table */ for(; size > 0; size--) { if (mdesc->paddr_start == (rt_uint32_t)ARCH_MAP_FAILED) mdesc->paddr_start = mdesc->vaddr_start + PV_OFFSET; + + vaddr = (void *)mdesc->vaddr_start; + length = mdesc->vaddr_end - mdesc->vaddr_start; + rt_aspace_map_static(&rt_kernel_space, &mdesc->varea, &vaddr, length, + mdesc->attr, MMF_MAP_FIXED, &rt_mm_dummy_mapper, 0); + rt_hw_mmu_setmtt(mdesc->vaddr_start, mdesc->vaddr_end, mdesc->paddr_start, mdesc->attr); mdesc++; @@ -123,12 +142,10 @@ int rt_hw_mmu_map_init(struct rt_aspace *aspace, void* v_address, size_t size, s } #ifdef RT_USING_SMART - rt_aspace_init(&rt_kernel_space, (void *)USER_VADDR_TOP, 0 - USER_VADDR_TOP, vtable); rt_ioremap_start = v_address; rt_ioremap_size = size; rt_mpr_start = rt_ioremap_start - rt_mpr_size; #else - rt_aspace_init(&rt_kernel_space, (void *)0x1000, 0 - 0x1000, vtable); rt_mpr_start = (void *)0 - rt_mpr_size; #endif diff --git a/libcpu/arm/cortex-a/mmu.h b/libcpu/arm/cortex-a/mmu.h index 2d09c1281d..61b47a9402 100644 --- a/libcpu/arm/cortex-a/mmu.h +++ b/libcpu/arm/cortex-a/mmu.h @@ -52,6 +52,7 @@ struct mem_desc rt_uint32_t vaddr_end; rt_uint32_t paddr_start; rt_uint32_t attr; + struct rt_varea varea; }; #define MMU_MAP_MTBL_XN (1<<0) diff --git a/libcpu/arm/cortex-a/trap.c b/libcpu/arm/cortex-a/trap.c index 425e51b9d0..0aafa55968 100644 --- a/libcpu/arm/cortex-a/trap.c +++ b/libcpu/arm/cortex-a/trap.c @@ -50,12 +50,12 @@ int check_user_stack(struct rt_hw_exp_stack *regs) if ((dfar >= (void *)USER_STACK_VSTART) && (dfar < (void *)USER_STACK_VEND)) { - struct rt_mm_fault_msg msg = { + struct rt_aspace_fault_msg msg = { .fault_op = MM_FAULT_OP_WRITE, .fault_type = MM_FAULT_TYPE_PAGE_FAULT, - .vaddr = dfar, + .fault_vaddr = dfar, }; - if (rt_mm_fault_try_fix(&msg)) + if (rt_aspace_fault_try_fix(&msg)) { regs->pc -= 8; return 1; |
