diff options
| author | ZYH <[email protected]> | 2019-10-23 15:04:30 +0800 |
|---|---|---|
| committer | ZYH <[email protected]> | 2019-10-23 15:04:34 +0800 |
| commit | cabdbf5bbf8faadee94d01316509ce6e1e82c56f (patch) | |
| tree | 6c31d3f0c9b66c376c1ff10b69d4bb6093017a8d /libcpu/arm | |
| parent | eed732b82683a4c17929dc5ea36b8c0267a137e2 (diff) | |
[libcpu][M7]修复cache编译警告
Signed-off-by: ZYH <[email protected]>
Diffstat (limited to 'libcpu/arm')
| -rw-r--r-- | libcpu/arm/cortex-m7/cpu_cache.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/libcpu/arm/cortex-m7/cpu_cache.c b/libcpu/arm/cortex-m7/cpu_cache.c index 4a1a9c2201..350b819c00 100644 --- a/libcpu/arm/cortex-m7/cpu_cache.c +++ b/libcpu/arm/cortex-m7/cpu_cache.c @@ -72,15 +72,15 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size) if (ops & (RT_HW_CACHE_FLUSH | RT_HW_CACHE_INVALIDATE)) { - SCB_CleanInvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte); + SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size_byte); } else if (ops & RT_HW_CACHE_FLUSH) { - SCB_CleanDCache_by_Addr((rt_uint32_t *)startAddr, size_byte); + SCB_CleanDCache_by_Addr((uint32_t *)startAddr, size_byte); } else if (ops & RT_HW_CACHE_INVALIDATE) { - SCB_InvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte); + SCB_InvalidateDCache_by_Addr((uint32_t *)startAddr, size_byte); } else { |