diff options
| author | [email protected] <[email protected]> | 2011-11-29 10:17:51 +0000 |
|---|---|---|
| committer | [email protected] <[email protected]> | 2011-11-29 10:17:51 +0000 |
| commit | 462cfdc3e0dd1d0bfbfd48573f5b2f52966b7268 (patch) | |
| tree | 4b445ab31c2d4d6b4ce45bdda87bce28973fefe4 /libcpu/arm | |
| parent | ed9828226a41216626b2dcea09d80067d1cebcd3 (diff) | |
add fatal event handler in ARM7TDMI.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1819 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu/arm')
| -rw-r--r-- | libcpu/arm/lpc24xx/start_rvds.S | 69 | ||||
| -rw-r--r-- | libcpu/arm/lpc24xx/trap.c | 10 |
2 files changed, 71 insertions, 8 deletions
diff --git a/libcpu/arm/lpc24xx/start_rvds.S b/libcpu/arm/lpc24xx/start_rvds.S index 312df25f26..162bfecfc2 100644 --- a/libcpu/arm/lpc24xx/start_rvds.S +++ b/libcpu/arm/lpc24xx/start_rvds.S @@ -49,11 +49,9 @@ Mode_SVC EQU 0x13 Mode_ABT EQU 0x17
Mode_UND EQU 0x1B
Mode_SYS EQU 0x1F
-
I_Bit EQU 0x80 ; when I bit is set, IRQ is disabled
F_Bit EQU 0x40 ; when F bit is set, FIQ is disabled
-
;----------------------- Memory Definitions ------------------------------------
; Internal Memory Base Addresses
@@ -1068,12 +1066,67 @@ DAbt_Addr DCD DAbt_Handler IRQ_Addr DCD IRQ_Handler
FIQ_Addr DCD FIQ_Handler
-Undef_Handler B Undef_Handler
-SWI_Handler B SWI_Handler
-PAbt_Handler B PAbt_Handler
-DAbt_Handler B DAbt_Handler
-FIQ_Handler B FIQ_Handler
+; Exception Handler
+ IMPORT rt_hw_trap_udef
+ IMPORT rt_hw_trap_swi
+ IMPORT rt_hw_trap_pabt
+ IMPORT rt_hw_trap_dabt
+ IMPORT rt_hw_trap_fiq
+
+; Prepare Fatal Context
+ MACRO
+ prepare_fatal
+ STMFD sp!, {r0-r3}
+ MOV r1, sp
+ ADD sp, sp, #16
+ SUB r2, lr, #4
+ MRS r3, spsr
+
+ ; switch to SVC mode and no interrupt
+ MSR cpsr_c, #I_Bit :OR: F_Bit :OR: Mode_SVC
+
+ STMFD sp!, {r0} ; old r0
+ ; get sp
+ ADD r0, sp, #4
+ STMFD sp!, {r3} ; cpsr
+ STMFD sp!, {r2} ; pc
+ STMFD sp!, {lr} ; lr
+ STMFD sp!, {r0} ; sp
+ STMFD sp!, {r4-r12}
+
+ MOV r4, r1
+
+ LDMFD r4!, {r0-r3}
+ STMFD sp!, {r0-r3}
+
+ MOV r0, sp
+ MEND
+
+Undef_Handler
+ prepare_fatal
+ BL rt_hw_trap_irq
+ B .
+
+SWI_Handler
+ prepare_fatal
+ BL rt_hw_trap_swi
+ B .
+
+PAbt_Handler
+ prepare_fatal
+ BL rt_hw_trap_pabt
+ B .
+
+DAbt_Handler
+ prepare_fatal
+ BL rt_hw_trap_dabt
+ B .
+
+FIQ_Handler
+ prepare_fatal
+ BL rt_hw_trap_fiq
+ B .
; Reset Handler
@@ -1529,7 +1582,7 @@ rt_hw_context_switch_interrupt_do PROC MRS r3, spsr ; get cpsr of interrupt thread
; switch to SVC mode and no interrupt
- MSR cpsr_c, #I_Bit|F_Bit|Mode_SVC
+ MSR cpsr_c, #I_Bit :OR: F_Bit :OR: Mode_SVC
STMFD sp!, {r2} ; push old task's pc
STMFD sp!, {r4-r12,lr}; push old task's lr,r12-r4
diff --git a/libcpu/arm/lpc24xx/trap.c b/libcpu/arm/lpc24xx/trap.c index e7377c94f7..1aa58bc0d6 100644 --- a/libcpu/arm/lpc24xx/trap.c +++ b/libcpu/arm/lpc24xx/trap.c @@ -52,6 +52,8 @@ void rt_hw_trap_udef(struct rt_hw_register *regs) { rt_kprintf("undefined instruction\n"); rt_hw_show_register(regs); + if (rt_thread_self() != RT_NULL) + rt_kprintf("Current Thread: %s\n", rt_thread_self()->name); rt_hw_cpu_shutdown(); } @@ -68,6 +70,8 @@ void rt_hw_trap_swi(struct rt_hw_register *regs) { rt_kprintf("software interrupt\n"); rt_hw_show_register(regs); + if (rt_thread_self() != RT_NULL) + rt_kprintf("Current Thread: %s\n", rt_thread_self()->name); rt_hw_cpu_shutdown(); } @@ -83,6 +87,8 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs) { rt_kprintf("prefetch abort\n"); rt_hw_show_register(regs); + if (rt_thread_self() != RT_NULL) + rt_kprintf("Current Thread: %s\n", rt_thread_self()->name); rt_hw_cpu_shutdown(); } @@ -98,6 +104,8 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs) { rt_kprintf("Data Abort "); rt_hw_show_register(regs); + if (rt_thread_self() != RT_NULL) + rt_kprintf("Current Thread: %s\n", rt_thread_self()->name); rt_hw_cpu_shutdown(); } @@ -112,6 +120,8 @@ void rt_hw_trap_resv(struct rt_hw_register *regs) { rt_kprintf("not used\n"); rt_hw_show_register(regs); + if (rt_thread_self() != RT_NULL) + rt_kprintf("Current Thread: %s\n", rt_thread_self()->name); rt_hw_cpu_shutdown(); } |
