diff options
| author | Grissiom <[email protected]> | 2013-05-26 23:37:56 +0800 |
|---|---|---|
| committer | Grissiom <[email protected]> | 2013-05-26 23:37:56 +0800 |
| commit | f08df08897135d007715f4c27be41071f9d33b07 (patch) | |
| tree | e2e7e3fd2dbfe958ba84aca589408ab229c04335 /libcpu/arm | |
| parent | 19fe6251e7085c39c69945aedde4c00b6167043b (diff) | |
rm48x50: optimize a BEQ
Use condition flag in the ORR. This could eliminate a BEQ.
Diffstat (limited to 'libcpu/arm')
| -rw-r--r-- | libcpu/arm/rm48x50/context_ccs.asm | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/libcpu/arm/rm48x50/context_ccs.asm b/libcpu/arm/rm48x50/context_ccs.asm index b57674313b..60e2f27671 100644 --- a/libcpu/arm/rm48x50/context_ccs.asm +++ b/libcpu/arm/rm48x50/context_ccs.asm @@ -53,10 +53,8 @@ rt_hw_context_switch MRS r4, cpsr TST lr, #0x01 - BEQ _ARM_MODE - ORR r4, r4, #0x20 ; it's thumb code + ORRNE r4, r4, #0x20 ; it's thumb code -_ARM_MODE STMFD sp!, {r4} ; push cpsr STR sp, [r0] ; store sp in preempted tasks TCB |