diff options
| author | lizhirui <[email protected]> | 2021-05-18 09:54:11 +0800 |
|---|---|---|
| committer | lizhirui <[email protected]> | 2021-05-18 09:54:11 +0800 |
| commit | 9a4e270f9770f778128ffdabe94f101416ce8c61 (patch) | |
| tree | 9df43fbcc25c3f288ed6fdecd65909d4094d849f /libcpu/mips/gs232/cache.c | |
| parent | e7fc0c89d2367533dcd1b77e46acaeea7bc3f876 (diff) | |
| parent | 4e9e3f79a565bb4fdc1d96deda18f9c771aeb0c9 (diff) | |
Merge branch 'RT-Thread:master' into master
Diffstat (limited to 'libcpu/mips/gs232/cache.c')
| -rw-r--r-- | libcpu/mips/gs232/cache.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/libcpu/mips/gs232/cache.c b/libcpu/mips/gs232/cache.c index 484d3816f4..bcbf2aba49 100644 --- a/libcpu/mips/gs232/cache.c +++ b/libcpu/mips/gs232/cache.c @@ -1,7 +1,7 @@ /* * Cache Ops For Loongson GS232 * - * Copyright (c) 2006-2019, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,8 +15,8 @@ #include <rtthread.h> #include <mips.h> -#define K0BASE 0x80000000 -#define PRID_LS1C 0x4220 +#define K0BASE 0x80000000 +#define PRID_LS1C 0x4220 extern void Clear_TagLo (void); extern void Invalidate_Icache_Ls1c(unsigned int); @@ -27,10 +27,10 @@ extern void enable_cpu_cache(void); typedef struct cacheinfo_t { - unsigned int icache_size; - unsigned int dcache_size; - unsigned int icacheline_size; - unsigned int dcacheline_size; + unsigned int icache_size; + unsigned int dcache_size; + unsigned int icacheline_size; + unsigned int dcacheline_size; } cacheinfo_t ; typedef struct cacheop_t @@ -183,12 +183,12 @@ void rt_hw_cache_init(void) end = (start + pcacheinfo->icache_size); /* - * 2. clear CP0 taglo/taghi register; + * 2. clear CP0 taglo/taghi register; */ pcacheop->Clear_TagLo(); /* - * 3. invalidate instruction cache; + * 3. invalidate instruction cache; */ while (start < end) { @@ -197,7 +197,7 @@ void rt_hw_cache_init(void) } /* - * 4. invalidate data cache; + * 4. invalidate data cache; */ start = K0BASE; end = (start + pcacheinfo->dcache_size); |