diff options
| author | zb1tree <[email protected]> | 2023-04-16 16:35:32 +0800 |
|---|---|---|
| committer | Man, Jianting (Meco) <[email protected]> | 2023-04-17 23:45:10 -0400 |
| commit | a25d3fd30133e7ff0087e63b3794bdf6463ca26b (patch) | |
| tree | ab3db4aacac592ae7bab82481de128eaa0537437 /libcpu/mips/gs232/cache.c | |
| parent | 9e680e9f86612a5f1c55693d4b3dee6f5697865a (diff) | |
fix:fixed variable misuse
Diffstat (limited to 'libcpu/mips/gs232/cache.c')
| -rw-r--r-- | libcpu/mips/gs232/cache.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libcpu/mips/gs232/cache.c b/libcpu/mips/gs232/cache.c index bcbf2aba49..87587441a9 100644 --- a/libcpu/mips/gs232/cache.c +++ b/libcpu/mips/gs232/cache.c @@ -124,8 +124,8 @@ void invalidate_writeback_dcache(unsigned long addr, int size) { unsigned long start, end; - start = (addr +pcacheinfo->dcacheline_size -1) & (- pcacheinfo->dcacheline_size); - end = (end + size + pcacheinfo->dcacheline_size -1) & ( -pcacheinfo->dcacheline_size); + start = (addr + pcacheinfo->dcacheline_size -1) & (- pcacheinfo->dcacheline_size); + end = (addr + size + pcacheinfo->dcacheline_size -1) & ( -pcacheinfo->dcacheline_size); while (start <end) { |