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authormichael <[email protected]>2021-01-31 21:56:30 +0800
committermichael <[email protected]>2021-01-31 21:56:30 +0800
commitd874ab11098e9384869db6ad4a86c5c5d65ca432 (patch)
tree5fbfb8aa5a5085820a7a48a87b48774c85e304b5 /libcpu/mips
parent0af3666882491d5336274ee37da9c564a0eca202 (diff)
mips:gs232:LS1C300 have 5 group INTC cells but LS1B have 4 group INTC cells
Diffstat (limited to 'libcpu/mips')
-rw-r--r--libcpu/mips/gs232/gs232.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/libcpu/mips/gs232/gs232.h b/libcpu/mips/gs232/gs232.h
index 6e90f7ba66..95c81cf93e 100644
--- a/libcpu/mips/gs232/gs232.h
+++ b/libcpu/mips/gs232/gs232.h
@@ -17,7 +17,14 @@
#define INTC_BASE 0xBFD01040
+#ifdef SOC_LS1B
+#define GS232_INTC_CELLS 4
+#endif
+
+#ifdef SOC_LS1C300
#define GS232_INTC_CELLS 5
+#endif
+
#define GS232_NR_IRQS (32 * GS232_INTC_CELLS)
#define GMAC0_BASE 0xBFE10000
@@ -64,4 +71,4 @@ extern void rt_hw_timer_init(void);
#endif
-#endif \ No newline at end of file
+#endif