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author勤为本 <[email protected]>2017-07-20 17:35:03 +0800
committer勤为本 <[email protected]>2017-07-20 17:35:03 +0800
commit358612c8a2fc7c178a8e3086128e6943b77e1979 (patch)
tree92689fb0c111db2a028366fc6a3895628d177949 /libcpu/mips
parentd1bb7c61f4d46d07ae0ce4735c857b742974cafb (diff)
支持GPIO中断(外部中断)
Diffstat (limited to 'libcpu/mips')
-rw-r--r--libcpu/mips/loongson_1c/ls1c.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/libcpu/mips/loongson_1c/ls1c.h b/libcpu/mips/loongson_1c/ls1c.h
index c47b9a42bb..a203810c37 100644
--- a/libcpu/mips/loongson_1c/ls1c.h
+++ b/libcpu/mips/loongson_1c/ls1c.h
@@ -77,6 +77,11 @@
#define LS1C_NR_IRQS (32*5)
+// GPIO��ź��жϺ�֮��Ļ���ת��
+#define LS1C_GPIO_TO_IRQ(GPIOn) (LS1C_GPIO_FIRST_IRQ + (GPIOn))
+#define LS1C_IRQ_TO_GPIO(IRQn) ((IRQn) - LS1C_GPIO_FIRST_IRQ)
+
+
struct ls1c_intc_regs
{
volatile unsigned int int_isr;