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authorShell <[email protected]>2024-09-02 16:38:42 +0800
committerMeco Man <[email protected]>2024-09-11 18:06:51 -0400
commit7528645f595f2b9d0e89a146ca477bb6849e64c5 (patch)
treeea7dbea2adbb908959f614497ce4b4d993c4399a /libcpu/risc-v/virt64/stack.h
parentadbbd24ad77ccb7cc6312c38360aeb1909b08e31 (diff)
feat: libcpu/risc-v: unify context on c906, virt64
Changes: - added config for NEW_CTX_SWITCH - used new context on c906 sched switch routine - update _rt_hw_stack_init to fit into NEW_CTX_SWITCH - separated vector ctx from the generic Signed-off-by: Shell <[email protected]>
Diffstat (limited to 'libcpu/risc-v/virt64/stack.h')
-rw-r--r--libcpu/risc-v/virt64/stack.h21
1 files changed, 16 insertions, 5 deletions
diff --git a/libcpu/risc-v/virt64/stack.h b/libcpu/risc-v/virt64/stack.h
index 4899c6f2c8..4302b26e1f 100644
--- a/libcpu/risc-v/virt64/stack.h
+++ b/libcpu/risc-v/virt64/stack.h
@@ -6,12 +6,23 @@
* Change Logs:
* Date Author Notes
* 2021-01-30 lizhirui first version
+ * 2021-11-18 JasonHu add fpu member
+ * 2022-10-22 Shell Support kernel mode RVV
*/
#ifndef __STACK_H__
#define __STACK_H__
+#include "stackframe.h"
+
#include <rtthread.h>
+
+typedef struct rt_hw_switch_frame
+{
+ uint64_t regs[RT_HW_SWITCH_CONTEXT_SIZE];
+} *rt_hw_switch_frame_t;
+
+
struct rt_hw_stack_frame
{
rt_ubase_t epc; /* epc - epc - program counter */
@@ -47,13 +58,13 @@ struct rt_hw_stack_frame
rt_ubase_t t5; /* x30 - t5 - temporary register 5 */
rt_ubase_t t6; /* x31 - t6 - temporary register 6 */
rt_ubase_t user_sp_exc_stack; /* sscratch - user mode sp/exception stack */
- rt_ubase_t __padding; /* align to 16bytes */
-#ifdef ENABLE_FPU
+ rt_ubase_t __padding; /* align to 16bytes */
+#ifdef ARCH_RISCV_FPU
rt_ubase_t f[CTX_FPU_REG_NR]; /* f0~f31 */
-#endif
-#ifdef ENABLE_VECTOR
+#endif /* ARCH_RISCV_FPU */
+#ifdef ARCH_RISCV_VECTOR
rt_ubase_t v[CTX_VECTOR_REG_NR];
-#endif
+#endif /* ARCH_RISCV_VECTOR */
};
#endif