diff options
| author | Bernard Xiong <[email protected]> | 2023-05-20 23:41:29 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-05-20 23:41:29 +0800 |
| commit | 4b4c3c85f2ac82f12d5527ef1a6794b2189a9eee (patch) | |
| tree | 8703fb21033f143017b17c83b00aef1b425a8e2a /libcpu/risc-v | |
| parent | 1e5dc5509e0fbc325df926c8911fdc2780e7cf4c (diff) | |
[atomic] add stdc atomic detection. (#7536)
Diffstat (limited to 'libcpu/risc-v')
| -rw-r--r-- | libcpu/risc-v/common/atomic_riscv.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/libcpu/risc-v/common/atomic_riscv.c b/libcpu/risc-v/common/atomic_riscv.c index 6a8cb99787..bc1561f2ee 100644 --- a/libcpu/risc-v/common/atomic_riscv.c +++ b/libcpu/risc-v/common/atomic_riscv.c @@ -12,7 +12,7 @@ rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoswap.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -23,7 +23,7 @@ rt_atomic_t rt_hw_atomic_exchange(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoadd.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -34,7 +34,7 @@ rt_atomic_t rt_hw_atomic_add(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; val = -val; #if __riscv_xlen == 32 asm volatile ("amoadd.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); @@ -46,7 +46,7 @@ rt_atomic_t rt_hw_atomic_sub(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoxor.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -57,7 +57,7 @@ rt_atomic_t rt_hw_atomic_xor(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoand.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -68,7 +68,7 @@ rt_atomic_t rt_hw_atomic_and(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoor.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -79,7 +79,7 @@ rt_atomic_t rt_hw_atomic_or(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoxor.w %0, x0, (%1)" : "=r"(result) : "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -90,7 +90,7 @@ rt_atomic_t rt_hw_atomic_load(volatile rt_atomic_t *ptr) void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoswap.w %0, %1, (%2)" : "=r"(result) : "r"(val), "r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -100,7 +100,7 @@ void rt_hw_atomic_store(volatile rt_atomic_t *ptr, rt_atomic_t val) rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr) { - rt_atomic_t result; + rt_atomic_t result = 0; rt_atomic_t temp = 1; #if __riscv_xlen == 32 asm volatile ("amoor.w %0, %1, (%2)" : "=r"(result) : "r"(temp), "r"(ptr) : "memory"); @@ -112,7 +112,7 @@ rt_atomic_t rt_hw_atomic_flag_test_and_set(volatile rt_atomic_t *ptr) void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr) { - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile ("amoand.w %0, x0, (%1)" : "=r"(result) :"r"(ptr) : "memory"); #elif __riscv_xlen == 64 @@ -120,16 +120,16 @@ void rt_hw_atomic_flag_clear(volatile rt_atomic_t *ptr) #endif } -rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, volatile rt_atomic_t *old, rt_atomic_t new) +rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, rt_atomic_t *old, rt_atomic_t desired) { rt_atomic_t tmp = *old; - rt_atomic_t result; + rt_atomic_t result = 0; #if __riscv_xlen == 32 asm volatile( " fence iorw, ow\n" "1: lr.w.aq %[result], (%[ptr])\n" " bne %[result], %[tmp], 2f\n" - " sc.w.rl %[tmp], %[new], (%[ptr])\n" + " sc.w.rl %[tmp], %[desired], (%[ptr])\n" " bnez %[tmp], 1b\n" " li %[result], 1\n" " j 3f\n" @@ -137,14 +137,14 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, vola " li %[result], 0\n" " 3:\n" : [result]"+r" (result), [tmp]"+r" (tmp), [ptr]"+r" (ptr) - : [new]"r" (new), [old]"r"(old) + : [desired]"r" (desired), [old]"r"(old) : "memory"); #elif __riscv_xlen == 64 asm volatile( " fence iorw, ow\n" "1: lr.d.aq %[result], (%[ptr])\n" " bne %[result], %[tmp], 2f\n" - " sc.d.rl %[tmp], %[new], (%[ptr])\n" + " sc.d.rl %[tmp], %[desired], (%[ptr])\n" " bnez %[tmp], 1b\n" " li %[result], 1\n" " j 3f\n" @@ -152,7 +152,7 @@ rt_atomic_t rt_hw_atomic_compare_exchange_strong(volatile rt_atomic_t *ptr, vola " li %[result], 0\n" " 3:\n" : [result]"+r" (result), [tmp]"+r" (tmp), [ptr]"+r" (ptr) - : [new]"r" (new), [old]"r"(old) + : [desired]"r" (desired), [old]"r"(old) : "memory"); #endif return result; |
