diff options
| author | kyle.hu.gz <[email protected]> | 2010-04-11 18:45:21 +0000 |
|---|---|---|
| committer | kyle.hu.gz <[email protected]> | 2010-04-11 18:45:21 +0000 |
| commit | 553d24f82b5740503b3e2ef5f55590ed1de8aa72 (patch) | |
| tree | e9b1cc942a54342d8042ab954f83a041fcd61c9f /libcpu | |
| parent | 5211e7ff8fbd9dd7737fa5c0d83b505bbba0c893 (diff) | |
Add AVR32 UC3 port.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@605 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/avr32/uc3/context_gcc.S | 97 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/cpu.c | 42 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/exception.S | 245 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/interrupt.c | 19 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/serial.c | 278 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/serial.h | 53 | ||||
| -rw-r--r-- | libcpu/avr32/uc3/stack.c | 57 |
7 files changed, 791 insertions, 0 deletions
diff --git a/libcpu/avr32/uc3/context_gcc.S b/libcpu/avr32/uc3/context_gcc.S new file mode 100644 index 0000000000..1201626ba8 --- /dev/null +++ b/libcpu/avr32/uc3/context_gcc.S @@ -0,0 +1,97 @@ +/*
+ * File : context.S
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-03-27 Kyle First version
+ */
+
+#define AVR32_SR 0
+#define AVR32_SR_GM_OFFSET 16
+
+.text
+
+/*
+ * rt_base_t rt_hw_interrupt_disable()
+ */
+.globl rt_hw_interrupt_disable
+.type rt_hw_interrupt_disable, %function
+rt_hw_interrupt_disable:
+ ssrf AVR32_SR_GM_OFFSET
+ mov pc, lr
+
+/*
+ * void rt_hw_interrupt_enable(rt_base_t level)
+ */
+.globl rt_hw_interrupt_enable
+.type rt_hw_interrupt_enable, %function
+rt_hw_interrupt_enable:
+ csrf AVR32_SR_GM_OFFSET
+ mov pc, lr
+
+/*
+ * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to)/*
+ * r8 --> from
+ * r9 --> to
+ */
+.globl rt_hw_context_switch
+.type rt_hw_context_switch, %function
+rt_hw_context_switch:
+ ssrf AVR32_SR_GM_OFFSET /* Disable global interrupt */
+ stm --sp, r8-r12, lr /* Push R8-R12, LR */
+ st.w --sp, lr /* Push LR (instead of PC) */
+ mfsr r8, AVR32_SR /* Read Status Register */
+ cbr r8, AVR32_SR_GM_OFFSET /* Clear GM bit */
+ st.w --sp, r8 /* Push SR */
+ stm --sp, r0-r7 /* Push R0-R7 */
+ /* Stack layout: R8-R12, LR, PC, SR, R0-R7 */
+
+ st.w r12[0], sp /* Store SP in preempted tasks TCB */
+ ld.w sp, r11[0] /* Get new task stack pointer */
+
+ ldm sp++, r0-r7 /* pop R0-R7 */
+ ld.w r8, sp++ /* pop SR */
+ mtsr AVR32_SR, r8 /* Restore SR */
+ ldm sp++, r8-r12, lr, pc/* Pop R8-R12, LR, PC and resume to thread */
+
+/*
+ * void rt_hw_context_switch_to(rt_uint32 to)/*
+ * r0 --> to
+ */
+.globl rt_hw_context_switch_to
+.type rt_hw_context_switch_to, %function
+rt_hw_context_switch_to:
+ ld.w sp, r12[0] /* Get new task stack pointer */
+
+ ldm sp++, r0-r7 /* pop R0-R7 */
+ ld.w r8, sp++ /* pop SR */
+ mtsr AVR32_SR, r8 /* Restore SR */
+ ldm sp++, r8-r12, lr, pc/* Pop R8-R12, LR, PC and resume execution */
+
+/*
+ * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)/*
+ */
+.globl rt_thread_switch_interrupt_flag
+.globl rt_interrupt_from_thread
+.globl rt_interrupt_to_thread
+.globl rt_hw_context_switch_interrupt
+.type rt_hw_context_switch_interrupt, %function
+rt_hw_context_switch_interrupt:
+ lda.w r8, rt_thread_switch_interrupt_flag
+ ld.w r9, r8[0]
+ cp.w r9, 1
+ breq _reswitch
+ mov r9, 1
+ st.w r8[0], r9
+ lda.w r8, rt_interrupt_from_thread
+ st.w r8[0], r12
+_reswitch:
+ lda.w r8, rt_interrupt_to_thread
+ st.w r8[0], r11
+ mov pc, lr
diff --git a/libcpu/avr32/uc3/cpu.c b/libcpu/avr32/uc3/cpu.c new file mode 100644 index 0000000000..503f2737b7 --- /dev/null +++ b/libcpu/avr32/uc3/cpu.c @@ -0,0 +1,42 @@ +/*
+ * File : cpu.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-03-30 Kyle First version
+ */
+
+#include <rtthread.h>
+
+/**
+ * @addtogroup AVR32UC3
+ */
+/*@{*/
+
+/**
+ * reset cpu by dog's time-out
+ *
+ */
+void rt_hw_cpu_reset()
+{
+ /*NOTREACHED*/
+}
+
+/**
+ * shutdown CPU
+ *
+ */
+void rt_hw_cpu_shutdown()
+{
+ rt_kprintf("shutdown...\n");
+
+ RT_ASSERT(0);
+}
+
+/*@}*/
diff --git a/libcpu/avr32/uc3/exception.S b/libcpu/avr32/uc3/exception.S new file mode 100644 index 0000000000..dabd93d889 --- /dev/null +++ b/libcpu/avr32/uc3/exception.S @@ -0,0 +1,245 @@ +/* This file is part of the ATMEL AVR32-UC3-SoftwareFramework-1.6.0 Release */
+ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Exception and interrupt vectors. + * + * This file maps all events supported by an AVR32. + * + * - Compiler: GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support and FAQ: http://support.atmel.no/ + * + ******************************************************************************/ + +/* Copyright (c) 2009 Atmel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an Atmel + * AVR product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +#if !__AVR32_UC__ && !__AVR32_AP__ + #error Implementation of the AVR32 architecture not supported by the INTC driver. +#endif + + +#include <avr32/io.h> + + +//! @{ +//! \verbatim + + + .section .exception, "ax", @progbits + + +// Start of Exception Vector Table. + + // EVBA must be aligned with a power of two strictly greater than the EVBA- + // relative offset of the last vector. + .balign 0x200 + + // Export symbol. + .global _evba + .type _evba, @function +_evba: + + .org 0x000 + // Unrecoverable Exception. +_handle_Unrecoverable_Exception: + rjmp $ + + .org 0x004 + // TLB Multiple Hit. +_handle_TLB_Multiple_Hit: + rjmp $ + + .org 0x008 + // Bus Error Data Fetch. +_handle_Bus_Error_Data_Fetch: + rjmp $ + + .org 0x00C + // Bus Error Instruction Fetch. +_handle_Bus_Error_Instruction_Fetch: + rjmp $ + + .org 0x010 + // NMI. +_handle_NMI: + rjmp $ + + .org 0x014 + // Instruction Address. +_handle_Instruction_Address: + rjmp $ + + .org 0x018 + // ITLB Protection. +_handle_ITLB_Protection: + rjmp $ + + .org 0x01C + // Breakpoint. +_handle_Breakpoint: + rjmp $ + + .org 0x020 + // Illegal Opcode. +_handle_Illegal_Opcode: + rjmp $ + + .org 0x024 + // Unimplemented Instruction. +_handle_Unimplemented_Instruction: + rjmp $ + + .org 0x028 + // Privilege Violation. +_handle_Privilege_Violation: + rjmp $ + + .org 0x02C + // Floating-Point: UNUSED IN AVR32UC and AVR32AP. +_handle_Floating_Point: + rjmp $ + + .org 0x030 + // Coprocessor Absent: UNUSED IN AVR32UC. +_handle_Coprocessor_Absent: + rjmp $ + + .org 0x034 + // Data Address (Read). +_handle_Data_Address_Read: + rjmp $ + + .org 0x038 + // Data Address (Write). +_handle_Data_Address_Write: + rjmp $ + + .org 0x03C + // DTLB Protection (Read). +_handle_DTLB_Protection_Read: + rjmp $ + + .org 0x040 + // DTLB Protection (Write). +_handle_DTLB_Protection_Write: + rjmp $ + + .org 0x044 + // DTLB Modified: UNUSED IN AVR32UC. +_handle_DTLB_Modified: + rjmp $ + + .org 0x050 + // ITLB Miss. +_handle_ITLB_Miss: + rjmp $ + + .org 0x060 + // DTLB Miss (Read). +_handle_DTLB_Miss_Read: + rjmp $ + + .org 0x070 + // DTLB Miss (Write). +_handle_DTLB_Miss_Write: + rjmp $ + + .org 0x100 + // Supervisor Call. +_handle_Supervisor_Call: + rjmp $ + + +// Interrupt support. +// The interrupt controller must provide the offset address relative to EVBA. +// Important note: +// All interrupts call a C function named _get_interrupt_handler. +// This function will read group and interrupt line number to then return in +// R12 a pointer to a user-provided interrupt handler. + + .balign 4 + + .irp priority, 0, 1, 2, 3 +_int\priority:
+ mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function. + call _get_interrupt_handler + cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
+ breq _spint\priority // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
+ call rt_interrupt_enter
+ icall r12
+ call rt_interrupt_leave
+_spint\priority:
+ lda.w r12, rt_thread_switch_interrupt_flag
+ ld.w r11, r12[0]
+ cp.w r11, 1
+ breq rt_hw_context_switch_interrupt_do
+ rete // If this was a spurious interrupt (R12 == NULL), return from event handler. + .endr +
+rt_hw_context_switch_interrupt_do:
+ ssrf AVR32_SR_GM_OFFSET /* Disable global interrupt */
+ mov r11, 0
+ st.w r12[0], r11 /* Clear rt_thread_switch_interrupt_flag */
+ stm --sp, r0-r7 /* Push R0-R7 */
+ lda.w r12, rt_interrupt_from_thread /* Get old thread SP */
+ ld.w r12, r12[0]
+ lda.w r11, rt_interrupt_to_thread /* Get new thread SP */
+ ld.w r11, r11[0]
+ st.w r12[0], sp /* Store old thead SP */
+ ld.w sp, r11[0] /* Load new thread SP */
+ ldm sp++, r0-r7 /* Pop R0-R7 (new thread) */
+ rete /* RETE pops R8-R12, LR, PC, SR automatically */ +
+ +// Constant data area. + + .balign 4 + + // Values to store in the interrupt priority registers for the various interrupt priority levels. + // The interrupt priority registers contain the interrupt priority level and + // the EVBA-relative interrupt vector offset. + .global ipr_val + .type ipr_val, @object +ipr_val: + .word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\ + (AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\ + (AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\ + (AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba) + + +//! \endverbatim +//! @} diff --git a/libcpu/avr32/uc3/interrupt.c b/libcpu/avr32/uc3/interrupt.c new file mode 100644 index 0000000000..7cfa71d50e --- /dev/null +++ b/libcpu/avr32/uc3/interrupt.c @@ -0,0 +1,19 @@ +/*
+ * File : interrupt.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
+ */
+
+#include <rtthread.h>
+#include "compiler.h"
+
+rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
+rt_uint32_t rt_thread_switch_interrupt_flag;
diff --git a/libcpu/avr32/uc3/serial.c b/libcpu/avr32/uc3/serial.c new file mode 100644 index 0000000000..e68423353f --- /dev/null +++ b/libcpu/avr32/uc3/serial.c @@ -0,0 +1,278 @@ +/*
+ * File : serial.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-02-05 Bernard first version
+ * 2009-10-25 Bernard fix rt_serial_read bug when there is no data
+ * in the buffer.
+ * 2010-03-29 Bernard cleanup code.
+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
+ */
+
+#include "serial.h"
+#include "compiler.h"
+#include "usart.h"
+#include "pdca.h"
+
+struct rt_device _rt_usart_device;
+struct avr32_serial_int_rx _rt_usart_rx;
+struct avr32_serial_device uart =
+{
+ .uart_device = (avr32_usart_t *) &AVR32_USART1,
+ .int_rx = &_rt_usart_rx
+};
+
+/**
+ * @addtogroup AVR32UC3
+ */
+/*@{*/
+
+/* RT-Thread Device Interface */
+static rt_err_t rt_serial_init (rt_device_t dev)
+{
+ struct avr32_serial_device* uart = (struct avr32_serial_device*) dev->private;
+
+ if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+ {
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ rt_memset(uart->int_rx->rx_buffer, 0, sizeof(uart->int_rx->rx_buffer));
+ uart->int_rx->read_index = 0;
+ uart->int_rx->save_index = 0;
+ }
+
+ dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+ }
+
+ return RT_EOK;
+}
+
+static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ return RT_EOK;
+}
+
+static rt_err_t rt_serial_close(rt_device_t dev)
+{
+ return RT_EOK;
+}
+
+static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ rt_uint8_t* ptr;
+ rt_err_t err_code;
+ struct avr32_serial_device* uart;
+
+ ptr = buffer;
+ err_code = RT_EOK;
+ uart = (struct avr32_serial_device*)dev->private;
+
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* interrupt mode Rx */
+ while (size)
+ {
+ rt_base_t level;
+
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+
+ if (uart->int_rx->read_index != uart->int_rx->save_index)
+ {
+ /* read a character */
+ *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+ size--;
+
+ /* move to next position */
+ uart->int_rx->read_index ++;
+ if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+ uart->int_rx->read_index = 0;
+ }
+ else
+ {
+ /* set error code */
+ err_code = -RT_EEMPTY;
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ break;
+ }
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ }
+ }
+ else
+ {
+ /* polling mode */
+ while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+ {
+ while (usart_test_hit(uart->uart_device))
+ {
+ *ptr = uart->uart_device->rhr & 0xff;
+ ptr ++;
+ }
+ }
+ }
+
+ /* set error code */
+ rt_set_errno(err_code);
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+ rt_uint8_t* ptr;
+ rt_err_t err_code;
+ struct avr32_serial_device* uart;
+
+ err_code = RT_EOK;
+ ptr = (rt_uint8_t*)buffer;
+ uart = (struct avr32_serial_device*)dev->private;
+
+ if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+ {
+ /* interrupt mode Tx, does not support */
+ RT_ASSERT(0);
+ }
+ else
+ {
+ /* polling mode */
+ if (dev->flag & RT_DEVICE_FLAG_STREAM)
+ {
+ /* stream mode */
+ while (size)
+ {
+ usart_putchar(uart->uart_device, (int) *ptr);
+
+ ++ptr; --size;
+ }
+ }
+ else
+ {
+ /* write data directly */
+ while (size)
+ {
+ while (usart_write_char(uart->uart_device, (int) *ptr) != USART_SUCCESS);
+
+ ++ptr; --size;
+ }
+ }
+ }
+
+ /* set error code */
+ rt_set_errno(err_code);
+
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+ struct avr32_serial_device* uart;
+
+ RT_ASSERT(dev != RT_NULL);
+
+ uart = (struct avr32_serial_device*)dev->private;
+ switch (cmd)
+ {
+ case RT_DEVICE_CTRL_SUSPEND:
+ /* suspend device */
+ dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+ break;
+
+ case RT_DEVICE_CTRL_RESUME:
+ /* resume device */
+ dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+ break;
+ }
+
+ return RT_EOK;
+}
+
+/*
+ * serial register for STM32
+ * support STM32F103VB and STM32F103ZE
+ */
+rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial)
+{
+ RT_ASSERT(device != RT_NULL);
+
+ if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
+ (flag & RT_DEVICE_FLAG_INT_TX))
+ {
+ RT_ASSERT(0);
+ }
+
+ device->type = RT_Device_Class_Char;
+ device->rx_indicate = RT_NULL;
+ device->tx_complete = RT_NULL;
+ device->init = rt_serial_init;
+ device->open = rt_serial_open;
+ device->close = rt_serial_close;
+ device->read = rt_serial_read;
+ device->write = rt_serial_write;
+ device->control = rt_serial_control;
+ device->private = serial;
+
+ /* register a character device */
+ return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+}
+
+/* ISR for serial interrupt */
+void rt_hw_serial_isr(void)
+{
+ struct avr32_serial_device* uart = (struct avr32_serial_device*) _rt_usart_device.private;
+ rt_base_t level;
+
+ if (usart_test_hit(uart->uart_device))
+ {
+ /* interrupt mode receive */
+ RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+
+ /* save character */
+ uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->rhr & 0xff;
+ uart->int_rx->save_index ++;
+ if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+ uart->int_rx->save_index = 0;
+
+ /* if the next position is read index, discard this 'read char' */
+ if (uart->int_rx->save_index == uart->int_rx->read_index)
+ {
+ uart->int_rx->read_index ++;
+ if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+ uart->int_rx->read_index = 0;
+ }
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+
+ /* invoke callback */
+ if (_rt_usart_device.rx_indicate != RT_NULL)
+ {
+ rt_size_t rx_length;
+
+ /* get rx length */
+ rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+ UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+ uart->int_rx->save_index - uart->int_rx->read_index;
+
+ _rt_usart_device.rx_indicate(&_rt_usart_device, rx_length);
+ }
+ }
+ else
+ {
+ usart_reset_status(uart->uart_device);
+ }
+}
+
+/*@}*/
diff --git a/libcpu/avr32/uc3/serial.h b/libcpu/avr32/uc3/serial.h new file mode 100644 index 0000000000..cadbfd1850 --- /dev/null +++ b/libcpu/avr32/uc3/serial.h @@ -0,0 +1,53 @@ +/*
+ * File : serial.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard first version
+ * 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
+ */
+#ifndef __RT_HW_SERIAL_H__
+#define __RT_HW_SERIAL_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "compiler.h"
+#include "usart.h"
+
+#define UART_RX_BUFFER_SIZE 64
+#define UART_TX_DMA_NODE_SIZE 4
+
+/* data node for Tx Mode */
+struct avr32_serial_data_node
+{
+ rt_uint8_t *data_ptr;
+ rt_size_t data_size;
+ struct avr32_serial_data_node *next, *prev;
+};
+
+struct avr32_serial_int_rx
+{
+ rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
+ rt_uint32_t read_index, save_index;
+};
+
+struct avr32_serial_device
+{
+ avr32_usart_t *uart_device;
+
+ /* rx structure */
+ struct avr32_serial_int_rx* int_rx;
+};
+
+rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial);
+
+void rt_hw_serial_isr();
+
+#endif
diff --git a/libcpu/avr32/uc3/stack.c b/libcpu/avr32/uc3/stack.c new file mode 100644 index 0000000000..e187f84ce6 --- /dev/null +++ b/libcpu/avr32/uc3/stack.c @@ -0,0 +1,57 @@ +/*
+ * File : stack.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-03-30 Kyle First version
+ */
+#include <rtthread.h>
+
+/**
+ * @addtogroup AVR32UC3
+ */
+/*@{*/
+
+/**
+ * This function will initialize thread stack
+ *
+ * @param tentry the entry of thread
+ * @param parameter the parameter of entry
+ * @param stack_addr the beginning stack address
+ * @param texit the function will be called when thread exit
+ *
+ * @return stack address
+ */
+rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
+{
+ unsigned long *stk;
+
+ stk = (unsigned long *)stack_addr;
+ *(stk) = 0; /* r8 */
+ *(--stk) = 0; /* r9 */
+ *(--stk) = 0; /* r10 */
+ *(--stk) = 0; /* r11 */
+ *(--stk) = 0; /* r12 */
+ *(--stk) = (unsigned long)texit; /* lr */
+ *(--stk) = (unsigned long)tentry; /* entry point, pc */
+ *(--stk) = 0x00600000; /* sr */
+ *(--stk) = 0; /* r0 */
+ *(--stk) = 0; /* r1 */
+ *(--stk) = 0; /* r2 */
+ *(--stk) = 0; /* r3 */
+ *(--stk) = 0; /* r4 */
+ *(--stk) = 0; /* r5 */
+ *(--stk) = 0; /* r6 */
+ *(--stk) = 0; /* r7 */
+
+ /* return task's current stack address */
+ return (rt_uint8_t *)stk;
+}
+
+/*@}*/
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