[BSP] cleanup for hifive1 bsp.

1 files changed, 64 insertions, 64 deletions

diff --git a/libcpu/risc-v/e310/start_gcc.S b/libcpu/risc-v/e310/start_gcc.S
index 8ed2a03d37..5f1b087b78 100644
--- a/libcpu/risc-v/e310/start_gcc.S
+++ b/libcpu/risc-v/e310/start_gcc.S
@@ -21,7 +21,7 @@
 ; * Date           Author       Notes
 ; * 2017-07-16     zhangjun    for hifive1
 ; */
-#include <sifive/smp.h>
+#include "sifive/smp.h"
 #define CLINT_CTRL_ADDR 0x02000000
 
 .section .init
@@ -29,116 +29,116 @@
 .type _start,@function
 
 _start:
-	.cfi_startproc
-	.cfi_undefined ra
+    .cfi_startproc
+    .cfi_undefined ra
 .option push
 .option norelax
-	la gp, __global_pointer$
+    la gp, __global_pointer$
 .option pop
-	la sp, _sp
+    la sp, _sp
 /*
  *disable all interrupt at startup
  */
-	csrrc a5, mstatus, 0xb
+    csrrc a5, mstatus, 0xb
 
 #if defined(ENABLE_SMP)
-	smp_pause(t0, t1)
+    smp_pause(t0, t1)
 #endif
 
-	/* Load data section */
-	la a0, _data_lma
-	la a1, _data
-	la a2, _edata
-	bgeu a1, a2, 2f
+    /* Load data section */
+    la a0, _data_lma
+    la a1, _data
+    la a2, _edata
+    bgeu a1, a2, 2f
 1:
-	lw t0, (a0)
-	sw t0, (a1)
-	addi a0, a0, 4
-	addi a1, a1, 4
-	bltu a1, a2, 1b
+    lw t0, (a0)
+    sw t0, (a1)
+    addi a0, a0, 4
+    addi a1, a1, 4
+    bltu a1, a2, 1b
 2:
 
-	/* Clear bss section */
-	la a0, __bss_start
-	la a1, _end
-	bgeu a0, a1, 2f
+    /* Clear bss section */
+    la a0, __bss_start
+    la a1, _end
+    bgeu a0, a1, 2f
 1:
-	sw zero, (a0)
-	addi a0, a0, 4
-	bltu a0, a1, 1b
+    sw zero, (a0)
+    addi a0, a0, 4
+    bltu a0, a1, 1b
 2:
 
-	/* Call global constructors */
-	la a0, __libc_fini_array
-	call atexit
-	call __libc_init_array
-	/*call _init directly in rt-thread*/
+    /* Call global constructors */
+    la a0, __libc_fini_array
+    call atexit
+    call __libc_init_array
+    /*call _init directly in rt-thread*/
         call _init
 
 #ifndef __riscv_float_abi_soft
-	/* Enable FPU */
-	li t0, MSTATUS_FS
-	csrs mstatus, t0
-	csrr t1, mstatus
-	and t1, t1, t0
-	beqz t1, 1f
-	fssr x0
+    /* Enable FPU */
+    li t0, MSTATUS_FS
+    csrs mstatus, t0
+    csrr t1, mstatus
+    and t1, t1, t0
+    beqz t1, 1f
+    fssr x0
 1:
 #endif
 
 #if defined(ENABLE_SMP)
-	smp_resume(t0, t1)
+    smp_resume(t0, t1)
 
-	csrr a0, mhartid
-	bnez a0, 2f
+    csrr a0, mhartid
+    bnez a0, 2f
 #endif
 
-	auipc ra, 0
-	addi sp, sp, -16
+    auipc ra, 0
+    addi sp, sp, -16
 #if __riscv_xlen == 32
-	sw ra, 8(sp)
+    sw ra, 8(sp)
 #else
-	sd ra, 8(sp)
+    sd ra, 8(sp)
 #endif
 
-	/* argc = argv = 0 */
-	li a0, 0
-	li a1, 0
-	call main
-	tail exit
+    /* argc = argv = 0 */
+    li a0, 0
+    li a1, 0
+    call main
+    tail exit
 1:
-	j 1b
+    j 1b
 
 #if defined(ENABLE_SMP)
 2:
-	la t0, trap_entry
-	csrw mtvec, t0
+    la t0, trap_entry
+    csrw mtvec, t0
 
-	csrr a0, mhartid
-	la t1, _sp
-	slli t0, a0, 10
-	sub sp, t1, t0
+    csrr a0, mhartid
+    la t1, _sp
+    slli t0, a0, 10
+    sub sp, t1, t0
 
-	auipc ra, 0
-	addi sp, sp, -16
+    auipc ra, 0
+    addi sp, sp, -16
 #if __riscv_xlen == 32
-	sw ra, 8(sp)
+    sw ra, 8(sp)
 #else
-	sd ra, 8(sp)
+    sd ra, 8(sp)
 #endif
 
-	call secondary_main
-	tail exit
+    call secondary_main
+    tail exit
 
 1:
-	j 1b
+    j 1b
 #endif
-	.cfi_endproc
+    .cfi_endproc
 
 #include "encoding.h"
 #include "sifive/bits.h"
 
-  .section      .text.entry	
+  .section      .text.entry 
   .align 2
   .global trap_entry
 trap_entry: