[bsp][synopsys] add basic new embarc bsp support

* the initial support of synopsys designware ARC processor
  using embARC_BSP, all synopsys ARC-based boards are
  supported:
  -ARC Software Development Platform
  -ARC EM Starter Kit
  -ARC EM Software Development Platform
  -ARC HS Development Kit
  -ARC IoT Development Kit

* The embARC BSP is a new generation embARC software development
  package.  ​It is designed to be the inter-layer between hardware and
  operating system. ​ BSP could hide the difference of hardware/boards,
  provide a unified interface to upper-layer.

* the initial support of synopsys MWDT toolchain.
  The DesignWare® ARC® MetaWare Development Toolkit builds upon
  a 25-year legacy of industry-leading compiler and debugger products.
  It is a complete solution that contains all the components needed to
  support the development, debugging and tuning of embedded applications
  for the DesignWare ARC processors.

* for detailed board information, pls go embarc.org.

Signed-off-by: Watson Zeng <[email protected]>

3 files changed, 154 insertions, 40 deletions

diff --git a/libcpu/arc/em/SConscript b/libcpu/arc/em/SConscript
index 49c32b689d..ff1d8c134d 100644
--- a/libcpu/arc/em/SConscript
+++ b/libcpu/arc/em/SConscript
@@ -8,9 +8,7 @@ cwd     = GetCurrentDir()
 src     = Glob('*.c')
 CPPPATH = [cwd]
 
-
-if rtconfig.PLATFORM == 'gcc':
-    src += Glob('*_gcc.S')
+src += Glob('*.S')
 
 group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
 
diff --git a/libcpu/arc/em/contex_gcc.S b/libcpu/arc/em/contex_gcc_mw.S
index a8abe089bf..81b291c1c8 100644
--- a/libcpu/arc/em/contex_gcc.S
+++ b/libcpu/arc/em/contex_gcc_mw.S
@@ -4,20 +4,43 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #define __ASSEMBLY__
-#include "inc/arc/arc.h"
-#include "inc/arc/arc_asm_common.h"
+#include "include/arc/arc.h"
+#include "include/arc/arc_asm_common.h"
 
-.global rt_interrupt_enter; .type rt_interrupt_enter, %function
-.global rt_interrupt_leave; .type rt_interrupt_leave, %function
-.global context_switch_reqflg; .type context_switch_reqflg, %object
-.global rt_interrupt_from_thread; .type rt_interrupt_from_thread, %object
-.global rt_interrupt_to_thread; .type rt_interrupt_to_thread, %object
+.global rt_interrupt_enter;
+.global rt_interrupt_leave;
+.global context_switch_reqflg;
+.global rt_interrupt_from_thread;
+.global rt_interrupt_to_thread;
+.global exc_nest_count;
+.global set_hw_stack_check;
 
 	.text
 	.align 4
 dispatcher:
 	st sp, [r0]
 	ld sp, [r1]
+#if ARC_FEATURE_STACK_CHECK
+#if ARC_FEATURE_SEC_PRESENT
+	lr r0, [AUX_SEC_STAT]
+	bclr r0, r0, AUX_SEC_STAT_BIT_SSC
+	sflag r0
+#else
+	lr r0, [AUX_STATUS32]
+	bclr r0, r0, AUX_STATUS_BIT_SC
+	kflag r0
+#endif
+	jl	set_hw_stack_check
+#if ARC_FEATURE_SEC_PRESENT
+	lr r0, [AUX_SEC_STAT]
+	bset r0, r0, AUX_SEC_STAT_BIT_SSC
+	sflag r0
+#else
+	lr r0, [AUX_STATUS32]
+	bset r0, r0, AUX_STATUS_BIT_SC
+	kflag r0
+#endif
+#endif
 	pop r0
 	j [r0]
 
@@ -29,8 +52,8 @@ dispatch_r:
 /*
  * rt_base_t rt_hw_interrupt_disable();
  */
-.global rt_hw_interrupt_disable
-.type rt_hw_interrupt_disable, %function
+	.global rt_hw_interrupt_disable
+	.align 4
 rt_hw_interrupt_disable:
  	clri r0
  	j [blink]
@@ -39,15 +62,15 @@ rt_hw_interrupt_disable:
 /*
  * void rt_hw_interrupt_enable(rt_base_t level);
  */
-.global rt_hw_interrupt_enable
-.type rt_hw_interrupt_enable, %function
+	.global rt_hw_interrupt_enable
+	.align 4
 rt_hw_interrupt_enable:
 	seti r0
 	j [blink]
 
 
-.global rt_hw_context_switch_interrupt
-.type rt_hw_context_switch_interrupt, %function
+	.global rt_hw_context_switch_interrupt
+	.align 4
 rt_hw_context_switch_interrupt:
 	st r0, [rt_interrupt_from_thread]
 	st r1, [rt_interrupt_to_thread]
@@ -61,8 +84,8 @@ rt_hw_context_switch_interrupt:
  * r0 --> from
  * r1 --> to
  */
-.global rt_hw_context_switch
-.type rt_hw_context_switch, %function
+	.global rt_hw_context_switch
+	.align 4
 rt_hw_context_switch:
 	SAVE_NONSCRATCH_REGS
 	mov r2, dispatch_r
@@ -74,15 +97,37 @@ rt_hw_context_switch:
  * void rt_hw_context_switch_to(rt_uint32 to);
  * r0 --> to
  */
-.global rt_hw_context_switch_to
-.type rt_hw_context_switch_to, %function
+	.global rt_hw_context_switch_to
+	.align 4
 rt_hw_context_switch_to:
 	ld sp, [r0]
+#if ARC_FEATURE_STACK_CHECK
+	mov r1, r0
+#if ARC_FEATURE_SEC_PRESENT
+	lr r0, [AUX_SEC_STAT]
+	bclr r0, r0, AUX_SEC_STAT_BIT_SSC
+	sflag r0
+#else
+	lr r0, [AUX_STATUS32]
+	bclr r0, r0, AUX_STATUS_BIT_SC
+	kflag r0
+#endif
+	jl	set_hw_stack_check
+#if ARC_FEATURE_SEC_PRESENT
+	lr r0, [AUX_SEC_STAT]
+	bset r0, r0, AUX_SEC_STAT_BIT_SSC
+	sflag r0
+#else
+	lr r0, [AUX_STATUS32]
+	bset r0, r0, AUX_STATUS_BIT_SC
+	kflag r0
+#endif
+#endif
 	pop r0
 	j [r0]
 
-.global start_r
-.type start_r, %function
+	.global start_r
+	.align 4
 start_r:
 	pop blink;
 	pop r1
@@ -92,6 +137,19 @@ start_r:
 	j_s.d [r1]
 	kflag r2
 
+/*
+ * int __rt_ffs(int value);
+ * r0 --> value
+ */
+	.global __rt_ffs
+	.align 4
+__rt_ffs:
+	breq r0, 0, __rt_ffs_return
+	ffs r1, r0
+	add r0, r1, 1
+__rt_ffs_return:
+	j [blink]
+
 /****** exceptions and interrupts handing ******/
 /****** entry for exception handling ******/
 	.global exc_entry_cpu
@@ -106,8 +164,7 @@ exc_entry_cpu:
 	ld	r0, [exc_nest_count]
 	add	r1, r0, 1
 	st	r1, [exc_nest_count]
-	cmp	r0, 0
-	bne	exc_handler_1
+	brne	r0, 0, exc_handler_1
 /* change to exception stack if interrupt happened in task context */
 	mov	sp, _e_stack
 exc_handler_1:
@@ -127,13 +184,13 @@ ret_exc:
 	mov	r1, exc_nest_count
 	ld	r0, [r1]
 	sub	r0, r0, 1
-	cmp	r0, 0
-	bne.d	ret_exc_1
 	st	r0, [r1]
+	brne	r0, 0, ret_exc_1 /* nest exception case */
+	lr	r1, [AUX_IRQ_ACT] /* nest interrupt case */
+	brne	r1, 0, ret_exc_1
 
 	ld	r0, [context_switch_reqflg]
-	cmp	r0, 0
-	bne	ret_exc_2
+	brne	r0, 0, ret_exc_2
 ret_exc_1:	/* return from non-task context, interrupts or exceptions are nested */
 	EXCEPTION_EPILOGUE
 	rtie
@@ -196,10 +253,20 @@ exc_entry_int:
 	st	r2, [exc_nest_count]
 	seti	/* enable higher priority interrupt */
 
-	cmp	r3, 0
-	bne	irq_handler_1
+	brne	r3, 0, irq_handler_1
 /* change to exception stack if interrupt happened in task context */
 	mov	sp, _e_stack
+#if ARC_FEATURE_STACK_CHECK
+#if ARC_FEATURE_SEC_PRESENT
+	lr r0, [AUX_SEC_STAT]
+	bclr r0, r0, AUX_SEC_STAT_BIT_SSC
+	sflag r0
+#else
+	lr r0, [AUX_STATUS32]
+	bclr r0, r0, AUX_STATUS_BIT_SC
+	kflag r0
+#endif
+#endif
 irq_handler_1:
 	PUSH	blink
 
@@ -228,13 +295,17 @@ ret_int:
 	mov	r1, exc_nest_count
 	ld	r0, [r1]
 	sub	r0, r0, 1
-	cmp	r0, 0
-	bne.d	ret_int_1
 	st	r0, [r1]
+/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */
+	lr	r0, [AUX_IRQ_CAUSE]
+	sr	r0, [AUX_IRQ_SELECT]
+	lr 	r3, [AUX_IRQ_PRIORITY]
+	lr	r1, [AUX_IRQ_ACT]
+	bclr	r2, r1, r3
+	brne	r2, 0, ret_int_1
 
 	ld	r0, [context_switch_reqflg]
-	cmp	r0, 0
-	bne	ret_int_2
+	brne	r0, 0, ret_int_2
 ret_int_1:	/* return from non-task context */
 	INTERRUPT_EPILOGUE
 	rtie
@@ -263,4 +334,31 @@ ret_int_r:
 	/* recover AUX_IRQ_ACT to restore the interrup status */
 	POPAX	AUX_IRQ_ACT
 	INTERRUPT_EPILOGUE
-	rtie
\ No newline at end of file
+	rtie
+
+/****** entry for fast irq exception handling ******/
+	.global exc_entry_firq
+	.weak exc_entry_firq
+	.align 4
+exc_entry_firq:
+	SAVE_FIQ_EXC_REGS
+
+	lr	r0, [AUX_IRQ_CAUSE]
+	mov	r1, exc_int_handler_table
+/* r2 = _kernel_exc_tbl + irqno *4 */
+	ld.as	r2, [r1, r0]
+
+/* for the case of software triggered interrupt */
+	lr	r3, [AUX_IRQ_HINT]
+	cmp	r3, r0
+	bne.d	firq_hint_handled
+	xor	r3, r3, r3
+	sr	r3, [AUX_IRQ_HINT]
+firq_hint_handled:
+/* jump to interrupt handler */
+	mov	r0, sp
+	jl	[r2]
+
+firq_return:
+	RESTORE_FIQ_EXC_REGS
+	rtie
diff --git a/libcpu/arc/em/cpuport.c b/libcpu/arc/em/cpuport.c
index 88c2e12f9b..34f538881f 100644
--- a/libcpu/arc/em/cpuport.c
+++ b/libcpu/arc/em/cpuport.c
@@ -5,11 +5,13 @@
  */
 #include <rtthread.h>
 
-#include "inc/arc/arc_exception.h"
-
-/* enable interrupt and set interrupt priority mask */
-#define ARC_INIT_STATUS (AUX_STATUS_MASK_IE | ((-1 - INT_PRI_MIN) << 1))
+#include "arc/arc_exception.h"
 
+#if ARC_FEATURE_STACK_CHECK
+#define ARC_INIT_STATUS ((1 << AUX_STATUS_BIT_SC) | AUX_STATUS_MASK_IE | ((-1 - INT_PRI_MIN) << 1) | STATUS32_RESET_VALUE)
+#else
+#define ARC_INIT_STATUS (AUX_STATUS_MASK_IE | ((-1 - INT_PRI_MIN) << 1) | STATUS32_RESET_VALUE)
+#endif
 
 extern void start_r(void);
 
@@ -17,6 +19,7 @@ extern void start_r(void);
 rt_uint32_t context_switch_reqflg;
 rt_uint32_t rt_interrupt_from_thread;
 rt_uint32_t rt_interrupt_to_thread;
+rt_uint32_t exc_nest_count;
 
 struct init_stack_frame {
 	rt_uint32_t pc;
@@ -66,4 +69,19 @@ rt_uint8_t *rt_hw_stack_init(void       *tentry,
 void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context))
 {
     exception_handle = exception_handle;
-}
\ No newline at end of file
+}
+
+void set_hw_stack_check(rt_uint32_t *from, rt_uint32_t *to)
+{
+    struct rt_thread *rt_thread_to;
+	if (to != NULL) {
+        rt_thread_to = rt_container_of(to, struct rt_thread, sp);
+#if ARC_FEATURE_SEC_PRESENT
+		arc_aux_write(AUX_S_KSTACK_TOP, (uint32_t)(rt_thread_to->stack_addr));
+		arc_aux_write(AUX_S_KSTACK_BASE, (uint32_t)(rt_thread_to->stack_addr)+rt_thread_to->stack_size);
+#else
+		arc_aux_write(AUX_KSTACK_TOP, (uint32_t)(rt_thread_to->stack_addr));
+		arc_aux_write(AUX_KSTACK_BASE, (uint32_t)(rt_thread_to->stack_addr)+rt_thread_to->stack_size);
+#endif
+	}
+}