code format

7 files changed, 120 insertions, 121 deletions

diff --git a/libcpu/mips/gs264/cache.c b/libcpu/mips/gs264/cache.c
index cfb4c6bb3c..54d38d0d3f 100644
--- a/libcpu/mips/gs264/cache.c
+++ b/libcpu/mips/gs264/cache.c
@@ -67,4 +67,4 @@ rt_base_t rt_hw_cpu_icache_status(void)
 rt_base_t rt_hw_cpu_dcache_status(void)
 {
     return 0;
-}
\ No newline at end of file
+}
diff --git a/libcpu/mips/gs264/cpuinit_gcc.S b/libcpu/mips/gs264/cpuinit_gcc.S
index bd84663350..592fedd88a 100644
--- a/libcpu/mips/gs264/cpuinit_gcc.S
+++ b/libcpu/mips/gs264/cpuinit_gcc.S
@@ -19,8 +19,8 @@
 
     .globl  rt_cpu_early_init
 rt_cpu_early_init:
-     mfc0	t0, CP0_CONFIG
-     ori	t0, 3
-     mtc0	t0, CP0_CONFIG
+     mfc0    t0, CP0_CONFIG
+     ori     t0, 3
+     mtc0    t0, CP0_CONFIG
      ehb
-     jr	ra
\ No newline at end of file
+     jr      ra
diff --git a/libcpu/mips/gs264/mips_mmu.c b/libcpu/mips/gs264/mips_mmu.c
index bfc694ab45..7bed69596a 100644
--- a/libcpu/mips/gs264/mips_mmu.c
+++ b/libcpu/mips/gs264/mips_mmu.c
@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2020-07-26 	  lizhirui 	   the first version
+ * 2020-07-26     lizhirui     the first version
  */
 
 #include <string.h>
@@ -205,18 +205,18 @@ uint64_t mmu_tlb_get_bad_vaddr()
 
 void tlb_dump()
 {
-	uint32_t max_index = mmu_get_max_tlb_index();
-	//uint32_t max_index = 10;
-	uint32_t entry;
-	tlb_item_t tlb_item;
+    uint32_t max_index = mmu_get_max_tlb_index();
+    //uint32_t max_index = 10;
+    uint32_t entry;
+    tlb_item_t tlb_item;
 
-	for(entry = 0;entry <= max_index;entry++)
-	{
-		mmu_tlb_read(entry,&tlb_item);
-		//mmu_tlb_write_indexed(entry,&tlb_item);
-		//mmu_tlb_read(entry,&tlb_item);
-		rt_kprintf("vpn = 0x%p,ppn0 = 0x%p,ppn1 = 0x%p\n",(uint64_t)tlb_item.entry_hi.vpn2 << 13 | (uint64_t)tlb_item.entry_hi.asid << 62,(uint64_t)tlb_item.entry_lo[0].pfn << 12,(uint64_t)tlb_item.entry_lo[1].pfn << 12);
-		rt_kprintf("v = %d,d = %d,g = %d,ri = %d,xi = %d,c = %d\n",tlb_item.entry_lo[0].v,tlb_item.entry_lo[0].d,tlb_item.entry_lo[0].g,tlb_item.entry_lo[0].ri,tlb_item.entry_lo[0].xi,tlb_item.entry_lo[0].c);
-		rt_kprintf("v = %d,d = %d,g = %d,ri = %d,xi = %d,c = %d\n",tlb_item.entry_lo[1].v,tlb_item.entry_lo[1].d,tlb_item.entry_lo[1].g,tlb_item.entry_lo[1].ri,tlb_item.entry_lo[1].xi,tlb_item.entry_lo[1].c);
-	}
-}
\ No newline at end of file
+    for(entry = 0;entry <= max_index;entry++)
+    {
+        mmu_tlb_read(entry,&tlb_item);
+        //mmu_tlb_write_indexed(entry,&tlb_item);
+        //mmu_tlb_read(entry,&tlb_item);
+        rt_kprintf("vpn = 0x%p,ppn0 = 0x%p,ppn1 = 0x%p\n",(uint64_t)tlb_item.entry_hi.vpn2 << 13 | (uint64_t)tlb_item.entry_hi.asid << 62,(uint64_t)tlb_item.entry_lo[0].pfn << 12,(uint64_t)tlb_item.entry_lo[1].pfn << 12);
+        rt_kprintf("v = %d,d = %d,g = %d,ri = %d,xi = %d,c = %d\n",tlb_item.entry_lo[0].v,tlb_item.entry_lo[0].d,tlb_item.entry_lo[0].g,tlb_item.entry_lo[0].ri,tlb_item.entry_lo[0].xi,tlb_item.entry_lo[0].c);
+        rt_kprintf("v = %d,d = %d,g = %d,ri = %d,xi = %d,c = %d\n",tlb_item.entry_lo[1].v,tlb_item.entry_lo[1].d,tlb_item.entry_lo[1].g,tlb_item.entry_lo[1].ri,tlb_item.entry_lo[1].xi,tlb_item.entry_lo[1].c);
+    }
+}
diff --git a/libcpu/mips/gs264/mips_mmu.h b/libcpu/mips/gs264/mips_mmu.h
index c0b33ecf89..fcbcef3621 100644
--- a/libcpu/mips/gs264/mips_mmu.h
+++ b/libcpu/mips/gs264/mips_mmu.h
@@ -5,96 +5,95 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2020-07-26 	  lizhirui 	   the first version
+ * 2020-07-26     lizhirui     the first version
  */
-
 #ifndef __MIPS_MMU_H__
 #define __MIPS_MMU_H__
 
-    typedef enum cpu_mode_t
-    {
-        CPU_MODE_KERNEL = 0x00,
-        CPU_MODE_SUPERVISOR = 0x01,
-        CPU_MODE_USER = 0x02
-    }cpu_mode_t;
+typedef enum cpu_mode_t
+{
+    CPU_MODE_KERNEL = 0x00,
+    CPU_MODE_SUPERVISOR = 0x01,
+    CPU_MODE_USER = 0x02
+}cpu_mode_t;
 
-    typedef enum page_mask_enum_t
-    {
-        PAGE_MASK_4KB = 0x00,
-        PAGE_MASK_16KB = 0x03,
-        PAGE_MASK_64KB = 0x0F,
-        PAGE_MASK_256KB = 0x3F,
-        PAGE_MASK_1MB = 0xFF,
-        PAGE_MASK_4MB = 0x3FF,
-        PAGE_MASK_16MB = 0xFFF,
-        PAGE_MASK_64MB = 0x3FFF,
-        PAGE_MASK_256MB = 0xFFFF,
-        PAGE_MASK_1GB = 0x3FFFF
-    }page_mask_enum_t;
+typedef enum page_mask_enum_t
+{
+    PAGE_MASK_4KB = 0x00,
+    PAGE_MASK_16KB = 0x03,
+    PAGE_MASK_64KB = 0x0F,
+    PAGE_MASK_256KB = 0x3F,
+    PAGE_MASK_1MB = 0xFF,
+    PAGE_MASK_4MB = 0x3FF,
+    PAGE_MASK_16MB = 0xFFF,
+    PAGE_MASK_64MB = 0x3FFF,
+    PAGE_MASK_256MB = 0xFFFF,
+    PAGE_MASK_1GB = 0x3FFFF
+}page_mask_enum_t;
 
-    typedef struct page_mask_t
-    {
-        uint64_t : 11;
-        uint64_t : 2;
-        uint64_t mask : 18;
-        uint64_t : 33;
-    }page_mask_t;
+typedef struct page_mask_t
+{
+    uint64_t : 11;
+    uint64_t : 2;
+    uint64_t mask : 18;
+    uint64_t : 33;
+}page_mask_t;
 
-    typedef struct entry_lo_t
-    {
-        uint64_t g : 1;
-        uint64_t v : 1;
-        uint64_t d : 1;
-        uint64_t c : 3;
-        uint64_t pfn : 24;
-        uint64_t pfnx : 3;
-        uint64_t : 29;
-        uint64_t xi : 1;
-        uint64_t ri : 1;
-    }entry_lo_t;
+typedef struct entry_lo_t
+{
+    uint64_t g : 1;
+    uint64_t v : 1;
+    uint64_t d : 1;
+    uint64_t c : 3;
+    uint64_t pfn : 24;
+    uint64_t pfnx : 3;
+    uint64_t : 29;
+    uint64_t xi : 1;
+    uint64_t ri : 1;
+}entry_lo_t;
 
-    typedef struct entry_hi_t
-    {
-        uint64_t asid : 8;
-        uint64_t : 5;
-        uint64_t vpn2 : 27;
-        uint64_t : 22;
-        uint64_t r : 2;
-    }entry_hi_t;
+typedef struct entry_hi_t
+{
+    uint64_t asid : 8;
+    uint64_t : 5;
+    uint64_t vpn2 : 27;
+    uint64_t : 22;
+    uint64_t r : 2;
+}entry_hi_t;
 
-    typedef struct tlb_item_t
-    {
-        entry_lo_t entry_lo[2];
-        entry_hi_t entry_hi;
-        page_mask_t page_mask;
-    }tlb_item_t;
+typedef struct tlb_item_t
+{
+    entry_lo_t entry_lo[2];
+    entry_hi_t entry_hi;
+    page_mask_t page_mask;
+}tlb_item_t;
 
-    #define read_c0_diag()		__read_32bit_c0_register($22, 0)
-    #define write_c0_diag(val)	__write_32bit_c0_register($22, 0, val)
-    #define read_c0_badvaddr()  __read_64bit_c0_register($8, 0)
-    #define read_c0_random()  __read_32bit_c0_register($1, 0)
+#define read_c0_diag()        __read_32bit_c0_register($22, 0)
+#define write_c0_diag(val)    __write_32bit_c0_register($22, 0, val)
+#define read_c0_badvaddr()    __read_64bit_c0_register($8, 0)
+#define read_c0_random()      __read_32bit_c0_register($1, 0)
 
-    #define reg_type_convert(variable,new_type) *((new_type *)(&variable))
-    #define lowbit(x) ((x) & (-(x)))
+#define reg_type_convert(variable,new_type) *((new_type *)(&variable))
+#define lowbit(x) ((x) & (-(x)))
 
-    void mmu_init();
-    void mmu_set_cpu_mode(cpu_mode_t cpu_mode);
-    cpu_mode_t mmu_get_cpu_mode();
-    void mmu_clear_tlb();
-    void mmu_clear_itlb();
-    uint32_t mmu_get_max_tlb_index();
-    void mmu_tlb_write_indexed(uint32_t index,tlb_item_t *tlb_item);
-    void mmu_tlb_write_random(tlb_item_t *tlb_item);
-    void mmu_tlb_read(uint32_t index,tlb_item_t *tlb_item);
-    uint32_t mmu_tlb_find(uint64_t vpn,uint32_t asid,uint32_t *index);
-    void mmu_tlb_item_init(tlb_item_t *tlb_item);
-    void mmu_set_map(uint64_t vpn,uint64_t ppn,page_mask_enum_t page_mask,uint32_t asid,uint32_t global);
-    uint32_t mmu_tlb_get_random();
-    uint32_t mmu_tlb_get_index();
-    void mmu_tlb_set_index(uint32_t index);
-    uint32_t mmu_tlb_is_matched();
-    uint64_t mmu_tlb_get_bad_vaddr();
+void mmu_init();
+void mmu_set_cpu_mode(cpu_mode_t cpu_mode);
+cpu_mode_t mmu_get_cpu_mode();
+void mmu_clear_tlb();
+void mmu_clear_itlb();
+uint32_t mmu_get_max_tlb_index();
+void mmu_tlb_write_indexed(uint32_t index,tlb_item_t *tlb_item);
+void mmu_tlb_write_random(tlb_item_t *tlb_item);
+void mmu_tlb_read(uint32_t index,tlb_item_t *tlb_item);
+uint32_t mmu_tlb_find(uint64_t vpn,uint32_t asid,uint32_t *index);
+void mmu_tlb_item_init(tlb_item_t *tlb_item);
+void mmu_set_map(uint64_t vpn,uint64_t ppn,page_mask_enum_t page_mask,uint32_t asid,uint32_t global);
+uint32_t mmu_tlb_get_random();
+uint32_t mmu_tlb_get_index();
+void mmu_tlb_set_index(uint32_t index);
+uint32_t mmu_tlb_is_matched();
+uint64_t mmu_tlb_get_bad_vaddr();
 
-    void tlb_dump();
+void tlb_dump();
 
 #endif
\ No newline at end of file
diff --git a/libcpu/mips/gs264/mipscfg.c b/libcpu/mips/gs264/mipscfg.c
index f6c73095d9..b2aed120ae 100644
--- a/libcpu/mips/gs264/mipscfg.c
+++ b/libcpu/mips/gs264/mipscfg.c
@@ -12,15 +12,15 @@
 
 mips32_core_cfg_t g_mips_core =
 {
-    64,		/* icache_line_size */
-    128,	/* icache_lines_per_way */
-    4,		/* icache_ways */
+    64,        /* icache_line_size */
+    128,       /* icache_lines_per_way */
+    4,         /* icache_ways */
     32768,
-    64,		/* dcache_line_size */
-    128,	/* dcache_lines_per_way */
-    4,		/* dcache_ways */
+    64,        /* dcache_line_size */
+    128,       /* dcache_lines_per_way */
+    4,         /* dcache_ways */
     32768,
-    64,		/* max_tlb_entries */
+    64,        /* max_tlb_entries */
 };
 
 static rt_uint16_t m_pow(rt_uint16_t b, rt_uint16_t n)
diff --git a/libcpu/mips/gs264/mmu.c b/libcpu/mips/gs264/mmu.c
index b08bdf4c65..b5bedace50 100644
--- a/libcpu/mips/gs264/mmu.c
+++ b/libcpu/mips/gs264/mmu.c
@@ -21,15 +21,15 @@ void *current_mmu_table = RT_NULL;
 
 void *mmu_table_get()
 {
-	return current_mmu_table;
+    return current_mmu_table;
 }
 
 void switch_mmu(void *mmu_table)
 {
-	current_mmu_table = mmu_table;
+    current_mmu_table = mmu_table;
 
     mmu_clear_tlb();
-	mmu_clear_itlb();
+    mmu_clear_itlb();
 }
 
 /* dump 2nd level page table */
@@ -476,7 +476,7 @@ static int __rt_hw_mmu_map(rt_mmu_info *mmu_info, void* v_addr, void* p_addr, si
 static void rt_hw_cpu_tlb_invalidate(void)
 {
     mmu_clear_tlb();
-	mmu_clear_itlb();
+    mmu_clear_itlb();
 }
 
 #ifdef RT_USING_USERSPACE
diff --git a/libcpu/mips/gs264/mmu.h b/libcpu/mips/gs264/mmu.h
index f2d4d11bc3..2472bf975f 100644
--- a/libcpu/mips/gs264/mmu.h
+++ b/libcpu/mips/gs264/mmu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2020, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -14,21 +14,21 @@
 #include <rtthread.h>
 
 #define DESC_SEC       (0x2)
-#define MEMWBWA        ((1<<12)|(3<<2))     /* write back, write allocate */
-#define MEMWB          (3<<2)  /* write back, no write allocate */
-#define MEMWT          (2<<2)  /* write through, no write allocate */
-#define SHAREDEVICE    (1<<2)  /* shared device */
-#define STRONGORDER    (0<<2)  /* strong ordered */
-#define XN             (1<<4)  /* eXecute Never */
+#define MEMWBWA        ((1<<12)|(3<<2))      /* write back, write allocate */
+#define MEMWB          (3<<2)                /* write back, no write allocate */
+#define MEMWT          (2<<2)                /* write through, no write allocate */
+#define SHAREDEVICE    (1<<2)                /* shared device */
+#define STRONGORDER    (0<<2)                /* strong ordered */
+#define XN             (1<<4)                /* execute Never */
 #ifdef RT_USING_USERSPACE
-#define AP_RW          (1<<10) /* supervisor=RW, user=No */
-#define AP_RO          ((1<<10) |(1 << 15)) /* supervisor=RW, user=No */
+#define AP_RW          (1<<10)               /* supervisor=RW, user=No */
+#define AP_RO          ((1<<10) |(1 << 15))  /* supervisor=RW, user=No */
 #else
-#define AP_RW          (3<<10) /* supervisor=RW, user=RW */
-#define AP_RO          ((2<<10) /* supervisor=RW, user=RO */
+#define AP_RW          (3<<10)               /* supervisor=RW, user=RW */
+#define AP_RO          ((2<<10)              /* supervisor=RW, user=RO */
 #endif
 
-#define SHARED         (1<<16) /* shareable */
+#define SHARED         (1<<16)               /* shareable */
 
 #define DOMAIN_FAULT   (0x0)
 #define DOMAIN_CHK     (0x1)