diff options
| author | rcitachi <[email protected]> | 2024-07-15 17:58:29 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-07-15 17:58:29 +0800 |
| commit | 14fb55933b173811467159df3e80e314b2e4415c (patch) | |
| tree | 70e9adf971168d7d16b5bf27806abb707ab3a0c6 /libcpu | |
| parent | 96ba787e252c38abe08f039c052a4be378dfa42c (diff) | |
[lwp][vdso] Add VDSO functionality under the aarch64 architecture (#9176)
Add VDSO functionality under the aarch64 architecture
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/aarch64/cortex-a/entry_point.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/libcpu/aarch64/cortex-a/entry_point.S b/libcpu/aarch64/cortex-a/entry_point.S index 315e331aac..c0acacb2ca 100644 --- a/libcpu/aarch64/cortex-a/entry_point.S +++ b/libcpu/aarch64/cortex-a/entry_point.S @@ -234,6 +234,10 @@ init_cpu_el: bic x0, x0, #(1 << 1) /* Disable Alignment check */ msr sctlr_el1, x0 + mrs x0, cntkctl_el1 + orr x0, x0, #(1 << 1) /* Set EL0VCTEN, enabling the EL0 Virtual Count Timer */ + msr cntkctl_el1, x0 + /* Avoid trap from SIMD or float point instruction */ mov x0, #0x00300000 /* Don't trap any SIMD/FP instructions in both EL0 and EL1 */ msr cpacr_el1, x0 |