diff options
| author | kurisaw <[email protected]> | 2024-11-28 17:10:42 +0800 |
|---|---|---|
| committer | Rbb666 <[email protected]> | 2024-12-04 10:11:04 +0800 |
| commit | 3f1a62cfe341ffe3f242438b52e2686379a95081 (patch) | |
| tree | 589d4ad37f33522525c127e8c7a9b0c2020748d6 /libcpu | |
| parent | 1cf97d85655f55078e90979e1b8e002cf2fe2703 (diff) | |
[libcpu][drivers] cortex-r52 abnormal takeover and software rtc naming change
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/cortex-r52/start_gcc.S | 58 | ||||
| -rw-r--r-- | libcpu/arm/cortex-r52/start_iar.S | 16 | ||||
| -rw-r--r-- | libcpu/arm/cortex-r52/vector_gcc.S | 10 | ||||
| -rw-r--r-- | libcpu/arm/cortex-r52/vector_iar.S | 2 |
4 files changed, 57 insertions, 29 deletions
diff --git a/libcpu/arm/cortex-r52/start_gcc.S b/libcpu/arm/cortex-r52/start_gcc.S index 787d3e44fb..73d70a63b9 100644 --- a/libcpu/arm/cortex-r52/start_gcc.S +++ b/libcpu/arm/cortex-r52/start_gcc.S @@ -12,8 +12,6 @@ @ (c) Texas Instruments 2009-2013, All rights reserved. @ -//#include <rtconfig.h> - .equ Mode_USR, 0x10 .equ Mode_FIQ, 0x11 .equ Mode_IRQ, 0x12 @@ -47,7 +45,7 @@ stack_top: .text .arm - .globl _c_int00 + .globl entry .globl _reset _reset: @@ -122,7 +120,7 @@ next2: next3: bl next4 next4: - ldr lr, =_c_int00 + ldr lr, =entry bx lr .globl data_init @@ -479,26 +477,38 @@ turnon_VFP: str lr, [r0, #14*4] @/* Save calling PC */ .endm - .globl vector_svc -vector_svc: - push_svc_reg - bl rt_hw_trap_svc - b . +.globl SWI_Handler +SWI_Handler: + push_svc_reg + bl rt_hw_trap_swi + b . + +.globl Undefined_Handler +Undefined_Handler: + push_svc_reg + bl rt_hw_trap_undef + b . + +.globl SVC_Handler +SVC_Handler: + push_svc_reg + b rt_hw_trap_svc + b . - .globl vector_pabort -vector_pabort: - push_svc_reg - bl rt_hw_trap_pabt - b . +.globl Prefetch_Handler +Prefetch_Handler: + push_svc_reg + b rt_hw_trap_pabt + b . - .globl vector_dabort -vector_dabort: - push_svc_reg - bl rt_hw_trap_dabt - b . +.globl Abort_Handler +Abort_Handler: + push_svc_reg + b rt_hw_trap_dabt + b . - .globl vector_resv -vector_resv: - push_svc_reg - bl rt_hw_trap_resv - b . +.globl Reserved_Handler +Reserved_Handler: + push_svc_reg + b rt_hw_trap_resv + b . diff --git a/libcpu/arm/cortex-r52/start_iar.S b/libcpu/arm/cortex-r52/start_iar.S index 9e110dd152..ec096d5c01 100644 --- a/libcpu/arm/cortex-r52/start_iar.S +++ b/libcpu/arm/cortex-r52/start_iar.S @@ -31,11 +31,13 @@ ABT_Stack_Size EQU 0x00000000 FIQ_Stack_Size EQU 0x00001000 IRQ_Stack_Size EQU 0x00001000 - IMPORT _c_int00 + IMPORT entry IMPORT rt_hw_trap_svc IMPORT rt_hw_trap_pabt IMPORT rt_hw_trap_dabt IMPORT rt_hw_trap_resv + IMPORT rt_hw_trap_swi + IMPORT rt_hw_trap_undef IMPORT system_init IMPORT __iar_program_start @@ -308,6 +310,18 @@ turnon_VFP: str lr, [r0, #14*4] ;@/* Save calling PC */ endm + EXPORT SWI_Handler +SWI_Handler: + push_svc_reg + bl rt_hw_trap_swi + b . + + EXPORT Undefined_Handler +Undefined_Handler: + push_svc_reg + bl rt_hw_trap_undef + b . + EXPORT SVC_Handler SVC_Handler: push_svc_reg diff --git a/libcpu/arm/cortex-r52/vector_gcc.S b/libcpu/arm/cortex-r52/vector_gcc.S index a0421d535e..85686ede06 100644 --- a/libcpu/arm/cortex-r52/vector_gcc.S +++ b/libcpu/arm/cortex-r52/vector_gcc.S @@ -19,7 +19,8 @@ @ import reference for interrupt routines .globl Reset_Handler - .globl turnon_VFP + .globl Undefined_Handler + .globl SWI_Handler .globl SVC_Handler .globl Prefetch_Handler .globl Abort_Handler @@ -28,10 +29,11 @@ .globl FIQ_Handler -.globl system_vectors -system_vectors: +.globl system_vector +system_vector: b Reset_Handler - b turnon_VFP + b Undefined_Handler + b SWI_Handler b SVC_Handler b Prefetch_Handler b Abort_Handler diff --git a/libcpu/arm/cortex-r52/vector_iar.S b/libcpu/arm/cortex-r52/vector_iar.S index 916e44d6a5..57de4e8f83 100644 --- a/libcpu/arm/cortex-r52/vector_iar.S +++ b/libcpu/arm/cortex-r52/vector_iar.S @@ -20,6 +20,7 @@ IMPORT Reset_Handler IMPORT Undefined_Handler + IMPORT SWI_Handler IMPORT SVC_Handler IMPORT Prefetch_Handler IMPORT Abort_Handler @@ -35,6 +36,7 @@ system_vectors: b Reset_Handler b Undefined_Handler + b SWI_Handler b SVC_Handler b Prefetch_Handler b Abort_Handler |
