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authorChen Wang <[email protected]>2024-05-28 17:47:48 +0800
committerRbb666 <[email protected]>2024-07-16 18:29:17 +0800
commit51825a5b5cd32b445d0eba4beb421ae920d20c77 (patch)
tree9ec386edd95755e1c3fcf25d6b96392285d014d8 /libcpu
parent114e143d56e5aabaee93880b06767ef8ebb832c3 (diff)
bsp:cvitek: add pinmux for pwm
Board level pin available info is summarized and list here for memo: Duo: NAME PWM CV1800B/GPIO <PINNAME>__<FUNCNAME> ---- --- ------------ --------------------- PWM-1 GP9 PWM4 PWR_GPIO[18] SD1_D3__PWM_4 GP12 PWM4 XGPIOA[16] UART0_TX__PWM_4 GP4 PWM5 PWR_GPIO[19] SD1_D2__PWM_5 GP13 PWM5 XGPIOA[17] UART0_RX__PWM_5 GP5 PWM6 PWR_GPIO[20] SD1_D1__PWM_6 GP8 PMW7 PWR_GPIO[21] SD1_D0__PWM_7 PWM-2 GP7 PWM8 PWR_GPIO[22] SD1_CMD__PWM_8 GP6 PWM9 PWR_GPIO[23] SD1_CLK__PWM_9 GP2 PWM10 PWR_GPIO[26] SD1_GPIO1__PWM_10 GP3 PWM11 PWR_GPIO[25] SD1_GPIO0__PWM_11 Duo256: NAME PWM CV1800B/GPIO <PINNAME>__<FUNCNAME> ---- --- ------------ --------------------- PWM-1 GP9 PWM4 PWR_GPIO[18] SD1_D3__PWM_4 GP12 PWM4 XGPIOA[16] UART0_TX__PWM_4 GP4 PWM5 PWR_GPIO[19] SD1_D2__PWM_5 GP13 PWM5 XGPIOA[17] UART0_RX__PWM_5 GP3 PWM6 XGPIOA[18] JTAG_CPU_TCK__PWM_6 GP5 PWM6 PWR_GPIO[20] SD1_D1__PWM_6 GP2 PWM7 XGPIOA[19] JTAG_CPU_TMS__PWM_7 GP8 PMW7 PWR_GPIO[21] SD1_D0__PWM_7 PWM-2 GP7 PWM8 PWR_GPIO[22] SD1_CMD__PWM_8 GP6 PWM9 PWR_GPIO[23] SD1_CLK__PWM_9 GP10 PWM10 XGPIOC[14] PAD_MIPI_TXM1__PWM_10 GP11 PWM11 XGPIOC[15] PAD_MIPI_TXP1__PWM_11 Signed-off-by: Chen Wang <[email protected]>
Diffstat (limited to 'libcpu')
0 files changed, 0 insertions, 0 deletions