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authorxuzhuoyi <[email protected]>2019-04-14 12:26:25 +0800
committerxuzhuoyi <[email protected]>2019-04-14 12:26:25 +0800
commit752152b63e5b8f3a82de7b39255712f41e7efac2 (patch)
tree4d8e0f3e34376e1e87b028910f6945f70da4cbb4 /libcpu
parent4acd8db61eb366878b849716db25558abaa5325b (diff)
[bsp][tms320f28379d] Fix FPU config problem
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/ti-dsp/c28x/context.s5
1 files changed, 1 insertions, 4 deletions
diff --git a/libcpu/ti-dsp/c28x/context.s b/libcpu/ti-dsp/c28x/context.s
index fc1734f5ca..2b853a0075 100644
--- a/libcpu/ti-dsp/c28x/context.s
+++ b/libcpu/ti-dsp/c28x/context.s
@@ -113,7 +113,6 @@ _reswitch:
MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
MOVL *XAR5, XAR4
- ;TRAP #16
LRETR
.endasmfunc
@@ -169,8 +168,6 @@ _RTOSINT_Handler:
MOV AR1, AL
CMP AR1, #0
B switch_to_thread, EQ ; skip register save at the first time
-
- ;MOVZ AR1, @SP ; get from thread stack pointer
;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
; TST lr, #0x10 ; if(!EXC_RETURN[4])
@@ -205,7 +202,7 @@ switch_to_thread:
;#endif
MOV @SP, AR1
- ;INC SP
+
RT_CTX_RESTORE ; pop r4 - r11 register
rtosint_exit: