diff options
| author | Martin <[email protected]> | 2022-08-12 08:31:16 +0800 |
|---|---|---|
| committer | Man, Jianting (Meco) <[email protected]> | 2022-08-13 22:12:17 -0400 |
| commit | e4d6dd88c92fce0999724cd3d4307257e30d1428 (patch) | |
| tree | 079b89a5ef6a74f7233bfbda60d0f20bdb262ada /libcpu | |
| parent | 5c7655663cda87ff233953dc3f039d5e7ee03c2f (diff) | |
[libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bug
clean_invalid must be set at the same time, and call
clean_invalid, or call clean/invalid
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/cortex-m7/cpu_cache.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/libcpu/arm/cortex-m7/cpu_cache.c b/libcpu/arm/cortex-m7/cpu_cache.c index 417558e285..a6c0d62fcf 100644 --- a/libcpu/arm/cortex-m7/cpu_cache.c +++ b/libcpu/arm/cortex-m7/cpu_cache.c @@ -69,8 +69,9 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size) { rt_uint32_t startAddr = (rt_uint32_t)addr & (rt_uint32_t)~(L1CACHE_LINESIZE_BYTE - 1); rt_uint32_t size_byte = size + (rt_uint32_t)addr - startAddr; + rt_uint32_t clean_invalid = RT_HW_CACHE_FLUSH | RT_HW_CACHE_INVALIDATE; - if (ops & (RT_HW_CACHE_FLUSH | RT_HW_CACHE_INVALIDATE)) + if ((ops & clean_invalid) == clean_invalid) { SCB_CleanInvalidateDCache_by_Addr((uint32_t *)startAddr, size_byte); } |