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-rwxr-xr-xbsp/cvitek/.gitignore1
-rwxr-xr-xbsp/cvitek/c906_little/SConstruct5
-rwxr-xr-xbsp/cvitek/c906_little/board/script/cv1813h/cv1813h_lscript.ld225
-rw-r--r--bsp/cvitek/c906_little/board/script/cv1813h/cvi_board_memmap.ld32
-rwxr-xr-xbsp/cvitek/combine-fip.sh4
5 files changed, 262 insertions, 5 deletions
diff --git a/bsp/cvitek/.gitignore b/bsp/cvitek/.gitignore
index 93694d216f..c4ea9348dd 100755
--- a/bsp/cvitek/.gitignore
+++ b/bsp/cvitek/.gitignore
@@ -2,5 +2,4 @@ cvitek_bootloader
fip.bin
boot.sd
output
-c906_little/board/script
Image.lzma \ No newline at end of file
diff --git a/bsp/cvitek/c906_little/SConstruct b/bsp/cvitek/c906_little/SConstruct
index 816412eb48..d6773ba2a1 100755
--- a/bsp/cvitek/c906_little/SConstruct
+++ b/bsp/cvitek/c906_little/SConstruct
@@ -34,9 +34,12 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
# include libraries
objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))
-if GetDepend('BOARD_TYPE_MILKV_DUO256M') or GetDepend('BOARD_TYPE_MILKV_DUOS'):
+if GetDepend('BOARD_TYPE_MILKV_DUO256M'):
env['LINKFLAGS'] = env['LINKFLAGS'].replace('cv180x_lscript.ld', 'cv181x_lscript.ld')
env['LINKFLAGS'] = env['LINKFLAGS'].replace('-L board/script/cv180x', '-L board/script/cv181x')
+elif GetDepend('BOARD_TYPE_MILKV_DUOS'):
+ env['LINKFLAGS'] = env['LINKFLAGS'].replace('cv180x_lscript.ld', 'cv1813h_lscript.ld')
+ env['LINKFLAGS'] = env['LINKFLAGS'].replace('-L board/script/cv180x', '-L board/script/cv1813h')
# make a building
DoBuilding(TARGET, objs)
diff --git a/bsp/cvitek/c906_little/board/script/cv1813h/cv1813h_lscript.ld b/bsp/cvitek/c906_little/board/script/cv1813h/cv1813h_lscript.ld
new file mode 100755
index 0000000000..a91067f725
--- /dev/null
+++ b/bsp/cvitek/c906_little/board/script/cv1813h/cv1813h_lscript.ld
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2006-2024, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2024/01/11 flyingcys The first version
+ */
+INCLUDE ./cvi_board_memmap.ld
+
+_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000;
+/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */
+/*_HEAP_SIZE = 0x20000;*/
+
+_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
+_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
+_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
+
+/* Define Memories in the system */
+
+MEMORY
+{
+ psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE
+}
+
+/* Specify the default entry point to the program */
+
+/*ENTRY(_vector_table)*/
+ENTRY(_start)
+
+/* Define the sections, and where they are mapped in memory */
+
+SECTIONS
+{
+.text : {
+ KEEP (*(.vectors))
+ *(.boot)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ *(.plt)
+ *(.gnu_warning)
+ *(.gcc_execpt_table)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.ARM.extab)
+ *(.gnu.linkonce.armextab.*)
+
+ /* section information for finsh shell */
+ . = ALIGN(8);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+ . = ALIGN(8);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+ . = ALIGN(8);
+
+ /* section information for initial. */
+ . = ALIGN(8);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+ . = ALIGN(8);
+
+ __rt_utest_tc_tab_start = .;
+ KEEP(*(UtestTcTab))
+ __rt_utest_tc_tab_end = .;
+} > psu_ddr_0_MEM_0
+
+.init (ALIGN(64)) : {
+ KEEP (*(.init))
+} > psu_ddr_0_MEM_0
+
+.fini (ALIGN(64)) : {
+ KEEP (*(.fini))
+} > psu_ddr_0_MEM_0
+
+.interp : {
+ KEEP (*(.interp))
+} > psu_ddr_0_MEM_0
+
+.note-ABI-tag : {
+ KEEP (*(.note-ABI-tag))
+} > psu_ddr_0_MEM_0
+
+.rodata : {
+ . = ALIGN(64);
+ __rodata_start = .;
+ *(.rodata)
+ *(.rodata.*)
+ *(.srodata*)
+ *(.gnu.linkonce.r.*)
+ __rodata_end = .;
+} > psu_ddr_0_MEM_0
+
+.rodata1 : {
+ . = ALIGN(64);
+ __rodata1_start = .;
+ *(.rodata1)
+ *(.rodata1.*)
+ __rodata1_end = .;
+} > psu_ddr_0_MEM_0
+
+.data : {
+ . = ALIGN(64);
+ _data = .;
+ *(.data)
+ *(.data.*)
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.d.*)
+ *(.jcr)
+ *(.got)
+ *(.got.plt)
+ _edata = .;
+} > psu_ddr_0_MEM_0
+
+.data1 : {
+ . = ALIGN(64);
+ __data1_start = .;
+ *(.data1)
+ *(.data1.*)
+ __data1_end = .;
+} > psu_ddr_0_MEM_0
+
+.got : {
+ *(.got)
+} > psu_ddr_0_MEM_0
+
+.got1 : {
+ *(.got1)
+} > psu_ddr_0_MEM_0
+
+.got2 : {
+ *(.got2)
+} > psu_ddr_0_MEM_0
+
+.ctors : {
+ . = ALIGN(64);
+ __CTOR_LIST__ = .;
+ ___CTORS_LIST___ = .;
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ __CTOR_END__ = .;
+ ___CTORS_END___ = .;
+} > psu_ddr_0_MEM_0
+
+.dtors : {
+ . = ALIGN(64);
+ __DTOR_LIST__ = .;
+ ___DTORS_LIST___ = .;
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ __DTOR_END__ = .;
+ ___DTORS_END___ = .;
+} > psu_ddr_0_MEM_0
+
+.fixup : {
+ __fixup_start = .;
+ *(.fixup)
+ __fixup_end = .;
+} > psu_ddr_0_MEM_0
+
+.eh_frame : {
+ *(.eh_frame)
+} > psu_ddr_0_MEM_0
+
+.eh_framehdr : {
+ __eh_framehdr_start = .;
+ *(.eh_framehdr)
+ __eh_framehdr_end = .;
+} > psu_ddr_0_MEM_0
+
+.gcc_except_table : {
+ *(.gcc_except_table)
+} > psu_ddr_0_MEM_0
+
+.bss (NOLOAD) : {
+ . = ALIGN(64);
+ _bss = .;
+ *(.bss)
+ *(.bss.*)
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(64);
+ _ebss = .;
+} > psu_ddr_0_MEM_0
+
+/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/
+ _data_lma = LOADADDR(.data);
+
+/* Generate Stack and Heap definitions */
+.stack (NOLOAD) : {
+ . = ALIGN(64);
+ _stack_end_end = .;
+ . += _STACK_SIZE;
+ _stack_top = .;
+ __rt_rvstack = .;
+} > psu_ddr_0_MEM_0
+
+.heap (NOLOAD) : {
+ . = ALIGN(64);
+ _heap = .;
+ HeapBase = .;
+ _heap_start = .;
+ *(.heap*)
+ /*. += _HEAP_SIZE;*/
+ /*_heap_size = _HEAP_SIZE; */
+ _heap_end = .;
+ HeapLimit = .;
+} > psu_ddr_0_MEM_0
+
+HeapLimit = ORIGIN(psu_ddr_0_MEM_0) + LENGTH(psu_ddr_0_MEM_0);
+_end = .;
+}
+
diff --git a/bsp/cvitek/c906_little/board/script/cv1813h/cvi_board_memmap.ld b/bsp/cvitek/c906_little/board/script/cv1813h/cvi_board_memmap.ld
new file mode 100644
index 0000000000..0b046267f2
--- /dev/null
+++ b/bsp/cvitek/c906_little/board/script/cv1813h/cvi_board_memmap.ld
@@ -0,0 +1,32 @@
+CONFIG_SYS_TEXT_BASE = 0x80200000;
+CVIMMAP_ATF_SIZE = 0x80000;
+CVIMMAP_BOOTLOGO_ADDR = 0x9523e000;
+CVIMMAP_BOOTLOGO_SIZE = 0x1c2000;
+CVIMMAP_CONFIG_SYS_INIT_SP_ADDR = 0x82800000;
+CVIMMAP_CVI_UPDATE_HEADER_ADDR = 0x817ffc00;
+CVIMMAP_CVI_UPDATE_HEADER_SIZE = 0x400;
+CVIMMAP_DRAM_BASE = 0x80000000;
+CVIMMAP_DRAM_SIZE = 0x20000000;
+CVIMMAP_FRAMEBUFFER_ADDR = 0x9523e000;
+CVIMMAP_FRAMEBUFFER_SIZE = 0x1c2000;
+CVIMMAP_FREERTOS_ADDR = 0x9fe00000;
+CVIMMAP_FREERTOS_RESERVED_ION_SIZE = 0x1600000;
+CVIMMAP_FREERTOS_SIZE = 0x200000;
+CVIMMAP_FSBL_C906L_START_ADDR = 0x9fe00000;
+CVIMMAP_FSBL_UNZIP_ADDR = 0x81800000;
+CVIMMAP_FSBL_UNZIP_SIZE = 0x1000000;
+CVIMMAP_H26X_BITSTREAM_ADDR = 0x95400000;
+CVIMMAP_H26X_BITSTREAM_SIZE = 0x200000;
+CVIMMAP_H26X_ENC_BUFF_ADDR = 0x95600000;
+CVIMMAP_H26X_ENC_BUFF_SIZE = 0x0;
+CVIMMAP_ION_ADDR = 0x95400000;
+CVIMMAP_ION_SIZE = 0xaa00000;
+CVIMMAP_ISP_MEM_BASE_ADDR = 0x95600000;
+CVIMMAP_ISP_MEM_BASE_SIZE = 0x1400000;
+CVIMMAP_KERNEL_MEMORY_ADDR = 0x80000000;
+CVIMMAP_KERNEL_MEMORY_SIZE = 0x1fe00000;
+CVIMMAP_MONITOR_ADDR = 0x80000000;
+CVIMMAP_OPENSBI_FDT_ADDR = 0x80080000;
+CVIMMAP_OPENSBI_SIZE = 0x80000;
+CVIMMAP_UIMAG_ADDR = 0x81800000;
+CVIMMAP_UIMAG_SIZE = 0x1000000; \ No newline at end of file
diff --git a/bsp/cvitek/combine-fip.sh b/bsp/cvitek/combine-fip.sh
index 81fb9b579e..22a151c58e 100755
--- a/bsp/cvitek/combine-fip.sh
+++ b/bsp/cvitek/combine-fip.sh
@@ -30,9 +30,7 @@ echo "board: ${MV_BOARD_LINK}"
if [ ! -d opensbi/build/platform/generic ] || [ ! -d fsbl/build/${MV_BOARD_LINK} ] || [ ! -d u-boot-2021.10/build/${MV_BOARD_LINK} ]; then
do_build
-
- CHIP_ARCH_L=$(echo $CHIP_ARCH | tr '[:upper:]' '[:lower:]')
- cp -rf build/output/${MV_BOARD_LINK}/cvi_board_memmap.ld ${ROOT_PATH}/c906_little/board/script/${CHIP_ARCH_L}
+
else
echo "Build already done, skip build"