summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--bsp/ra6m4-cpk/.config9
-rw-r--r--bsp/ra6m4-cpk/drivers/Kconfig22
-rw-r--r--bsp/ra6m4-cpk/drivers/drv_soft_i2c.c218
-rw-r--r--bsp/ra6m4-cpk/drivers/drv_soft_i2c.h53
4 files changed, 300 insertions, 2 deletions
diff --git a/bsp/ra6m4-cpk/.config b/bsp/ra6m4-cpk/.config
index 0531fd135e..f40cd8d190 100644
--- a/bsp/ra6m4-cpk/.config
+++ b/bsp/ra6m4-cpk/.config
@@ -132,7 +132,10 @@ CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
@@ -580,6 +583,10 @@ CONFIG_BSP_USING_UART7=y
# CONFIG_BSP_UART7_TX_USING_DMA is not set
CONFIG_BSP_UART7_RX_BUFSIZE=256
CONFIG_BSP_UART7_TX_BUFSIZE=0
+CONFIG_BSP_USING_I2C=y
+CONFIG_BSP_USING_I2C1=y
+CONFIG_BSP_I2C1_SCL_PIN=0x0512
+CONFIG_BSP_I2C1_SDA_PIN=0x0511
#
# Board extended module Drivers
diff --git a/bsp/ra6m4-cpk/drivers/Kconfig b/bsp/ra6m4-cpk/drivers/Kconfig
index 7cdb2b98a2..17e127473d 100644
--- a/bsp/ra6m4-cpk/drivers/Kconfig
+++ b/bsp/ra6m4-cpk/drivers/Kconfig
@@ -51,7 +51,27 @@ menu "Hardware Drivers Config"
endif
endif
-
+ menuconfig BSP_USING_I2C
+ bool "Enable I2C BUS"
+ default n
+ select RT_USING_I2C
+ select RT_USING_I2C_BITOPS
+ select RT_USING_PIN
+ if BSP_USING_I2C
+ menuconfig BSP_USING_I2C1
+ bool "Enable I2C1 BUS (software simulation)"
+ default y
+ if BSP_USING_I2C1
+ config BSP_I2C1_SCL_PIN
+ int "i2c1 scl pin number"
+ range 0x0000 0x0B0F
+ default 0x0512
+ config BSP_I2C1_SDA_PIN
+ int "I2C1 sda pin number"
+ range 0x0000 0x0B0F
+ default 0x0511
+ endif
+ endif
endmenu
diff --git a/bsp/ra6m4-cpk/drivers/drv_soft_i2c.c b/bsp/ra6m4-cpk/drivers/drv_soft_i2c.c
new file mode 100644
index 0000000000..323777a8d6
--- /dev/null
+++ b/bsp/ra6m4-cpk/drivers/drv_soft_i2c.c
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2021-07-29 KyleChan first version
+ */
+
+#include "board.h"
+#include "drv_soft_i2c.h"
+#include "drv_config.h"
+
+#ifdef RT_USING_I2C
+
+#define DBG_TAG "drv.i2c"
+#ifdef DRV_DEBUG
+#define DBG_LVL DBG_LOG
+#else
+#define DBG_LVL DBG_INFO
+#endif /* DRV_DEBUG */
+
+#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1)
+#error "Please define at least one BSP_USING_I2Cx"
+/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
+#endif
+
+static const struct ra_soft_i2c_config soft_i2c_config[] =
+{
+#ifdef BSP_USING_I2C0
+ I2C0_BUS_CONFIG,
+#endif
+#ifdef BSP_USING_I2C1
+ I2C1_BUS_CONFIG,
+#endif
+};
+
+static struct ra_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
+
+/**
+ * This function initializes the i2c pin.
+ *
+ * @param ra i2c dirver class.
+ */
+static void ra_i2c_gpio_init(struct ra_i2c *i2c)
+{
+ struct ra_soft_i2c_config* cfg = (struct ra_soft_i2c_config*)i2c->ops.data;
+
+ rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
+ rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
+
+ rt_pin_write(cfg->scl, PIN_HIGH);
+ rt_pin_write(cfg->sda, PIN_HIGH);
+}
+
+/**
+ * This function sets the sda pin.
+ *
+ * @param ra config class.
+ * @param The sda pin state.
+ */
+static void ra_set_sda(void *data, rt_int32_t state)
+{
+ struct ra_soft_i2c_config* cfg = (struct ra_soft_i2c_config*)data;
+ if (state)
+ {
+ rt_pin_write(cfg->sda, PIN_HIGH);
+ }
+ else
+ {
+ rt_pin_write(cfg->sda, PIN_LOW);
+ }
+}
+
+/**
+ * This function sets the scl pin.
+ *
+ * @param ra config class.
+ * @param The scl pin state.
+ */
+static void ra_set_scl(void *data, rt_int32_t state)
+{
+ struct ra_soft_i2c_config* cfg = (struct ra_soft_i2c_config*)data;
+ if (state)
+ {
+ rt_pin_write(cfg->scl, PIN_HIGH);
+ }
+ else
+ {
+ rt_pin_write(cfg->scl, PIN_LOW);
+ }
+}
+
+/**
+ * This function gets the sda pin state.
+ *
+ * @param The sda pin state.
+ */
+static rt_int32_t ra_get_sda(void *data)
+{
+ struct ra_soft_i2c_config* cfg = (struct ra_soft_i2c_config*)data;
+ return rt_pin_read(cfg->sda);
+}
+
+/**
+ * This function gets the scl pin state.
+ *
+ * @param The scl pin state.
+ */
+static rt_int32_t ra_get_scl(void *data)
+{
+ struct ra_soft_i2c_config* cfg = (struct ra_soft_i2c_config*)data;
+ return rt_pin_read(cfg->scl);
+}
+/**
+ * The time delay function.
+ *
+ * @param microseconds.
+ */
+static void ra_udelay(rt_uint32_t us)
+{
+ rt_uint32_t ticks;
+ rt_uint32_t told, tnow, tcnt = 0;
+ rt_uint32_t reload = SysTick->LOAD;
+
+ ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
+ told = SysTick->VAL;
+ while (1)
+ {
+ tnow = SysTick->VAL;
+ if (tnow != told)
+ {
+ if (tnow < told)
+ {
+ tcnt += told - tnow;
+ }
+ else
+ {
+ tcnt += reload - tnow + told;
+ }
+ told = tnow;
+ if (tcnt >= ticks)
+ {
+ break;
+ }
+ }
+ }
+}
+
+static const struct rt_i2c_bit_ops ra_bit_ops_default =
+{
+ .data = RT_NULL,
+ .set_sda = ra_set_sda,
+ .set_scl = ra_set_scl,
+ .get_sda = ra_get_sda,
+ .get_scl = ra_get_scl,
+ .udelay = ra_udelay,
+ .delay_us = 1,
+ .timeout = 100
+};
+
+/**
+ * if i2c is locked, this function will unlock it
+ *
+ * @param ra config class
+ *
+ * @return RT_EOK indicates successful unlock.
+ */
+static rt_err_t ra_i2c_bus_unlock(const struct ra_soft_i2c_config *cfg)
+{
+ rt_int32_t i = 0;
+
+ if (PIN_LOW == rt_pin_read(cfg->sda))
+ {
+ while (i++ < 9)
+ {
+ rt_pin_write(cfg->scl, PIN_HIGH);
+ ra_udelay(100);
+ rt_pin_write(cfg->scl, PIN_LOW);
+ ra_udelay(100);
+ }
+ }
+ if (PIN_LOW == rt_pin_read(cfg->sda))
+ {
+ return -RT_ERROR;
+ }
+
+ return RT_EOK;
+}
+
+/* I2C initialization function */
+int rt_hw_i2c_init(void)
+{
+ rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct ra_i2c);
+ rt_err_t result;
+
+ for (int i = 0; i < obj_num; i++)
+ {
+ i2c_obj[i].ops = ra_bit_ops_default;
+ i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
+ i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
+ ra_i2c_gpio_init(&i2c_obj[i]);
+ result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
+ RT_ASSERT(result == RT_EOK);
+ ra_i2c_bus_unlock(&soft_i2c_config[i]);
+
+ LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
+ soft_i2c_config[i].bus_name,
+ soft_i2c_config[i].scl,
+ soft_i2c_config[i].sda);
+ }
+
+ return RT_EOK;
+}
+INIT_BOARD_EXPORT(rt_hw_i2c_init);
+
+#endif /* RT_USING_I2C */
diff --git a/bsp/ra6m4-cpk/drivers/drv_soft_i2c.h b/bsp/ra6m4-cpk/drivers/drv_soft_i2c.h
new file mode 100644
index 0000000000..098810b433
--- /dev/null
+++ b/bsp/ra6m4-cpk/drivers/drv_soft_i2c.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2021-07-29 KyleChan first version
+ */
+
+#ifndef __DRV_I2C__
+#define __DRV_I2C__
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include <rtdbg.h>
+
+/* ra config class */
+struct ra_soft_i2c_config
+{
+ rt_uint32_t scl;
+ rt_uint32_t sda;
+ const char *bus_name;
+};
+/* ra i2c dirver class */
+struct ra_i2c
+{
+ struct rt_i2c_bit_ops ops;
+ struct rt_i2c_bus_device i2c2_bus;
+};
+
+#ifdef BSP_USING_I2C1
+#define I2C1_BUS_CONFIG \
+ { \
+ .scl = BSP_I2C1_SCL_PIN, \
+ .sda = BSP_I2C1_SDA_PIN, \
+ .bus_name = "i2c1", \
+ }
+#endif
+
+#ifdef BSP_USING_I2C2
+#define I2C2_BUS_CONFIG \
+ { \
+ .scl = BSP_I2C2_SCL_PIN, \
+ .sda = BSP_I2C2_SDA_PIN, \
+ .bus_name = "i2c2", \
+ }
+#endif
+
+int rt_hw_i2c_init(void);
+
+#endif