diff options
Diffstat (limited to 'bsp')
35 files changed, 2546 insertions, 114 deletions
diff --git a/bsp/bouffalo_lab/bl808/build_bl808.sh b/bsp/bouffalo_lab/bl808/build_bl808_all.sh index 3a03b6285d..a3ef7bb45e 100755 --- a/bsp/bouffalo_lab/bl808/build_bl808.sh +++ b/bsp/bouffalo_lab/bl808/build_bl808_all.sh @@ -2,4 +2,5 @@ scons -C m0 scons -C lp +scons -C d0 diff --git a/bsp/bouffalo_lab/bl808/d0/.config b/bsp/bouffalo_lab/bl808/d0/.config new file mode 100644 index 0000000000..e0d327354c --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/.config @@ -0,0 +1,1046 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Project Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=20 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +CONFIG_RT_USING_SMART=y +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=8 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=16384 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=16384 + +# +# kservice optimization +# +CONFIG_RT_KSERVICE_USING_STDLIB=y +# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +CONFIG_RT_KPRINTF_USING_LONGLONG=y +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_PAGE_LEAK is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_PAGE_MAX_ORDER=11 +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_MEMTRACE=y +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=256 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart3" +CONFIG_RT_VER_NUM=0x50001 +# CONFIG_RT_USING_STDC_ATOMIC is not set +CONFIG_ARCH_CPU_64BIT=y +CONFIG_RT_USING_CACHE=y +# CONFIG_RT_USING_HW_ATOMIC is not set +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +# CONFIG_RT_USING_CPU_FFS is not set +CONFIG_ARCH_MM_MMU=y +CONFIG_KERNEL_VADDR_START=0x50000000 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_RISCV64=y + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=16384 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=8192 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# DFS: device virtual file system +# +CONFIG_RT_USING_DFS=y +CONFIG_DFS_USING_POSIX=y +CONFIG_DFS_USING_WORKDIR=y +# CONFIG_RT_USING_DFS_MNTTABLE is not set +CONFIG_DFS_FD_MAX=16 +CONFIG_RT_USING_DFS_V1=y +# CONFIG_RT_USING_DFS_V2 is not set +CONFIG_DFS_FILESYSTEMS_MAX=4 +CONFIG_DFS_FILESYSTEM_TYPES_MAX=4 +# CONFIG_RT_USING_DFS_ELMFAT is not set +CONFIG_RT_USING_DFS_DEVFS=y +# CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set +# CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set +# CONFIG_RT_USING_FAL is not set +CONFIG_RT_USING_LWP=y +CONFIG_RT_LWP_MAX_NR=30 +CONFIG_LWP_TASK_STACK_SIZE=16384 +CONFIG_RT_CH_MSG_MAX_NR=1024 +CONFIG_LWP_CONSOLE_INPUT_BUFFER_SIZE=1024 +CONFIG_LWP_TID_MAX_NR=64 +CONFIG_RT_LWP_SHM_MAX_NR=64 +# CONFIG_LWP_UNIX98_PTY is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +CONFIG_RT_USING_TTY=y +# CONFIG_RT_TTY_DEBUG is not set +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +# CONFIG_RT_USING_PIN is not set +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +CONFIG_RT_USING_NULL=y +CONFIG_RT_USING_ZERO=y +CONFIG_RT_USING_RANDOM=y +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set +CONFIG_RT_USING_RTC=y +# CONFIG_RT_USING_ALARM is not set +# CONFIG_RT_USING_SOFT_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set +# CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# C/C++ and POSIX layer +# +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +CONFIG_RT_USING_POSIX_FS=y +CONFIG_RT_USING_POSIX_DEVIO=y +CONFIG_RT_USING_POSIX_STDIO=y +CONFIG_RT_USING_POSIX_POLL=y +CONFIG_RT_USING_POSIX_SELECT=y +# CONFIG_RT_USING_POSIX_SOCKET is not set +CONFIG_RT_USING_POSIX_TERMIOS=y +# CONFIG_RT_USING_POSIX_AIO is not set +# CONFIG_RT_USING_POSIX_MMAN is not set +CONFIG_RT_USING_POSIX_DELAY=y +CONFIG_RT_USING_POSIX_CLOCK=y +CONFIG_RT_USING_POSIX_TIMER=y +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Interprocess Communication (IPC) +# +CONFIG_RT_USING_POSIX_PIPE=y +CONFIG_RT_USING_POSIX_PIPE_SIZE=512 +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Network +# +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_AT is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +CONFIG_RT_USING_ADT=y +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_VBUS is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LWIP is not set +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_EZ_IOT_OS is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set +# CONFIG_PKG_USING_RYANW5500 is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set +# CONFIG_PKG_USING_ZEPHYR_POLLING is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_3GPP_AMRNB is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set +# CONFIG_PKG_USING_FLASH_BLOB is not set + +# +# peripheral libraries and drivers +# + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_STHS34PF80 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ESP_IDF is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_ILI9341 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_NUCLEI_SDK is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + +# +# miscellaneous packages +# + +# +# project laboratory +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_MORSE is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set + +# +# Other +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set +# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# +CONFIG_BSP_USING_BL808=y +CONFIG_BL808_CORE_D0=y +CONFIG_C906_PLIC_PHY_ADDR=0xe0000000 +CONFIG_IRQ_MAX_NR=64 +CONFIG_TIMER_CLK_FREQ=1000000 + +# +# General Drivers Configuration +# +CONFIG_BSP_USING_UART3=y +# CONFIG_UART3_TX_USING_GPIO0 is not set +# CONFIG_UART3_TX_USING_GPIO4 is not set +# CONFIG_UART3_TX_USING_GPIO8 is not set +# CONFIG_UART3_TX_USING_GPIO12 is not set +CONFIG_UART3_TX_USING_GPIO16=y +# CONFIG_UART3_TX_USING_GPIO20 is not set +# CONFIG_UART3_TX_USING_GPIO24 is not set +# CONFIG_UART3_TX_USING_GPIO28 is not set +# CONFIG_UART3_TX_USING_GPIO32 is not set +# CONFIG_UART3_TX_USING_GPIO36 is not set +# CONFIG_UART3_TX_USING_GPIO40 is not set +# CONFIG_UART3_TX_USING_GPIO44 is not set +# CONFIG_UART3_RX_USING_GPIO1 is not set +# CONFIG_UART3_RX_USING_GPIO5 is not set +# CONFIG_UART3_RX_USING_GPIO9 is not set +# CONFIG_UART3_RX_USING_GPIO13 is not set +CONFIG_UART3_RX_USING_GPIO17=y +# CONFIG_UART3_RX_USING_GPIO21 is not set +# CONFIG_UART3_RX_USING_GPIO25 is not set +# CONFIG_UART3_RX_USING_GPIO29 is not set +# CONFIG_UART3_RX_USING_GPIO33 is not set +# CONFIG_UART3_RX_USING_GPIO37 is not set +# CONFIG_UART3_RX_USING_GPIO41 is not set +# CONFIG_UART3_RX_USING_GPIO45 is not set +CONFIG___STACKSIZE__=16384 diff --git a/bsp/bouffalo_lab/bl808/d0/Kconfig b/bsp/bouffalo_lab/bl808/d0/Kconfig new file mode 100755 index 0000000000..b636a4739b --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/Kconfig @@ -0,0 +1,24 @@ +mainmenu "RT-Thread Project Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "board/Kconfig" + +config __STACKSIZE__ + int "stack size for interrupt" + default 4096
\ No newline at end of file diff --git a/bsp/bouffalo_lab/bl808/d0/SConscript b/bsp/bouffalo_lab/bl808/d0/SConscript new file mode 100755 index 0000000000..c7ef7659ec --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/SConscript @@ -0,0 +1,14 @@ +# for module compiling +import os +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/bouffalo_lab/bl808/d0/SConstruct b/bsp/bouffalo_lab/bl808/d0/SConstruct new file mode 100755 index 0000000000..bedd97d88e --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/SConstruct @@ -0,0 +1,52 @@ +import os +import sys +import rtconfig + +from rtconfig import RTT_ROOT + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +from building import * + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/../libraries'): + libraries_path_prefix = SDK_ROOT + '/../libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/../libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False) + +# include libraries +objs.extend(SConscript(libraries_path_prefix + '/bl_mcu_sdk/SConscript', variant_dir='build/libraries/bl_mcu_sdk', duplicate=0)) + +# include drivers +objs.extend(SConscript(libraries_path_prefix + '/rt_drivers/SConscript', variant_dir='build/libraries/rt_drivers', duplicate=0)) + +stack_size = 4096 + +stack_lds = open('link_stacksize.lds', 'w') +if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__') +stack_lds.write('__STACKSIZE__ = %d;' % stack_size) +stack_lds.close() + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/bouffalo_lab/bl808/d0/applications/SConscript b/bsp/bouffalo_lab/bl808/d0/applications/SConscript new file mode 100755 index 0000000000..c583d3016e --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/applications/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/bouffalo_lab/bl808/d0/applications/main.c b/bsp/bouffalo_lab/bl808/d0/applications/main.c new file mode 100644 index 0000000000..124d480b60 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/applications/main.c @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023/04/25 flyingcys first version + */ + +#include <rtthread.h> +#include <stdio.h> + +int main(void) +{ + rt_kprintf("Hello RT-Smart!\n"); + + return 0; +} diff --git a/bsp/bouffalo_lab/bl808/d0/board/Kconfig b/bsp/bouffalo_lab/bl808/d0/board/Kconfig new file mode 100755 index 0000000000..ed55125f6a --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/board/Kconfig @@ -0,0 +1,92 @@ +config BSP_USING_BL808 + bool + select ARCH_RISCV64 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + select RT_USING_CACHE + select ARCH_MM_MMU + select BL808_CORE_D0 + default y + +config BL808_CORE_D0 + bool + default y + +config C906_PLIC_PHY_ADDR + hex + default 0xe0000000 + +config IRQ_MAX_NR + int + default 64 + +config TIMER_CLK_FREQ + int + default 1000000 + +menu "General Drivers Configuration" + + menuconfig BSP_USING_UART3 + bool "Enable UART3" + default y + if BSP_USING_UART3 + choice + prompt "UART3 TX PIN" + default UART3_TX_USING_GPIO16 + + config UART3_TX_USING_GPIO0 + bool "GPIO_0" + config UART3_TX_USING_GPIO4 + bool "GPIO_4" + config UART3_TX_USING_GPIO8 + bool "GPIO_8" + config UART3_TX_USING_GPIO12 + bool "GPIO_12" + config UART3_TX_USING_GPIO16 + bool "GPIO_16" + config UART3_TX_USING_GPIO20 + bool "GPIO_20" + config UART3_TX_USING_GPIO24 + bool "GPIO_24" + config UART3_TX_USING_GPIO28 + bool "GPIO_28" + config UART3_TX_USING_GPIO32 + bool "GPIO_32" + config UART3_TX_USING_GPIO36 + bool "GPIO_36" + config UART3_TX_USING_GPIO40 + bool "GPIO_40" + config UART3_TX_USING_GPIO44 + bool "GPIO_44" + endchoice + choice + prompt "UART3 RX PIN" + default UART3_RX_USING_GPIO17 + + config UART3_RX_USING_GPIO1 + bool "GPIO_1" + config UART3_RX_USING_GPIO5 + bool "GPIO_5" + config UART3_RX_USING_GPIO9 + bool "GPIO_9" + config UART3_RX_USING_GPIO13 + bool "GPIO_12" + config UART3_RX_USING_GPIO17 + bool "GPIO_17" + config UART3_RX_USING_GPIO21 + bool "GPIO_21" + config UART3_RX_USING_GPIO25 + bool "GPIO_25" + config UART3_RX_USING_GPIO29 + bool "GPIO_29" + config UART3_RX_USING_GPIO33 + bool "GPIO_33" + config UART3_RX_USING_GPIO37 + bool "GPIO_37" + config UART3_RX_USING_GPIO41 + bool "GPIO_41" + config UART3_RX_USING_GPIO45 + bool "GPIO_45" + endchoice + endif +endmenu diff --git a/bsp/bouffalo_lab/bl808/d0/board/SConscript b/bsp/bouffalo_lab/bl808/d0/board/SConscript new file mode 100755 index 0000000000..0907feabe2 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/board/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*.S') +CPPPATH = [cwd] + +group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/bouffalo_lab/bl808/d0/board/board.c b/bsp/bouffalo_lab/bl808/d0/board/board.c new file mode 100644 index 0000000000..c2d2e73fa5 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/board/board.c @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022/04/25 flyingcys first version + */ +#include <rthw.h> +#include <rtthread.h> + +#include "board.h" + +#include "sbi.h" + +#ifdef RT_USING_SMART +#include "riscv_mmu.h" +#include "mmu.h" +#include "page.h" +#include "lwp_arch.h" + +rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END}; + +extern size_t MMUTable[]; + +struct mem_desc platform_mem_desc[] = { + {KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM}, +}; + +#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0])) + +#endif /* RT_USING_SMART */ + +void init_bss(void) +{ + unsigned int *dst; + + dst = &__bss_start; + while (dst < &__bss_end) + { + *dst++ = 0; + } +} + +static void __rt_assert_handler(const char *ex_string, const char *func, rt_size_t line) +{ + rt_kprintf("(%s) assertion failed at function:%s, line number:%d \n", ex_string, func, line); + asm volatile("ebreak" :: + : "memory"); +} + +void primary_cpu_entry(void) +{ + extern void entry(void); + + /* disable global interrupt */ + rt_hw_interrupt_disable(); + rt_assert_set_hook(__rt_assert_handler); + + entry(); +} + +#define IOREMAP_SIZE (1ul << 30) + +#ifndef ARCH_KERNEL_IN_HIGH_VA +#define IOREMAP_VEND USER_VADDR_START +#else +#define IOREMAP_VEND 0ul +#endif + +void rt_hw_board_init(void) +{ +#ifdef RT_USING_SMART + /* init data structure */ + rt_hw_mmu_map_init(&rt_kernel_space, (void *)(IOREMAP_VEND - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, PV_OFFSET); + + /* init page allocator */ + rt_page_init(init_page_region); + + /* setup region, and enable MMU */ + rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, NUM_MEM_DESC); +#endif + + /* initialize memory system */ +#ifdef RT_USING_HEAP + rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END); +#endif + + /* initalize interrupt */ + rt_hw_interrupt_init(); + + /* init rtthread hardware */ + rt_hw_tick_init(); + + /* UART driver initialization is open by default */ +#ifdef RT_USING_SERIAL + rt_hw_uart_init(); +#endif + +#ifdef RT_USING_CONSOLE + /* set console device */ + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif /* RT_USING_CONSOLE */ + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_HEAP + rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t)RT_HW_HEAP_BEGIN, (rt_ubase_t)RT_HW_HEAP_END); +#endif /* RT_USING_HEAP */ +} + +void rt_hw_cpu_reset(void) +{ + sbi_shutdown(); + + while (1) + ; +} +MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); diff --git a/bsp/bouffalo_lab/bl808/d0/board/board.h b/bsp/bouffalo_lab/bl808/d0/board/board.h new file mode 100755 index 0000000000..37975c4660 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/board/board.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022/04/25 flyingcys first version + */ + +#ifndef BOARD_H__ +#define BOARD_H__ + +#include <rtconfig.h> + +extern unsigned int __bss_start; +extern unsigned int __bss_end; + +#ifndef RT_USING_SMART +#define KERNEL_VADDR_START 0x0 +#endif + +#define RT_HW_HEAP_BEGIN ((void *)&__bss_end) +#define RT_HW_HEAP_END ((void *)(RT_HW_HEAP_BEGIN + 16 * 1024 * 1024)) +#define RT_HW_PAGE_START RT_HW_HEAP_END +#define RT_HW_PAGE_END ((void *)(KERNEL_VADDR_START + 64 * 1024 * 1024)) + +void rt_hw_board_init(void); + +#endif diff --git a/bsp/bouffalo_lab/bl808/d0/board/linker_scripts/link.lds b/bsp/bouffalo_lab/bl808/d0/board/linker_scripts/link.lds new file mode 100755 index 0000000000..c2b0bea6b6 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/board/linker_scripts/link.lds @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020/12/12 bernard The first version + */ + +INCLUDE "link_stacksize.lds" + +OUTPUT_ARCH( "riscv" ) + +/* + * Memory layout: + * 0x10200000 - 0x10201000: Bootloader + * 0x10201000 - 0x10A00000: Kernel + * 0x10A00000 - 0x11200000: Heap + */ + +MEMORY +{ + SRAM : ORIGIN = 0x50100000, LENGTH = 63M +} + +ENTRY(_start) +SECTIONS +{ + . = 0x50100000 ; + + /* __STACKSIZE__ = 4096; */ + __text_start = .; + .start : + { + *(.start); + } > SRAM + + . = ALIGN(8); + + .text : + { + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(8); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(8); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(8); + + /* section information for initial. */ + . = ALIGN(8); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(8); + + __rt_utest_tc_tab_start = .; + KEEP(*(UtestTcTab)) + __rt_utest_tc_tab_end = .; + + . = ALIGN(8); + _etext = .; + } > SRAM + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + *(.eh_frame_entry) + } > SRAM + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM + + . = ALIGN(8); + __text_end = .; + __text_size = __text_end - __text_start; + + .data : + { + *(.data) + *(.data.*) + + *(.data1) + *(.data1.*) + + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + + *(.sdata) + *(.sdata.*) + } > SRAM + + . = ALIGN(8); + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__ctors_end__ = .); + } > SRAM + + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE(__dtors_end__ = .); + } > SRAM + + /* stack for dual core */ + .stack : + { + . = ALIGN(64); + __stack_start__ = .; + + . += __STACKSIZE__; + __stack_cpu0 = .; + + . += __STACKSIZE__; + __stack_cpu1 = .; + } > SRAM + + . = ALIGN(8); + + .osdebug : + { + _osdebug_start = .; + . += 87K; + _osdebug_end = .; + } > SRAM + + . = ALIGN(8); + + .sbss : + { + __bss_start = .; + *(.sbss) + *(.sbss.*) + *(.dynsbss) + *(.scommon) + } > SRAM + + .bss : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + __bss_end = .; + } > SRAM + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini b/bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini new file mode 100755 index 0000000000..a39c061752 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini @@ -0,0 +1,12 @@ +[cfg]
+# 0: no erase, 1:programmed section erase, 2: chip erase
+erase = 1
+# skip mode set first para is skip addr, second para is skip len, multi-segment region with ; separated
+skip_mode = 0x0, 0x0
+# 0: not use isp mode, #1: isp mode
+boot2_isp_mode = 0
+
+[FW2]
+filedir = ./whole_img_d0.bin
+address = 0x100000
+
diff --git a/bsp/bouffalo_lab/bl808/d0/link_stacksize.lds b/bsp/bouffalo_lab/bl808/d0/link_stacksize.lds new file mode 100755 index 0000000000..8685bc0f1c --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/link_stacksize.lds @@ -0,0 +1 @@ +__STACKSIZE__ = 16384;
\ No newline at end of file diff --git a/bsp/bouffalo_lab/bl808/d0/merge_rtsmart.py b/bsp/bouffalo_lab/bl808/d0/merge_rtsmart.py new file mode 100755 index 0000000000..c2676692f4 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/merge_rtsmart.py @@ -0,0 +1,88 @@ +import os +import sys + +compress_flag = 0 + +def create_flash_default_data(length): + datas = bytearray(length) + for i in range(length): + datas[i] = 0xff + return datas + +def gen_flash_bin(): + bootload_file = "./pre_build_bin/spl_bl808_d0.bin" + dtb_file = "./pre_build_bin/hw.dtb.5M" # 64k + opensbi_file = "./pre_build_bin/opensbi_v0.6.bin" # 64k + kernel_file = "./Image.bin" + + kernel_out_img_file = "./whole_img_d0.bin" + + bootload_file_size = os.stat(bootload_file).st_size + dtb_file_size = os.stat(dtb_file).st_size + linux_opensbi_file_size = os.stat(opensbi_file).st_size + kernel_file_size = os.stat(kernel_file).st_size + + whole_img_data = create_flash_default_data(0x10000 + 0x10000 + 0x10000 + kernel_file_size) + + # bootload + print("bootload size:", bootload_file_size) + fp = open(bootload_file, 'rb') + data00 = fp.read() + bytearray(0) + fp.close() + whole_img_data[0x0:0x0+len(data00)] = data00 # 0x0~0x10000 64k + + # dtb + print("dtb size:", dtb_file_size) + fp = open(dtb_file, 'rb') + data0 = fp.read() + bytearray(0) + fp.close() + whole_img_data[0x10000:0x10000+len(data0)] = data0 # 0x0~0x10000 64k + + # opensbi + print("opensbi size:",linux_opensbi_file_size) + fp = open(opensbi_file, 'rb') + data1 = fp.read() + bytearray(0) + fp.close() + whole_img_data[0x20000:0x20000+len(data1)] = data1 # 0x10000~0x20000 64k + + # linux kernel + print("kernel img size:",kernel_file_size) + + b0 = (kernel_file_size & 0xff000000) >> 24 + b1 = (kernel_file_size & 0xff0000) >> 16 + b2 = (kernel_file_size & 0xff00) >> 8 + b3 = kernel_file_size & 0xff + # print(b0) + # print(b1) + # print(b2) + # print(b3) + header2 = [0x00,0x00,0x00,compress_flag,b3,b2,b1,b0] + whole_img_data[0x2fff8:0x30000] = bytearray((header2)) # image header + fp = open(kernel_file, 'rb') + data2 = fp.read() + bytearray(0) + fp.close() + whole_img_data[0x30000:0x30000+len(data2)] = data2 # 4M + + fp = open(kernel_out_img_file, 'wb+') + fp.write(whole_img_data) + fp.close() + +if __name__ == '__main__': + if(len(sys.argv) < 2): + compress_flag = 0 + os.system('cp -rf rtthread_d0.bin Image.bin') + else: + if int(sys.argv[1]) == 1: + print("compress mode...") + compress_flag = 1 + os.system('lz4 -9 -f rtthread_d0.bin Image.bin') + else: + compress_flag = 0 + os.system('cp -rf rtthread_d0.bin Image.bin') + + print("merge bin start...") + gen_flash_bin() + print("merge done!") + + os.system('rm -rf Image.bin') + diff --git a/bsp/bouffalo_lab/bl808/d0/pre_build_bin/hw.dtb.5M b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/hw.dtb.5M Binary files differnew file mode 100755 index 0000000000..c320ed51f0 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/hw.dtb.5M diff --git a/bsp/bouffalo_lab/bl808/d0/pre_build_bin/opensbi_v0.6.bin b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/opensbi_v0.6.bin Binary files differnew file mode 100755 index 0000000000..23f67817ea --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/opensbi_v0.6.bin diff --git a/bsp/bouffalo_lab/bl808/d0/pre_build_bin/spl_bl808_d0.bin b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/spl_bl808_d0.bin Binary files differnew file mode 100755 index 0000000000..6a9f8b9882 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/pre_build_bin/spl_bl808_d0.bin diff --git a/bsp/bouffalo_lab/bl808/d0/rtconfig.h b/bsp/bouffalo_lab/bl808/d0/rtconfig.h new file mode 100755 index 0000000000..6024907d04 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/rtconfig.h @@ -0,0 +1,278 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Project Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 20 +#define RT_USING_SMART +#define RT_ALIGN_SIZE 8 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 16384 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 16384 + +/* kservice optimization */ + +#define RT_KSERVICE_USING_STDLIB +#define RT_KPRINTF_USING_LONGLONG +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_PAGE_MAX_ORDER 11 +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_MEMTRACE +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 256 +#define RT_CONSOLE_DEVICE_NAME "uart3" +#define RT_VER_NUM 0x50001 +#define ARCH_CPU_64BIT +#define RT_USING_CACHE +#define ARCH_MM_MMU +#define KERNEL_VADDR_START 0x50000000 +#define ARCH_RISCV +#define ARCH_RISCV64 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 16384 +#define RT_MAIN_THREAD_PRIORITY 10 +#define RT_USING_MSH +#define RT_USING_FINSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 8192 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* DFS: device virtual file system */ + +#define RT_USING_DFS +#define DFS_USING_POSIX +#define DFS_USING_WORKDIR +#define DFS_FD_MAX 16 +#define RT_USING_DFS_V1 +#define DFS_FILESYSTEMS_MAX 4 +#define DFS_FILESYSTEM_TYPES_MAX 4 +#define RT_USING_DFS_DEVFS +#define RT_USING_LWP +#define RT_LWP_MAX_NR 30 +#define LWP_TASK_STACK_SIZE 16384 +#define RT_CH_MSG_MAX_NR 1024 +#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024 +#define LWP_TID_MAX_NR 64 +#define RT_LWP_SHM_MAX_NR 64 + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_UNAMED_PIPE_NUMBER 64 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_TTY +#define RT_USING_NULL +#define RT_USING_ZERO +#define RT_USING_RANDOM +#define RT_USING_RTC + +/* Using USB */ + + +/* C/C++ and POSIX layer */ + +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + +#define RT_USING_POSIX_FS +#define RT_USING_POSIX_DEVIO +#define RT_USING_POSIX_STDIO +#define RT_USING_POSIX_POLL +#define RT_USING_POSIX_SELECT +#define RT_USING_POSIX_TERMIOS +#define RT_USING_POSIX_DELAY +#define RT_USING_POSIX_CLOCK +#define RT_USING_POSIX_TIMER + +/* Interprocess Communication (IPC) */ + +#define RT_USING_POSIX_PIPE +#define RT_USING_POSIX_PIPE_SIZE 512 + +/* Socket is in the 'Network' category */ + + +/* Network */ + + +/* Utilities */ + +#define RT_USING_ADT + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + +/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ + + +/* XML: Extensible Markup Language */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + +/* sensors drivers */ + + +/* touch drivers */ + + +/* Kendryte SDK */ + + +/* AI packages */ + + +/* Signal Processing and Control Algorithm Packages */ + + +/* miscellaneous packages */ + +/* project laboratory */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Arduino libraries */ + + +/* Projects */ + + +/* Sensors */ + + +/* Display */ + + +/* Timing */ + + +/* Data Processing */ + + +/* Data Storage */ + +/* Communication */ + + +/* Device Control */ + + +/* Other */ + + +/* Signal IO */ + + +/* Uncategorized */ + +#define BSP_USING_BL808 +#define BL808_CORE_D0 +#define C906_PLIC_PHY_ADDR 0xe0000000 +#define IRQ_MAX_NR 64 +#define TIMER_CLK_FREQ 1000000 + +/* General Drivers Configuration */ + +#define BSP_USING_UART3 +#define UART3_TX_USING_GPIO16 +#define UART3_RX_USING_GPIO17 +#define __STACKSIZE__ 16384 + +#endif diff --git a/bsp/bouffalo_lab/bl808/d0/rtconfig.py b/bsp/bouffalo_lab/bl808/d0/rtconfig.py new file mode 100755 index 0000000000..4b3e4e7970 --- /dev/null +++ b/bsp/bouffalo_lab/bl808/d0/rtconfig.py @@ -0,0 +1,63 @@ +import os + +# toolchains options +ARCH ='risc-v' +VENDOR ='t-head' +CPU ='c906' +CROSS_TOOL ='gcc' + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = r'../../../..' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'/opt/riscv64_musl/bin' +else: + print('Please make sure your toolchains is GNU GCC!') + exit(0) + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = os.getenv('RTT_CC_PREFIX') or 'riscv64-unknown-linux-musl-' + CC = PREFIX + 'gcc' + CXX = PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -march=rv64imafdc -mabi=lp64 -mcmodel=medany' + CFLAGS = DEVICE + ' -Wall -Wno-cpp -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=unused-variable -Wno-error=deprecated-declarations -Wextra -Wno-unused-parameter -Wno-sign-compare' + CFLAGS += ' -Wno-old-style-declaration -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -fshort-enums -fcommon -ffreestanding -fno-strict-aliasing -fno-jump-tables -save-temps=obj' + CFLAGS += ' -D_POSIX_SOURCE' + CFLAGS += ' -DCFG_COMPONENT_BLOG_ENABLE=0 -DBFLB_USE_HAL_DRIVER -DCPU_D0 -DBL808 -DLOG_UART_ID_0' + + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' + LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T board/linker_scripts/link.lds' + ' -lsupc++ -lgcc -static' + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf' + AFLAGS += ' -gdwarf' + else: + CFLAGS += ' -O3' + + CXXFLAGS = CFLAGS + +DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n' +POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread_d0.bin\n' + SIZE + ' $TARGET \n' +POST_ACTION += 'python3 merge_rtsmart.py' diff --git a/bsp/bouffalo_lab/bl808/flash_prog_cfg.ini b/bsp/bouffalo_lab/bl808/flash_prog_cfg.ini index 9f1649df30..a3d4f4e7e0 100755 --- a/bsp/bouffalo_lab/bl808/flash_prog_cfg.ini +++ b/bsp/bouffalo_lab/bl808/flash_prog_cfg.ini @@ -13,3 +13,8 @@ address = 0x000000 [FW2]
filedir = ./lp/rtthread_lp.bin
address = 0xC0000
+
+[FW3]
+filedir = ./d0/whole_img_d0.bin
+address = 0x100000
+
diff --git a/bsp/bouffalo_lab/bl808/m0/.config b/bsp/bouffalo_lab/bl808/m0/.config index 1c7d3a1540..cce684d307 100644 --- a/bsp/bouffalo_lab/bl808/m0/.config +++ b/bsp/bouffalo_lab/bl808/m0/.config @@ -59,7 +59,6 @@ CONFIG_RT_USING_MESSAGEQUEUE=y # # Memory Management # -CONFIG_RT_PAGE_MAX_ORDER=11 CONFIG_RT_USING_MEMPOOL=y CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set @@ -83,7 +82,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x50000 +CONFIG_RT_VER_NUM=0x50001 # CONFIG_RT_USING_STDC_ATOMIC is not set # CONFIG_RT_USING_CACHE is not set # CONFIG_RT_USING_HW_ATOMIC is not set @@ -118,6 +117,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set # CONFIG_FINSH_USING_AUTH is not set CONFIG_FINSH_ARG_MAX=10 + +# +# DFS: device virtual file system +# # CONFIG_RT_USING_DFS is not set # CONFIG_RT_USING_FAL is not set @@ -608,7 +611,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LKDGUI is not set # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_WM_LIBRARIES is not set # # Kendryte SDK @@ -667,7 +669,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MISAKA_AT24CXX is not set # CONFIG_PKG_USING_MISAKA_RGB_BLING is not set # CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set -# CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set # CONFIG_PKG_USING_RFM300 is not set @@ -973,7 +974,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_BSP_USING_BL808=y CONFIG_BL808_CORE_M0=y -# CONFIG_BSP_USING_PSRAM is not set +CONFIG_BSP_USING_TRIPLECORE=y +CONFIG_BSP_USING_PSRAM=y # # General Drivers Configuration @@ -997,3 +999,5 @@ CONFIG_UART0_RX_USING_GPIO15=y # CONFIG_BSP_USING_RTC is not set # CONFIG_BSP_USING_WDT is not set # CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_HWTIMER is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set diff --git a/bsp/bouffalo_lab/bl808/m0/board/Kconfig b/bsp/bouffalo_lab/bl808/m0/board/Kconfig index d9ec26766e..5b4ceb3f6f 100755 --- a/bsp/bouffalo_lab/bl808/m0/board/Kconfig +++ b/bsp/bouffalo_lab/bl808/m0/board/Kconfig @@ -11,6 +11,11 @@ config BL808_CORE_M0 bool default y +config BSP_USING_TRIPLECORE + bool "Enable Triplecore" + default y + select BSP_USING_PSRAM + config BSP_USING_PSRAM bool "Enable PSRAM" default n diff --git a/bsp/bouffalo_lab/bl808/m0/board/board.c b/bsp/bouffalo_lab/bl808/m0/board/board.c index d8545b54e4..644d77c648 100644 --- a/bsp/bouffalo_lab/bl808/m0/board/board.c +++ b/bsp/bouffalo_lab/bl808/m0/board/board.c @@ -184,16 +184,17 @@ void rt_hw_board_init(void) rt_components_board_init(); #endif +#ifdef BSP_USING_TRIPLECORE /* set CPU D0 boot XIP address and flash address */ Tzc_Sec_Set_CPU_Group(GLB_CORE_ID_D0, 1); /* D0 boot from 0x58000000 */ GLB_Set_CPU_Reset_Address(GLB_CORE_ID_D0, 0x58000000); - /* D0 image offset on flash is CONFIG_D0_FLASH_ADDR+0x1000(header) */ - bflb_sf_ctrl_set_flash_image_offset(CONFIG_D0_FLASH_ADDR + 0x1000, 1, SF_CTRL_FLASH_BANK0); + /* D0 image offset on flash is CONFIG_D0_FLASH_ADDR */ + bflb_sf_ctrl_set_flash_image_offset(CONFIG_D0_FLASH_ADDR, 1, SF_CTRL_FLASH_BANK0); Tzc_Sec_Set_CPU_Group(GLB_CORE_ID_LP, 0); /* LP boot from 0x580C0000 */ - GLB_Set_CPU_Reset_Address(GLB_CORE_ID_LP, 0x580C0000); + GLB_Set_CPU_Reset_Address(GLB_CORE_ID_LP, 0x58000000 + CONFIG_LP_FLASH_ADDR); GLB_Release_CPU(GLB_CORE_ID_D0); GLB_Release_CPU(GLB_CORE_ID_LP); @@ -202,6 +203,7 @@ void rt_hw_board_init(void) BL_WR_WORD(IPC_SYNC_ADDR1, IPC_SYNC_FLAG); BL_WR_WORD(IPC_SYNC_ADDR2, IPC_SYNC_FLAG); L1C_DCache_Clean_By_Addr(IPC_SYNC_ADDR1, 8); +#endif } void rt_hw_cpu_reset(void) diff --git a/bsp/bouffalo_lab/bl808/m0/board/board.h b/bsp/bouffalo_lab/bl808/m0/board/board.h index 87b65931e7..b6322e22e2 100644 --- a/bsp/bouffalo_lab/bl808/m0/board/board.h +++ b/bsp/bouffalo_lab/bl808/m0/board/board.h @@ -26,6 +26,7 @@ #include "bl808_uhs_phy.h" #define CONFIG_D0_FLASH_ADDR 0x100000 +#define CONFIG_LP_FLASH_ADDR 0x0C0000 extern uint8_t __HeapBase; extern uint8_t __HeapLimit; diff --git a/bsp/bouffalo_lab/bl808/m0/rtconfig.h b/bsp/bouffalo_lab/bl808/m0/rtconfig.h index 588144e386..71d1b2d367 100644 --- a/bsp/bouffalo_lab/bl808/m0/rtconfig.h +++ b/bsp/bouffalo_lab/bl808/m0/rtconfig.h @@ -36,7 +36,6 @@ /* Memory Management */ -#define RT_PAGE_MAX_ORDER 11 #define RT_USING_MEMPOOL #define RT_USING_SMALL_MEM #define RT_USING_SMALL_MEM_AS_HEAP @@ -48,7 +47,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x50000 +#define RT_VER_NUM 0x50001 #define ARCH_RISCV #define ARCH_RISCV_FPU #define ARCH_RISCV_FPU_S @@ -74,6 +73,9 @@ #define FINSH_USING_DESCRIPTION #define FINSH_ARG_MAX 10 +/* DFS: device virtual file system */ + + /* Device Drivers */ #define RT_USING_DEVICE_IPC @@ -227,6 +229,8 @@ #define BSP_USING_BL808 #define BL808_CORE_M0 +#define BSP_USING_TRIPLECORE +#define BSP_USING_PSRAM /* General Drivers Configuration */ diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/SConscript b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/SConscript index ce0285bb0e..447d6dfae3 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/SConscript +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/SConscript @@ -11,29 +11,35 @@ CPPPATH = [cwd, cwd + r'/include/arch/risc-v/t-head/Core/Include', cwd + r'/src/flash'] -src = Split(""" - src/bflb_adc.c - src/bflb_cks.c - src/bflb_ef_ctrl.c - src/bflb_gpio.c - src/bflb_i2c.c - src/bflb_dma.c - src/bflb_rtc.c - src/bflb_sec_aes.c - src/bflb_sec_sha.c - src/bflb_sec_trng.c - src/bflb_spi.c - src/bflb_timer.c - src/bflb_uart.c - src/bflb_wdg.c - src/bflb_flash.c - src/flash/bflb_sf_cfg.c - src/flash/bflb_xip_sflash.c - src/flash/bflb_sflash.c - src/flash/bflb_sf_ctrl.c - src/bflb_l1c.c - src/bflb_mtimer.c -""") +if GetDepend('BL808_CORE_D0'): + src = Split(""" + src/bflb_gpio.c + src/bflb_uart.c + """) +else: + src = Split(""" + src/bflb_adc.c + src/bflb_cks.c + src/bflb_ef_ctrl.c + src/bflb_gpio.c + src/bflb_i2c.c + src/bflb_dma.c + src/bflb_rtc.c + src/bflb_sec_aes.c + src/bflb_sec_sha.c + src/bflb_sec_trng.c + src/bflb_spi.c + src/bflb_timer.c + src/bflb_uart.c + src/bflb_wdg.c + src/bflb_flash.c + src/flash/bflb_sf_cfg.c + src/flash/bflb_xip_sflash.c + src/flash/bflb_sflash.c + src/flash/bflb_sf_ctrl.c + src/bflb_l1c.c + src/bflb_mtimer.c + """) if not GetDepend('BL808_CORE_D0'): src += ['src/bflb_irq.c'] diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h index e68737b854..8f095c8023 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/bflb_core.h @@ -90,7 +90,7 @@ void assert_func(uint8_t *file, uint32_t line, uint8_t *function, uint8_t *strin struct bflb_device_s { const char *name; - uint32_t reg_base; + size_t reg_base; uint8_t irq_num; uint8_t idx; uint8_t sub_idx; diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c index b20e6717cb..43a91ed1db 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_gpio.c @@ -4,8 +4,8 @@ void bflb_gpio_init(struct bflb_device_s *dev, uint8_t pin, uint32_t cfgset) { uint32_t cfg = 0; - uint32_t reg_base; - uint32_t cfg_address; + size_t reg_base; + size_t cfg_address; uint8_t drive; uint8_t function; uint16_t mode; @@ -202,7 +202,7 @@ uint32_t bflb_gpio_pin32_63_read(struct bflb_device_s *dev) void bflb_gpio_int_init(struct bflb_device_s *dev, uint8_t pin, uint8_t trig_mode) { - uint32_t reg_base; + size_t reg_base; uint32_t cfg_address; uint32_t regval; @@ -234,7 +234,7 @@ void bflb_gpio_int_init(struct bflb_device_s *dev, uint8_t pin, uint8_t trig_mod void bflb_gpio_int_mask(struct bflb_device_s *dev, uint8_t pin, bool mask) { - uint32_t reg_base; + size_t reg_base; uint32_t cfg_address; uint32_t regval; @@ -272,7 +272,7 @@ bool bflb_gpio_get_intstatus(struct bflb_device_s *dev, uint8_t pin) void bflb_gpio_int_clear(struct bflb_device_s *dev, uint8_t pin) { - uint32_t reg_base; + size_t reg_base; uint32_t cfg_address; uint32_t regval; @@ -298,7 +298,7 @@ void bflb_gpio_int_clear(struct bflb_device_s *dev, uint8_t pin) void bflb_gpio_uart_init(struct bflb_device_s *dev, uint8_t pin, uint8_t uart_func) { - uint32_t reg_base; + size_t reg_base; uint32_t regval; uint8_t sig; uint8_t sig_pos; @@ -412,7 +412,7 @@ void bflb_gpio_uart_init(struct bflb_device_s *dev, uint8_t pin, uint8_t uart_fu int bflb_gpio_feature_control(struct bflb_device_s *dev, int cmd, size_t arg) { int ret = 0; - uint32_t reg_base; + size_t reg_base; uint32_t regval; uint8_t pin = arg; diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c index abed55c829..d838fb6140 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/bflb_uart.c @@ -7,7 +7,7 @@ void bflb_uart_init(struct bflb_device_s *dev, const struct bflb_uart_config_s * uint32_t div = 0; uint32_t tx_cfg; uint32_t rx_cfg; - uint32_t reg_base; + size_t reg_base; uint32_t regval; reg_base = dev->reg_base; @@ -119,7 +119,7 @@ void bflb_uart_init(struct bflb_device_s *dev, const struct bflb_uart_config_s * void bflb_uart_deinit(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; uint32_t tx_cfg; uint32_t rx_cfg; @@ -134,7 +134,7 @@ void bflb_uart_deinit(struct bflb_device_s *dev) void bflb_uart_enable(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; uint32_t tx_cfg; uint32_t rx_cfg; @@ -149,7 +149,7 @@ void bflb_uart_enable(struct bflb_device_s *dev) void bflb_uart_disable(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; uint32_t tx_cfg; uint32_t rx_cfg; @@ -164,7 +164,7 @@ void bflb_uart_disable(struct bflb_device_s *dev) void bflb_uart_link_txdma(struct bflb_device_s *dev, bool enable) { - uint32_t reg_base; + size_t reg_base; uint32_t regval; reg_base = dev->reg_base; @@ -179,7 +179,7 @@ void bflb_uart_link_txdma(struct bflb_device_s *dev, bool enable) void bflb_uart_link_rxdma(struct bflb_device_s *dev, bool enable) { - uint32_t reg_base; + size_t reg_base; uint32_t regval; reg_base = dev->reg_base; @@ -195,14 +195,14 @@ void bflb_uart_link_rxdma(struct bflb_device_s *dev, bool enable) ATTR_TCM_SECTION int bflb_uart_putchar(struct bflb_device_s *dev, int ch) { uint64_t start_time; - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; - start_time = bflb_mtimer_get_time_ms(); + // start_time = bflb_mtimer_get_time_ms(); while ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_TX_FIFO_CNT_MASK) == 0) { - if ((bflb_mtimer_get_time_ms() - start_time) > 100) { - return -ETIMEDOUT; - } + // if ((bflb_mtimer_get_time_ms() - start_time) > 100) { + // return -ETIMEDOUT; + // } } putreg8(ch, reg_base + UART_FIFO_WDATA_OFFSET); return 0; @@ -211,7 +211,7 @@ ATTR_TCM_SECTION int bflb_uart_putchar(struct bflb_device_s *dev, int ch) ATTR_TCM_SECTION int bflb_uart_getchar(struct bflb_device_s *dev) { int ch = -1; - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_RX_FIFO_CNT_MASK) != 0) { @@ -250,7 +250,7 @@ ATTR_TCM_SECTION int bflb_uart_get(struct bflb_device_s *dev, uint8_t *data, uin bool bflb_uart_txready(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_TX_FIFO_CNT_MASK) != 0) { @@ -262,7 +262,7 @@ bool bflb_uart_txready(struct bflb_device_s *dev) bool bflb_uart_txempty(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; if ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_TX_FIFO_CNT_MASK) == (UART_TX_FIFO_CNT_MASK >> 1) + 1) { @@ -274,7 +274,7 @@ bool bflb_uart_txempty(struct bflb_device_s *dev) bool bflb_uart_rxavailable(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; return ((getreg32(reg_base + UART_FIFO_CONFIG_1_OFFSET) & UART_RX_FIFO_CNT_MASK) != 0); @@ -282,7 +282,7 @@ bool bflb_uart_rxavailable(struct bflb_device_s *dev) void bflb_uart_txint_mask(struct bflb_device_s *dev, bool mask) { - uint32_t reg_base; + size_t reg_base; uint32_t int_mask; reg_base = dev->reg_base; @@ -297,7 +297,7 @@ void bflb_uart_txint_mask(struct bflb_device_s *dev, bool mask) void bflb_uart_rxint_mask(struct bflb_device_s *dev, bool mask) { - uint32_t reg_base; + size_t reg_base; uint32_t int_mask; reg_base = dev->reg_base; @@ -314,7 +314,7 @@ void bflb_uart_rxint_mask(struct bflb_device_s *dev, bool mask) void bflb_uart_errint_mask(struct bflb_device_s *dev, bool mask) { - uint32_t reg_base; + size_t reg_base; uint32_t int_mask; reg_base = dev->reg_base; @@ -339,7 +339,7 @@ void bflb_uart_errint_mask(struct bflb_device_s *dev, bool mask) uint32_t bflb_uart_get_intstatus(struct bflb_device_s *dev) { - uint32_t reg_base; + size_t reg_base; uint32_t int_status; uint32_t int_mask; @@ -351,7 +351,7 @@ uint32_t bflb_uart_get_intstatus(struct bflb_device_s *dev) void bflb_uart_int_clear(struct bflb_device_s *dev, uint32_t int_clear) { - uint32_t reg_base; + size_t reg_base; reg_base = dev->reg_base; putreg32(int_clear, reg_base + UART_INT_CLEAR_OFFSET); @@ -360,7 +360,7 @@ void bflb_uart_int_clear(struct bflb_device_s *dev, uint32_t int_clear) int bflb_uart_feature_control(struct bflb_device_s *dev, int cmd, size_t arg) { int ret = 0; - uint32_t reg_base; + size_t reg_base; uint32_t tmp; uint32_t tx_tmp; uint32_t rx_tmp; diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript index d6bfd46f57..6d4a32a324 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/SConscript @@ -7,6 +7,7 @@ src = [] CPPPATH = [cwd] CPPDEFINES = [] +LOCAL_CFLAGS = ' -DARCH_RISCV' if GetDepend('BL808_CORE_M0'): src += Split(""" @@ -52,12 +53,18 @@ if GetDepend('BL808_CORE_M0') or GetDepend('BL808_CORE_LP'): std/src/bl808_uhs_phy.c std/port/bl808_clock.c """) +elif GetDepend('BL808_CORE_D0'): + src += Split(""" + std/src/bl808_ioremap.c + std/src/bl808_clock.c + std/src/bl808_hbn.c + std/port/bl808_clock.c + """) CPPPATH += [cwd + r'/std/include', cwd + r'/std/include/hardware'] CPPDEFINES += ['CONFIG_IRQ_NUM=80', 'BFLB_USE_HAL_DRIVER', 'BL808', 'default_interrupt_handler=SW_handler'] -LOCAL_CFLAGS = ' -DARCH_RISCV' group = DefineGroup('bl808', src, depend = ['BSP_USING_BL808'], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES, LOCAL_CFLAGS = LOCAL_CFLAGS) diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h new file mode 100644 index 0000000000..6f9a1f927e --- /dev/null +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/bl808_ioremap.h @@ -0,0 +1,163 @@ +/** + ****************************************************************************** + * @file bl808_ioremap.h + * @version V1.0 + * @date + * @brief This file is the standard driver header file + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Bouffalo Lab nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +#ifndef __BL808_IOREMAP_H__ +#define __BL808_IOREMAP_H__ + +#include <stdlib.h> + +#define GLB_BASE_PHY ((uint32_t)0x20000000) +#define MIX_BASE ((uint32_t)0x20001000) +#define GPIP_BASE ((uint32_t)0x20002000) +#define PHY_BASE ((uint32_t)0x20002800) +#define AGC_BASE ((uint32_t)0x20002c00) +#define SEC_DBG_BASE ((uint32_t)0x20003000) +#define SEC_ENG_BASE ((uint32_t)0x20004000) +#define TZ1_BASE ((uint32_t)0x20005000) +#define TZC_SEC_BASE ((uint32_t)0x20005000) +#define TZ2_BASE ((uint32_t)0x20006000) +#define TZC_NSEC_BASE ((uint32_t)0x20006000) +#define EFUSE_BASE ((uint32_t)0x20056000) +#define EF_DATA_BASE ((uint32_t)0x20056000) +#define EF_CTRL_BASE ((uint32_t)0x20056000) +#define CCI_BASE_PHY ((uint32_t)0x20008000) +#define MCU_MISC_BASE ((uint32_t)0x20009000) +#define L1C_BASE ((uint32_t)0x20009000) +#define UART0_BASE ((uint32_t)0x2000a000) +#define UART1_BASE ((uint32_t)0x2000a100) +#define SPI0_BASE ((uint32_t)0x2000a200) +#define I2C0_BASE ((uint32_t)0x2000a300) +#define PWM_BASE ((uint32_t)0x2000a400) +#define TIMER0_BASE ((uint32_t)0x2000a500) +#define IR_BASE ((uint32_t)0x2000a600) +#define CKS_BASE ((uint32_t)0x2000a700) +#define IPC0_BASE ((uint32_t)0x2000a800) +#define IPC1_BASE ((uint32_t)0x2000a840) +#define I2C1_BASE ((uint32_t)0x2000a900) +#define UART2_BASE ((uint32_t)0x2000aa00) +#define I2S_BASE ((uint32_t)0x2000ab00) +#define PDM0_BASE ((uint32_t)0x2000a000) +#define LZ4D_BASE ((uint32_t)0x2000ad00) +#define QSPI_BASE ((uint32_t)0x2000b000) +#define SF_CTRL_BASE ((uint32_t)0x2000b000) +#define SF_CTRL_BUF_BASE ((uint32_t)0x2000b600) +#define DMA0_BASE ((uint32_t)0x2000c000) +#define PDS_BASE_PHY ((uint32_t)0x2000e000) +#define HBN_BASE_PHY ((uint32_t)0x2000f000) +#define AON_BASE ((uint32_t)0x2000f000) +#define EMI_MISC_BASE ((uint32_t)0x20050000) +#define PSRAM_CTRL_BASE ((uint32_t)0x20052000) +#define USB_BASE ((uint32_t)0x20072000) +#define AUDIO_BASE ((uint32_t)0x20055000) +#define SDH_BASE ((uint32_t)0x20060000) +#define EMAC_BASE ((uint32_t)0x20070000) +#define DMA1_BASE ((uint32_t)0x20071000) + +/* MMSYS */ +#define MM_MISC_BASE ((uint32_t)0x30000000) +#define DMA2_BASE ((uint32_t)0x30001000) +#define UART3_BASE ((uint32_t)0x30002000) +#define I2C2_BASE ((uint32_t)0x30003000) +#define I2C3_BASE ((uint32_t)0x30004000) +#define IPC2_BASE ((uint32_t)0x30005000) +#define DMA2D_BASE ((uint32_t)0x30006000) +#define CLKRST_CTRL_BASE ((uint32_t)0x30007000) +#define MM_GLB_BASE_PHY ((uint32_t)0x30007000) +#define SPI1_BASE ((uint32_t)0x30008000) +#define TIMER1_BASE ((uint32_t)0x30009000) +#define PSRAM_UHS_BASE ((uint32_t)0x3000f000) + +/* SUBSYS */ +#define SUB_MISC_BASE ((uint32_t)0x30010000) +#define SUB_BASE ((uint32_t)0x30011000) +#define DVP0_BASE ((uint32_t)0x30012000) +#define DVP1_BASE ((uint32_t)0x30012100) +#define DVP2_BASE ((uint32_t)0x30012200) +#define DVP3_BASE ((uint32_t)0x30012300) +#define DVP4_BASE ((uint32_t)0x30012400) +#define DVP5_BASE ((uint32_t)0x30012500) +#define DVP6_BASE ((uint32_t)0x30012600) +#define DVP7_BASE ((uint32_t)0x30012700) +#define DVP_TSRC0_BASE ((uint32_t)0x30012800) +#define DVP_TSRC1_BASE ((uint32_t)0x30012900) +#define AXI_CTRL_NR3D_BASE ((uint32_t)0x30012a00) +#define OSD_PROBE_BASE ((uint32_t)0x30012b00) +#define OSD_A_BASE ((uint32_t)0x30013000) +#define OSD_B_BASE ((uint32_t)0x30014000) +#define OSD_DP_BASE ((uint32_t)0x30015000) +#define OSD_BLEND0_OFFSET (0x000) +#define OSD_BLEND1_OFFSET (0x100) +#define OSD_BLEND2_OFFSET (0x200) +#define OSD_BLEND3_OFFSET (0x300) +#define OSD_DRAW_LOW_OFFSET (0x400) +#define OSD_DRAW_HIGH_OFFSET (0x504) +#define MIPI_BASE ((uint32_t)0x3001a000) +#define DBI_BASE ((uint32_t)0x3001b000) +#define DSI_BASE ((uint32_t)0x3001a100) +#define CSI_BASE ((uint32_t)0x3001a000) + +/* CODEC_SUBSYS */ +#define CODEC_MISC_BASE ((uint32_t)0x30020000) +#define MJPEG_BASE ((uint32_t)0x30021000) +#define VIDEO_BASE ((uint32_t)0x30022000) +#define MJPEG_DEC_BASE ((uint32_t)0x30023000) +#define BL_CNN_BASE ((uint32_t)0x30024000) + +#define HBN_RAM_BASE ((uint32_t)0x20010000) + +#define RF_BASE ((uint32_t)0x20001000) + + +extern void *glb_base; +extern size_t get_glb_base(void); +#define GLB_BASE get_glb_base() + +extern void *cci_base; +extern size_t get_cci_base(void); +#define CCI_BASE get_cci_base() + +extern void *hbn_base; +extern size_t get_hbn_base(void); +#define PDS_BASE get_pds_base() + +extern void *pds_base; +extern size_t get_pds_base(void); +#define HBN_BASE get_hbn_base() + +extern void *mm_glb_base; +extern size_t get_mm_glb_base(void); +#define MM_GLB_BASE get_mm_glb_base() + +#endif /* __BL808_IOREMAP_H__ */
\ No newline at end of file diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h index 4e34802d14..f77bb2d727 100755 --- a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/bl808.h @@ -399,6 +399,9 @@ typedef enum { /*@} end of group Memory_Map_Section */ /* BL808 peripherals base address */ + +#ifndef RT_USING_SMART + /* WLSYS */ #define GLB_BASE ((uint32_t)0x20000000) #define MIX_BASE ((uint32_t)0x20001000) @@ -501,6 +504,12 @@ typedef enum { #define RF_BASE ((uint32_t)0x20001000) +#else + +#include "bl808_ioremap.h" + +#endif + typedef enum { BL_AHB_MASTER_CPU = 0x00, BL_AHB_MASTER_SDU = 0x01, diff --git a/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c new file mode 100644 index 0000000000..803f220735 --- /dev/null +++ b/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/bl808_ioremap.c @@ -0,0 +1,93 @@ +/** + ****************************************************************************** + * @file bl808_ioremap.c + * @version V1.0 + * @date + * @brief This file is the standard driver c file + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Bouffalo Lab nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +#ifdef RT_USING_SMART + +#include <stdlib.h> +#include <ioremap.h> +#include "bl808.h" + +void *glb_base = NULL; +size_t get_glb_base(void) +{ + if(glb_base == NULL) + { + glb_base = rt_ioremap((void *)GLB_BASE_PHY, 0x1000); + } + return (size_t)glb_base; +} + +void *cci_base = NULL; +size_t get_cci_base(void) +{ + if(cci_base == NULL) + { + cci_base = rt_ioremap((void *)CCI_BASE_PHY, 0x1000); + } + return (size_t)cci_base; +} + +void *pds_base = NULL; +size_t get_pds_base(void) +{ + if(pds_base == NULL) + { + pds_base = rt_ioremap((void *)PDS_BASE_PHY, 0x1000); + } + return (size_t)pds_base; +} + +void *hbn_base = NULL; +size_t get_hbn_base(void) +{ + if(hbn_base == NULL) + { + hbn_base = rt_ioremap((void *)HBN_BASE_PHY, 0x1000); + } + return (size_t)hbn_base; +} + +void *mm_glb_base = NULL; +size_t get_mm_glb_base(void) +{ + if(mm_glb_base == NULL) + { + mm_glb_base = rt_ioremap((void *)MM_GLB_BASE_PHY, 0x1000); + } + return (size_t)mm_glb_base; +} + +#endif diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c index 4bd3c1cb24..3dac639224 100755..100644 --- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c +++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_uart.c @@ -15,6 +15,10 @@ #include "board.h" #include "drv_uart.h" +#ifdef RT_USING_SMART +#include <ioremap.h> +#endif + #define DBG_TAG "DRV.UART" #define DBG_LVL DBG_WARNING #include <rtdbg.h> @@ -86,13 +90,69 @@ #define UART2_GPIO_RX GPIO_PIN_21 #endif + +// uart3 +#ifdef UART3_TX_USING_GPIO0 +#define UART3_GPIO_TX GPIO_PIN_0 +#elif defined(UART3_TX_USING_GPIO4) +#define UART3_GPIO_TX GPIO_PIN_4 +#elif defined(UART3_TX_USING_GPIO8) +#define UART3_GPIO_TX GPIO_PIN_8 +#elif defined(UART3_TX_USING_GPIO12) +#define UART3_GPIO_TX GPIO_PIN_12 +#elif defined(UART3_TX_USING_GPIO16) +#define UART3_GPIO_TX GPIO_PIN_16 +#elif defined(UART3_TX_USING_GPIO18) +#define UART3_GPIO_TX GPIO_PIN_18 +#elif defined(UART3_TX_USING_GPIO20) +#define UART3_GPIO_TX GPIO_PIN_20 +#elif defined(UART3_TX_USING_GPIO24) +#define UART3_GPIO_TX GPIO_PIN_24 +#elif defined(UART3_TX_USING_GPIO28) +#define UART3_GPIO_TX GPIO_PIN_28 +#elif defined(UART3_TX_USING_GPIO32) +#define UART3_GPIO_TX GPIO_PIN_32 +#elif defined(UART3_TX_USING_GPIO36) +#define UART3_GPIO_TX GPIO_PIN_36 +#elif defined(UART3_TX_USING_GPIO40) +#define UART3_GPIO_TX GPIO_PIN_40 +#elif defined(UART3_TX_USING_GPIO44) +#define UART3_GPIO_TX GPIO_PIN_44 +#endif + +#ifdef UART3_RX_USING_GPIO1 +#define UART3_GPIO_RX GPIO_PIN_1 +#elif defined(UART3_RX_USING_GPIO5) +#define UART3_GPIO_RX GPIO_PIN_5 +#elif defined(UART3_RX_USING_GPIO9) +#define UART3_GPIO_RX GPIO_PIN_9 +#elif defined(UART3_RX_USING_GPIO13) +#define UART3_GPIO_RX GPIO_PIN_13 +#elif defined(UART3_RX_USING_GPIO17) +#define UART3_GPIO_RX GPIO_PIN_17 +#elif defined(UART3_RX_USING_GPIO21) +#define UART3_GPIO_RX GPIO_PIN_21 +#elif defined(UART3_RX_USING_GPIO25) +#define UART3_GPIO_RX GPIO_PIN_25 +#elif defined(UART3_RX_USING_GPIO29) +#define UART3_GPIO_RX GPIO_PIN_29 +#elif defined(UART3_RX_USING_GPIO33) +#define UART3_GPIO_RX GPIO_PIN_33 +#elif defined(UART3_RX_USING_GPIO37) +#define UART3_GPIO_RX GPIO_PIN_37 +#elif defined(UART3_RX_USING_GPIO41) +#define UART3_GPIO_RX GPIO_PIN_41 +#elif defined(UART3_RX_USING_GPIO45) +#define UART3_GPIO_RX GPIO_PIN_45 +#endif + struct device_uart { struct rt_serial_device serial; struct bflb_device_s *bflb_device; }; -static void _uart_rx_irq(int irq, void *arg) +static void uart_irq_handler(int irq, void *arg) { struct rt_serial_device *serial = (struct rt_serial_device *)arg; RT_ASSERT(serial != RT_NULL); @@ -212,15 +272,26 @@ static rt_err_t _uart_control(struct rt_serial_device *serial, int cmd, void *ar { /* disable interrupt */ case RT_DEVICE_CTRL_CLR_INT: + bflb_uart_rxint_mask(uart->bflb_device, true); +#ifdef BL808_CORE_D0 + rt_hw_interrupt_mask(uart->bflb_device->irq_num); + rt_hw_interrupt_install(uart->bflb_device->irq_num, RT_NULL, serial, RT_NULL); +#else bflb_irq_disable(uart->bflb_device->irq_num); - bflb_irq_attach(uart->bflb_device->irq_num, NULL, NULL); + bflb_irq_attach(uart->bflb_device->irq_num, RT_NULL, RT_NULL); +#endif break; /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: bflb_uart_rxint_mask(uart->bflb_device, false); - bflb_irq_attach(uart->bflb_device->irq_num, _uart_rx_irq, serial); +#ifdef BL808_CORE_D0 + rt_hw_interrupt_install(uart->bflb_device->irq_num, uart_irq_handler, serial, RT_NULL); + rt_hw_interrupt_umask(uart->bflb_device->irq_num); +#else + bflb_irq_attach(uart->bflb_device->irq_num, uart_irq_handler, serial); bflb_irq_enable(uart->bflb_device->irq_num); +#endif break; } return RT_EOK; @@ -265,85 +336,90 @@ static const struct rt_uart_ops _uart_ops = .dma_transmit = RT_NULL }; +static void _uart_init(const char *name, struct device_uart *uart, rt_uint32_t flag) +{ + rt_err_t result = RT_EOK; + + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + struct rt_serial_device *serial; + + serial = &uart->serial; + + serial->ops = &_uart_ops; + serial->config = config; + serial->config.baud_rate = UART_DEFAULT_BAUDRATE; + + /* register USART device */ + result = rt_hw_serial_register(serial, + name, + flag, + uart); + RT_ASSERT(result == RT_EOK); +} /* * UART Initiation */ int rt_hw_uart_init(void) { - rt_err_t result = 0; struct bflb_device_s *gpio; - - struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; - struct rt_serial_device *serial; - struct device_uart *uart; + rt_uint32_t flag; gpio = bflb_device_get_by_name("gpio"); #ifdef BSP_USING_UART0 static struct device_uart bl_uart0; - - serial = &bl_uart0.serial; - uart = &bl_uart0; - - serial->ops = &_uart_ops; - serial->config = config; - serial->config.baud_rate = UART_DEFAULT_BAUDRATE; - - uart->bflb_device = bflb_device_get_by_name("uart0"); + bl_uart0.bflb_device = bflb_device_get_by_name("uart0"); bflb_gpio_uart_init(gpio, UART0_GPIO_TX, GPIO_UART_FUNC_UART0_TX); bflb_gpio_uart_init(gpio, UART0_GPIO_RX, GPIO_UART_FUNC_UART0_RX); - /* register USART device */ - result = rt_hw_serial_register(serial, - "uart0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - uart); - RT_ASSERT(result == RT_EOK); + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; + + _uart_init("uart0", &bl_uart0, flag); #endif #ifdef BSP_USING_UART1 static struct device_uart bl_uart1; + bl_uart1.bflb_device = bflb_device_get_by_name("uart1"); - serial = &bl_uart1.serial; - uart = &bl_uart1; - - serial->ops = &_uart_ops; - serial->config = config; - serial->config.baud_rate = UART_DEFAULT_BAUDRATE; - - uart->bflb_device = bflb_device_get_by_name("uart1"); bflb_gpio_uart_init(gpio, UART1_GPIO_TX, GPIO_UART_FUNC_UART1_TX); bflb_gpio_uart_init(gpio, UART1_GPIO_RX, GPIO_UART_FUNC_UART1_RX); - /* register USART device */ - result = rt_hw_serial_register(serial, - "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - uart); - RT_ASSERT(result == RT_EOK); + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; + + _uart_init("uart1", &bl_uart1, flag); #endif #ifdef BSP_USING_UART2 static struct device_uart bl_uart2; + bl_uart2.bflb_device = bflb_device_get_by_name("uart2"); - serial = &bl_uart2.serial; - uart = &bl_uart2; - - serial->ops = &_uart_ops; - serial->config = config; - serial->config.baud_rate = UART_DEFAULT_BAUDRATE; - - uart->bflb_device = bflb_device_get_by_name("uart2"); bflb_gpio_uart_init(gpio, UART2_GPIO_TX, GPIO_UART_FUNC_UART2_TX); bflb_gpio_uart_init(gpio, UART2_GPIO_RX, GPIO_UART_FUNC_UART2_RX); - /* register USART device */ - result = rt_hw_serial_register(serial, - "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, - uart); - RT_ASSERT(result == RT_EOK); + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; + + _uart_init("uart2", &bl_uart2, flag); #endif + +#ifdef BSP_USING_UART3 + static struct device_uart bl_uart3; + bl_uart3.bflb_device = bflb_device_get_by_name("uart3"); + +#ifdef RT_USING_SMART + gpio->reg_base = (size_t)rt_ioremap((void *)gpio->reg_base, 0x1000); + bl_uart3.bflb_device->reg_base = (size_t)rt_ioremap((void *)bl_uart3.bflb_device->reg_base, 0x1000); +#endif + + bflb_gpio_init(gpio, UART3_GPIO_TX, 21 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1); + bflb_gpio_init(gpio, UART3_GPIO_RX, 21 | GPIO_ALTERNATE | GPIO_PULLUP | GPIO_SMT_EN | GPIO_DRV_1); + + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; + if(strcmp("uart3", RT_CONSOLE_DEVICE_NAME) == 0) + flag |= RT_DEVICE_FLAG_STREAM; + + _uart_init("uart3", &bl_uart3, flag); +#endif + return 0; } |