diff options
Diffstat (limited to 'bsp')
41 files changed, 2096 insertions, 862 deletions
diff --git a/bsp/lm3s8962/Libraries/SConscript b/bsp/lm3s8962/Libraries/SConscript index 162fc442b8..ebf7b660c1 100644 --- a/bsp/lm3s8962/Libraries/SConscript +++ b/bsp/lm3s8962/Libraries/SConscript @@ -3,34 +3,19 @@ Import('rtconfig') from building import *
# The set of source files associated with this SConscript file.
-src = Split("""
- driverlib/adc.c
- driverlib/can.c
- driverlib/comp.c
- driverlib/cpu.c
- driverlib/epi.c
- driverlib/ethernet.c
- driverlib/flash.c
- driverlib/gpio.c
- driverlib/hibernate.c
- driverlib/i2c.c
- driverlib/i2s.c
- driverlib/interrupt.c
- driverlib/mpu.c
- driverlib/pwm.c
- driverlib/qei.c
- driverlib/ssi.c
- driverlib/sysctl.c
- driverlib/systick.c
- driverlib/timer.c
- driverlib/uart.c
- driverlib/udma.c
- driverlib/usb.c
- driverlib/watchdog.c
-""")
+cwd = GetCurrentDir()
+src = Glob('driverlib/*.c')
-CPPPATH = [RTT_ROOT + '/bsp/lm3s8962/Libraries/inc', RTT_ROOT + '/bsp/lm3s8962/Libraries', RTT_ROOT + '/bsp/lm3s8962/Libraries/driverlib']
+# add for startup script
+if rtconfig.CROSS_TOOL == 'gcc':
+ src += ['startup/gcc/startup_LPC17xx.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+ src += ['startup/arm/start_rvds.S']
+elif rtconfig.CROSS_TOOL == 'iar':
+ src += ['startup/iar/start_iar.S']
-group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH)
+CPPPATH = [cwd]
+
+group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
diff --git a/bsp/lm3s8962/Libraries/startup/arm/start_rvds.S b/bsp/lm3s8962/Libraries/startup/arm/start_rvds.S new file mode 100644 index 0000000000..cf564930bc --- /dev/null +++ b/bsp/lm3s8962/Libraries/startup/arm/start_rvds.S @@ -0,0 +1,253 @@ +; <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;
+; Startup.s - Startup code for Stellaris.
+;
+; Copyright (c) 2006-2008 Luminary Micro, Inc. All rights reserved.
+;
+; Software License Agreement
+;
+; Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+; exclusively on LMI's microcontroller products.
+;
+; The software is owned by LMI and/or its suppliers, and is protected under
+; applicable copyright laws. All rights are reserved. You may not combine
+; this software with "viral" open-source software in order to form a larger
+; program. Any use in violation of the foregoing restrictions may subject
+; the user to criminal sanctions under applicable laws, as well as to civil
+; liability for the breach of the terms and conditions of this license.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2523 of the Stellaris Peripheral Driver Library.
+;
+;******************************************************************************
+
+;******************************************************************************
+;
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Stack EQU 0x00000100
+
+;******************************************************************************
+;
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Heap EQU 0x00000000
+
+;******************************************************************************
+;
+; Allocate space for the stack.
+;
+;******************************************************************************
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+StackMem
+ SPACE Stack
+__initial_sp
+
+;******************************************************************************
+;
+; Allocate space for the heap.
+;
+;******************************************************************************
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+HeapMem
+ SPACE Heap
+__heap_limit
+
+ IMPORT PendSV_Handler
+ IMPORT rt_hw_timer_handler
+ IMPORT rt_hw_uart_isr_1
+ IMPORT rt_hw_eth_handler
+ IMPORT HardFault_Handler
+
+;******************************************************************************
+;
+; Indicate that the code in this file preserves 8-byte alignment of the stack.
+;
+;******************************************************************************
+ PRESERVE8
+
+;******************************************************************************
+;
+; Place code into the reset code section.
+;
+;******************************************************************************
+ AREA RESET, CODE, READONLY
+ THUMB
+
+;******************************************************************************
+;
+; The vector table.
+;
+;******************************************************************************
+ EXPORT __Vectors
+__Vectors
+ DCD StackMem + Stack ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NmiSR ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD IntDefaultHandler ; MPU Fault Handler
+ DCD IntDefaultHandler ; Bus Fault Handler
+ DCD IntDefaultHandler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; SVCall Handler
+ DCD IntDefaultHandler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD rt_hw_timer_handler ; SysTick Handler
+ DCD IntDefaultHandler ; GPIO Port A
+ DCD IntDefaultHandler ; GPIO Port B
+ DCD IntDefaultHandler ; GPIO Port C
+ DCD IntDefaultHandler ; GPIO Port D
+ DCD IntDefaultHandler ; GPIO Port E
+ DCD rt_hw_uart_isr_1 ; UART0
+ DCD IntDefaultHandler ; UART1
+ DCD IntDefaultHandler ; SSI
+ DCD IntDefaultHandler ; I2C
+ DCD IntDefaultHandler ; PWM Fault
+ DCD IntDefaultHandler ; PWM Generator 0
+ DCD IntDefaultHandler ; PWM Generator 1
+ DCD IntDefaultHandler ; PWM Generator 2
+ DCD IntDefaultHandler ; Quadrature Encoder
+ DCD IntDefaultHandler ; ADC Sequence 0
+ DCD IntDefaultHandler ; ADC Sequence 1
+ DCD IntDefaultHandler ; ADC Sequence 2
+ DCD IntDefaultHandler ; ADC Sequence 3
+ DCD IntDefaultHandler ; Watchdog
+ DCD IntDefaultHandler ; Timer 0A
+ DCD IntDefaultHandler ; Timer 0B
+ DCD IntDefaultHandler ; Timer 1A
+ DCD IntDefaultHandler ; Timer 1B
+ DCD IntDefaultHandler ; Timer 2A
+ DCD IntDefaultHandler ; Timer 2B
+ DCD IntDefaultHandler ; Comp 0
+ DCD IntDefaultHandler ; Comp 1
+ DCD IntDefaultHandler ; Comp 2
+ DCD IntDefaultHandler ; System Control
+ DCD 0x881 ; Flash Control
+ DCD IntDefaultHandler ; GPIO Port F
+ DCD IntDefaultHandler ; GPIO Port G
+ DCD IntDefaultHandler ; GPIO Port H
+ DCD IntDefaultHandler ; UART2 Rx and Tx
+ DCD IntDefaultHandler ; SSI1 Rx and Tx
+ DCD IntDefaultHandler ; Timer 3 subtimer A
+ DCD IntDefaultHandler ; Timer 3 subtimer B
+ DCD IntDefaultHandler ; I2C1 Master and Slave
+ DCD IntDefaultHandler ; Quadrature Encoder 1
+ DCD IntDefaultHandler ; CAN0
+ DCD IntDefaultHandler ; CAN1
+ DCD IntDefaultHandler ; CAN2
+ DCD rt_hw_eth_handler ; Ethernet
+ DCD IntDefaultHandler ; Hibernate
+ DCD IntDefaultHandler ; USB0
+ DCD IntDefaultHandler ; PWM Generator 3
+ DCD IntDefaultHandler ; uDMA Software Transfer
+ DCD IntDefaultHandler ; uDMA Error
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor first starts execution
+; following a reset event.
+;
+;******************************************************************************
+ EXPORT Reset_Handler
+Reset_Handler
+ ;
+ ; Call the C library enty point that handles startup. This will copy
+ ; the .data section initializers from flash to SRAM and zero fill the
+ ; .bss section.
+ ;
+ IMPORT __main
+ B __main
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a NMI. This
+; simply enters an infinite loop, preserving the system state for examination
+; by a debugger.
+;
+;******************************************************************************
+NmiSR
+ B NmiSR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a fault
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+FaultISR
+ B FaultISR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives an unexpected
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+IntDefaultHandler
+ B IntDefaultHandler
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Some code in the normal code section for initializing the heap and stack.
+;
+;******************************************************************************
+ AREA |.text|, CODE, READONLY
+
+;******************************************************************************
+;
+; The function expected of the C library startup code for defining the stack
+; and heap memory locations. For the C library version of the startup code,
+; provide this function so that the C library initialization code can find out
+; the location of the stack and heap.
+;
+;******************************************************************************
+ IF :DEF: __MICROLIB
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+ ELSE
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+ LDR R0, =HeapMem
+ LDR R1, =(StackMem + Stack)
+ LDR R2, =(HeapMem + Heap)
+ LDR R3, =StackMem
+ BX LR
+ ENDIF
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Tell the assembler that we're done.
+;
+;******************************************************************************
+ END
diff --git a/bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S b/bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S new file mode 100644 index 0000000000..1d1b8e558d --- /dev/null +++ b/bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S @@ -0,0 +1,164 @@ +.section .bss.init
+.equ Stack_Size, 0x00000200
+.space Stack_Size
+Initial_spTop:
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+/* restore original stack pointer */
+ LDR r0, =Initial_spTop
+ MSR msp, r0
+/* Copy the data segment initializers from flash to SRAM */
+ movs r1, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r3, =_sidata
+ ldr r3, [r3, r1]
+ str r3, [r0, r1]
+ adds r1, r1, #4
+
+LoopCopyDataInit:
+ ldr r0, =_sdata
+ ldr r3, =_edata
+ adds r2, r0, r1
+ cmp r2, r3
+ bcc CopyDataInit
+ ldr r2, =_sbss
+ b LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+ movs r3, #0
+ str r3, [r2], #4
+
+LoopFillZerobss:
+ ldr r3, = _ebss
+ cmp r2, r3
+ bcc FillZerobss
+/* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word Initial_spTop
+ .word Reset_Handler
+ .word Default_Handler //NMI_Handler
+ .word rt_hw_hard_fault
+ .word Default_Handler //MemManage_Handler
+ .word Default_Handler //BusFault_Handler
+ .word Default_Handler //UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word Default_Handler //SVC_Handler
+ .word Default_Handler //DebugMon_Handler
+ .word 0
+ .word rt_hw_pend_sv
+ .word rt_hw_timer_handler
+ .word Default_Handler // GPIO Port A
+ .word Default_Handler // GPIO Port B
+ .word Default_Handler // GPIO Port C
+ .word Default_Handler // GPIO Port D
+ .word Default_Handler // GPIO Port E
+ .word rt_hw_uart_isr_1 // UART0 Rx and Tx
+ .word Default_Handler // UART1 Rx and Tx
+ .word Default_Handler // SSI Rx and Tx
+ .word Default_Handler // I2C Master and Slave
+ .word Default_Handler // PWM Fault
+ .word Default_Handler // PWM Generator 0
+ .word Default_Handler // PWM Generator 1
+ .word Default_Handler // PWM Generator 2
+ .word Default_Handler // Quadrature Encoder
+ .word Default_Handler // ADC Sequence 0
+ .word Default_Handler // ADC Sequence 1
+ .word Default_Handler // ADC Sequence 2
+ .word Default_Handler // ADC Sequence 3
+ .word Default_Handler // Watchdog timer
+ .word Default_Handler // Timer 0 subtimer A
+ .word Default_Handler // Timer 0 subtimer B
+ .word Default_Handler // Timer 1 subtimer A
+ .word Default_Handler // Timer 1 subtimer B
+ .word Default_Handler // Timer 2 subtimer A
+ .word Default_Handler // Timer 2 subtimer B
+ .word Default_Handler // Analog Comparator 0
+ .word Default_Handler // Analog Comparator 1
+ .word Default_Handler // Analog Comparator 2
+ .word Default_Handler // System Control (PLL, OSC,
+ .word Default_Handler // FLASH Control
+ .word Default_Handler // GPIO Port F
+ .word Default_Handler // GPIO Port G
+ .word Default_Handler // GPIO Port H
+ .word Default_Handler // UART2 Rx and Tx
+ .word Default_Handler // SSI1 Rx and Tx
+ .word Default_Handler // Timer 3 subtimer A
+ .word Default_Handler // Timer 3 subtimer B
+ .word Default_Handler // I2C1 Master and Slave
+ .word Default_Handler // Quadrature Encoder 1
+ .word Default_Handler // CAN0
+ .word Default_Handler // CAN1
+ .word Default_Handler // CAN2
+ .word luminaryif_isr // Ethernet
+ .word Default_Handler // Hibernate
+ .word Default_Handler // USB0
+ .word Default_Handler // PWM Generator 3
+ .word Default_Handler // uDMA Software Transfer
+ .word Default_Handler // uDMA Error
diff --git a/bsp/lm3s8962/SConscript b/bsp/lm3s8962/SConscript index 41d350e427..a425264923 100644 --- a/bsp/lm3s8962/SConscript +++ b/bsp/lm3s8962/SConscript @@ -1,19 +1,14 @@ -import rtconfig
+# for module compiling
+import os
Import('RTT_ROOT')
-from building import *
-src_bsp = ['application.c', 'startup.c', 'board.c']
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
-src_drv = []
-if GetDepend('RT_USING_DFS'):
- src_drv += ['sdcard.c']
+for d in list:
+ path = os.path.join(cwd, d)
+ if os.path.isfile(os.path.join(path, 'SConscript')):
+ objs = objs + SConscript(os.path.join(d, 'SConscript'))
-if GetDepend('RT_USING_LWIP'):
-
- src_drv += ['luminaryif.c']
-
-src = File(src_bsp + src_drv)
-CPPPATH = [GetCurrentDir()]
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+Return('objs')
diff --git a/bsp/lm3s8962/SConstruct b/bsp/lm3s8962/SConstruct index b8fd65c29f..12d70ecd16 100644 --- a/bsp/lm3s8962/SConstruct +++ b/bsp/lm3s8962/SConstruct @@ -19,9 +19,7 @@ Export('RTT_ROOT') Export('rtconfig')
# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
-
-objs = objs + SConscript(('bsp/lm3s8962/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0)
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
env.Program(TARGET, objs)
diff --git a/bsp/lm3s8962/applications/SConscript b/bsp/lm3s8962/applications/SConscript new file mode 100644 index 0000000000..591734409c --- /dev/null +++ b/bsp/lm3s8962/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = os.path.join(str(Dir('#')), 'applications')
+src = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/lm3s8962/application.c b/bsp/lm3s8962/applications/application.c index fded03279f..fded03279f 100644 --- a/bsp/lm3s8962/application.c +++ b/bsp/lm3s8962/applications/application.c diff --git a/bsp/lm3s8962/startup.c b/bsp/lm3s8962/applications/startup.c index a38733494f..b4c7e3e468 100644 --- a/bsp/lm3s8962/startup.c +++ b/bsp/lm3s8962/applications/startup.c @@ -15,12 +15,12 @@ #include <rthw.h> #include <rtthread.h> -#include "board.h" +#include "board.h"
-#ifdef RT_USING_LWIP -#include <lwip/sys.h> -#include <netif/ethernetif.h> -#endif +#ifdef RT_USING_LWIP
+#include <lwip/sys.h>
+#include <netif/ethernetif.h>
+#endif
/** * @addtogroup LM3S @@ -36,7 +36,7 @@ extern void finsh_set_device(char* device); extern int rt_application_init(void); extern void rt_hw_sdcard_init(void); -extern int rt_hw_luminaryif_init(void); +extern int rt_hw_luminaryif_init(void);
#ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; @@ -100,10 +100,10 @@ void rtthread_startup(void) #ifdef RT_USING_MODULE /* init module system */ rt_system_module_init(); -#endif /* init scheduler system */ rt_system_scheduler_init(); +#endif #ifdef RT_USING_LWIP eth_system_device_init(); diff --git a/bsp/lm3s8962/drivers/SConscript b/bsp/lm3s8962/drivers/SConscript new file mode 100644 index 0000000000..36ce397c33 --- /dev/null +++ b/bsp/lm3s8962/drivers/SConscript @@ -0,0 +1,21 @@ +Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+import copy
+
+cwd = os.path.join(str(Dir('#')), 'drivers')
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+# remove no need file.
+if GetDepend('RT_USING_LWIP') == False:
+ src_need_remove = ['luminaryif.c'] # need remove file list.
+ SrcRemove(src, src_need_remove)
+
+if GetDepend('RT_USING_DFS') == False:
+ src_need_remove = ['sdcard.c'] # need remove file list.
+ SrcRemove(src, src_need_remove)
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/lm3s8962/board.c b/bsp/lm3s8962/drivers/board.c index 56fa83f89b..f7a75b0809 100644 --- a/bsp/lm3s8962/board.c +++ b/bsp/lm3s8962/drivers/board.c @@ -58,10 +58,17 @@ void rt_hw_timer_handler(void) void rt_hw_eth_handler(void) { #ifdef RT_USING_LWIP - /* luminary ethernet interface */ - extern void luminaryif_isr(void); - luminaryif_isr(); -#endif + extern void luminaryif_isr(void); + + /* enter interrupt */ + rt_interrupt_enter(); + + /* luminary ethernet interface */ + luminaryif_isr(); + + /* leave interrupt */ + rt_interrupt_leave(); +#endif } /** diff --git a/bsp/lm3s8962/board.h b/bsp/lm3s8962/drivers/board.h index f33af86d26..f33af86d26 100644 --- a/bsp/lm3s8962/board.h +++ b/bsp/lm3s8962/drivers/board.h diff --git a/bsp/lm3s8962/luminaryif.c b/bsp/lm3s8962/drivers/luminaryif.c index 6038059179..6038059179 100644 --- a/bsp/lm3s8962/luminaryif.c +++ b/bsp/lm3s8962/drivers/luminaryif.c diff --git a/bsp/lm3s8962/luminaryif.h b/bsp/lm3s8962/drivers/luminaryif.h index e987daea5e..e987daea5e 100644 --- a/bsp/lm3s8962/luminaryif.h +++ b/bsp/lm3s8962/drivers/luminaryif.h diff --git a/bsp/lm3s8962/sdcard.c b/bsp/lm3s8962/drivers/sdcard.c index 785f2eaf3e..785f2eaf3e 100644 --- a/bsp/lm3s8962/sdcard.c +++ b/bsp/lm3s8962/drivers/sdcard.c diff --git a/bsp/lm3s8962/drivers/serial.c b/bsp/lm3s8962/drivers/serial.c new file mode 100644 index 0000000000..8572814925 --- /dev/null +++ b/bsp/lm3s8962/drivers/serial.c @@ -0,0 +1,362 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://openlab.rt-thread.com/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-06-11 Bernard first version + */ + +#include <rthw.h> +#include <rtthread.h> + +#include <inc/hw_types.h> +#include <inc/hw_memmap.h> +#include <inc/hw_uart.h> +#include <inc/hw_ints.h> +#include <driverlib/gpio.h> +#include <driverlib/sysctl.h> +#include <driverlib/interrupt.h> + +#include <driverlib/uart.h> +#include "board.h" + +extern void rt_hw_interrupt_thread_switch(void); + +#define RT_UART_RX_BUFFER_SIZE 64 + +/* LM3S serial device */ +struct rt_lm3s_serial +{ + /* inherit from device */ + struct rt_device parent; + + rt_uint32_t hw_base; + rt_uint32_t baudrate; + + /* reception field */ + rt_uint16_t save_index, read_index; + rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; +}; + +#ifdef RT_USING_UART1 +struct rt_lm3s_serial serial1; +#endif +#ifdef RT_USING_UART2 +struct rt_lm3s_serial serial2; +#endif + +void rt_hw_serial_init(void); + +void rt_hw_uart_isr(struct rt_lm3s_serial* serial) +{ + rt_device_t device; + rt_uint32_t status; + + device = (struct rt_device*)serial; + status = UARTIntStatus(serial->hw_base, true); + + /* clear interrupt status */ + UARTIntClear(serial->hw_base, status); + + if (device->flag & RT_DEVICE_FLAG_INT_RX) + { + char ch; + rt_base_t level; + + while (UARTCharsAvail(serial->hw_base)) + { + ch = UARTCharGetNonBlocking(serial->hw_base); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* read character */ + serial->rx_buffer[serial->save_index] = ch; + serial->save_index ++; + if (serial->save_index >= RT_UART_RX_BUFFER_SIZE) + serial->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (serial->save_index == serial->read_index) + { + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* invoke callback */ + if(device->rx_indicate != RT_NULL) + { + rt_int32_t length; + + length = serial->save_index - serial->read_index; + if (length < 0) length += RT_UART_RX_BUFFER_SIZE; + device->rx_indicate(device, length); + } + } +} + +#ifdef RT_USING_UART1 +void rt_hw_uart_isr_1(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +#ifdef RT_USING_UART2 +void rt_hw_uart_isr_2(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial2); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +/** + * @addtogroup LM3S + */ +/*@{*/ + +static rt_err_t rt_serial_init (rt_device_t dev) +{ + return RT_EOK; +} + +static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* enable interrupt */ + if (serial->hw_base == UART0_BASE) + IntEnable(INT_UART0); + else if (serial->hw_base == UART1_BASE) + IntEnable(INT_UART1); + + UARTIntEnable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_close(rt_device_t dev) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* disable UART rx interrupt */ + UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + struct rt_lm3s_serial *serial = (struct rt_lm3s_serial*)dev; + RT_ASSERT(serial != RT_NULL); + + /* point to buffer */ + ptr = (rt_uint8_t*) buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + while (size) + { + /* interrupt receive */ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (serial->read_index != serial->save_index) + { + *ptr = serial->rx_buffer[serial->read_index]; + + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + else + { + /* no data in rx buffer */ + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + ptr ++; size --; + } + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_RX) + { + /* not support right now */ + RT_ASSERT(0); + } + + /* polling mode */ + while (size) + { + *ptr = UARTCharGetNonBlocking(serial->hw_base); + + ptr ++; size --; + } + + return (rt_size_t)ptr - (rt_size_t)buffer; +} + +static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + struct rt_lm3s_serial* serial; + char *ptr; + + serial = (struct rt_lm3s_serial*) dev; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* not support */ + RT_ASSERT(0); + } + + /* polling write */ + ptr = (char *)buffer; + + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + while (UARTCharPutNonBlocking(serial->hw_base, '\r') == false); + + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + else + { + while (size) + { + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + + return (rt_size_t) ptr - (rt_size_t) buffer; +} + +void rt_hw_serial_init(void) +{ + struct rt_lm3s_serial* serial; + +#ifdef RT_USING_UART1 + serial = &serial1; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = UART0_BASE; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + /* enable UART0 clock */ + SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + + /* set UART0 pinmux */ + GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + + /* Configure the UART for 115,200, 8-N-1 operation. */ + UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial->baudrate, + (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE)); + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif + +#ifdef RT_USING_UART2 + serial = &serial2; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = 0xE0010000; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif +} + +/*@}*/ diff --git a/bsp/lm3s8962/project.Uv2 b/bsp/lm3s8962/project.Uv2 index 5ec5957925..16179a344b 100644 --- a/bsp/lm3s8962/project.Uv2 +++ b/bsp/lm3s8962/project.Uv2 @@ -3,130 +3,122 @@ Target (RT-Thread-lm3s), 0x0004 // Tools: 'ARM-ADS'
-Group (Startup)
+Group (Applications)
+Group (Drivers)
+Group (Libraries)
Group (Kernel)
-Group (LM3S)
+Group (CORTEX-M3)
Group (Filesystem)
Group (finsh)
Group (LwIP)
-Group (library)
-
-File 1,1,<.\application.c><application.c>
-File 1,1,<.\startup.c><startup.c>
-File 1,1,<.\board.c><board.c>
-File 1,1,<.\sdcard.c><sdcard.c>
-File 1,1,<.\luminaryif.c><luminaryif.c>
-File 2,1,<..\..\src\clock.c><clock.c>
-File 2,1,<..\..\src\device.c><device.c>
-File 2,1,<..\..\src\idle.c><idle.c>
-File 2,1,<..\..\src\ipc.c><ipc.c>
-File 2,1,<..\..\src\irq.c><irq.c>
-File 2,1,<..\..\src\kservice.c><kservice.c>
-File 2,1,<..\..\src\mem.c><mem.c>
-File 2,1,<..\..\src\mempool.c><mempool.c>
-File 2,1,<..\..\src\module.c><module.c>
-File 2,1,<..\..\src\object.c><object.c>
-File 2,1,<..\..\src\rtm.c><rtm.c>
-File 2,1,<..\..\src\scheduler.c><scheduler.c>
-File 2,1,<..\..\src\slab.c><slab.c>
-File 2,1,<..\..\src\thread.c><thread.c>
-File 2,1,<..\..\src\timer.c><timer.c>
-File 3,1,<..\..\libcpu\arm\lm3s\cpu.c><cpu.c>
-File 3,1,<..\..\libcpu\arm\lm3s\fault.c><fault.c>
-File 3,1,<..\..\libcpu\arm\lm3s\interrupt.c><interrupt.c>
-File 3,1,<..\..\libcpu\arm\lm3s\serial.c><serial.c>
-File 3,1,<..\..\libcpu\arm\lm3s\stack.c><stack.c>
-File 3,2,<..\..\libcpu\arm\lm3s\context_rvds.S><context_rvds.S>
-File 3,2,<..\..\libcpu\arm\lm3s\fault_rvds.S><fault_rvds.S>
-File 3,2,<..\..\libcpu\arm\lm3s\start_rvds.S><start_rvds.S>
-File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
-File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
-File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
-File 4,1,<..\..\components\dfs\src\dfs.c><dfs.c>
-File 4,1,<..\..\components\dfs\src\dfs_fs.c><dfs_fs.c>
-File 4,1,<..\..\components\dfs\src\dfs_file.c><dfs_file.c>
-File 4,1,<..\..\components\dfs\src\dfs_posix.c><dfs_posix.c>
-File 4,1,<..\..\components\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
-File 4,1,<..\..\components\dfs\filesystems\elmfat\ff.c><ff.c>
-File 5,1,<..\..\components\finsh\cmd.c><cmd.c>
-File 5,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
-File 5,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
-File 5,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
-File 5,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
-File 5,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
-File 5,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
-File 5,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
-File 5,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
-File 5,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
-File 5,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
-File 5,1,<..\..\components\finsh\shell.c><shell.c>
-File 5,1,<..\..\components\finsh\symbol.c><symbol.c>
-File 6,1,<..\..\components\net\lwip\src\api\api_lib.c><api_lib.c>
-File 6,1,<..\..\components\net\lwip\src\api\api_msg.c><api_msg.c>
-File 6,1,<..\..\components\net\lwip\src\api\err.c><err.c>
-File 6,1,<..\..\components\net\lwip\src\api\netbuf.c><netbuf.c>
-File 6,1,<..\..\components\net\lwip\src\api\netdb.c><netdb.c>
-File 6,1,<..\..\components\net\lwip\src\api\netifapi.c><netifapi.c>
-File 6,1,<..\..\components\net\lwip\src\api\sockets.c><sockets.c>
-File 6,1,<..\..\components\net\lwip\src\api\tcpip.c><tcpip.c>
-File 6,1,<..\..\components\net\lwip\src\arch\sys_arch.c><sys_arch.c>
-File 6,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
-File 6,1,<..\..\components\net\lwip\src\core\dhcp.c><dhcp.c>
-File 6,1,<..\..\components\net\lwip\src\core\dns.c><dns.c>
-File 6,1,<..\..\components\net\lwip\src\core\init.c><init.c>
-File 6,1,<..\..\components\net\lwip\src\core\memp.c><memp.c>
-File 6,1,<..\..\components\net\lwip\src\core\netif.c><netif.c>
-File 6,1,<..\..\components\net\lwip\src\core\pbuf.c><pbuf.c>
-File 6,1,<..\..\components\net\lwip\src\core\raw.c><raw.c>
-File 6,1,<..\..\components\net\lwip\src\core\stats.c><stats.c>
-File 6,1,<..\..\components\net\lwip\src\core\sys.c><sys.c>
-File 6,1,<..\..\components\net\lwip\src\core\tcp.c><tcp.c>
-File 6,1,<..\..\components\net\lwip\src\core\tcp_in.c><tcp_in.c>
-File 6,1,<..\..\components\net\lwip\src\core\tcp_out.c><tcp_out.c>
-File 6,1,<..\..\components\net\lwip\src\core\udp.c><udp.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c><autoip.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c><icmp.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c><igmp.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\inet.c><inet.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip.c><ip.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
-File 6,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
-File 6,1,<..\..\components\net\lwip\src\netif\etharp.c><etharp.c>
-File 6,1,<..\..\components\net\lwip\src\netif\ethernetif.c><ethernetif.c>
-File 6,1,<..\..\components\net\lwip\src\netif\loopif.c><loopif.c>
-File 6,1,<..\..\components\net\lwip\src\netif\slipif.c><slipif.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c><asn1_dec.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c><asn1_enc.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\mib2.c><mib2.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c><mib_structs.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
-File 6,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
-File 7,1,<Libraries\driverlib\adc.c><adc.c>
-File 7,1,<Libraries\driverlib\can.c><can.c>
-File 7,1,<Libraries\driverlib\comp.c><comp.c>
-File 7,1,<Libraries\driverlib\cpu.c><driverlib_cpu.c>
-File 7,1,<Libraries\driverlib\epi.c><epi.c>
-File 7,1,<Libraries\driverlib\ethernet.c><ethernet.c>
-File 7,1,<Libraries\driverlib\flash.c><flash.c>
-File 7,1,<Libraries\driverlib\gpio.c><gpio.c>
-File 7,1,<Libraries\driverlib\hibernate.c><hibernate.c>
-File 7,1,<Libraries\driverlib\i2c.c><i2c.c>
-File 7,1,<Libraries\driverlib\i2s.c><i2s.c>
-File 7,1,<Libraries\driverlib\interrupt.c><driverlib_interrupt.c>
-File 7,1,<Libraries\driverlib\mpu.c><mpu.c>
-File 7,1,<Libraries\driverlib\pwm.c><pwm.c>
-File 7,1,<Libraries\driverlib\qei.c><qei.c>
-File 7,1,<Libraries\driverlib\ssi.c><ssi.c>
-File 7,1,<Libraries\driverlib\sysctl.c><sysctl.c>
-File 7,1,<Libraries\driverlib\systick.c><systick.c>
-File 7,1,<Libraries\driverlib\timer.c><driverlib_timer.c>
-File 7,1,<Libraries\driverlib\uart.c><uart.c>
-File 7,1,<Libraries\driverlib\udma.c><udma.c>
-File 7,1,<Libraries\driverlib\usb.c><usb.c>
-File 7,1,<Libraries\driverlib\watchdog.c><watchdog.c>
-
+File 1,1,<applications\application.c><application.c>
+File 1,1,<applications\startup.c><startup.c>
+File 2,1,<drivers\board.c><board.c>
+File 2,1,<drivers\luminaryif.c><luminaryif.c>
+File 2,1,<drivers\sdcard.c><sdcard.c>
+File 2,1,<drivers\serial.c><serial.c>
+File 3,1,<Libraries\driverlib\adc.c><adc.c>
+File 3,1,<Libraries\driverlib\can.c><can.c>
+File 3,1,<Libraries\driverlib\comp.c><comp.c>
+File 3,1,<Libraries\driverlib\cpu.c><cpu.c>
+File 3,1,<Libraries\driverlib\epi.c><epi.c>
+File 3,1,<Libraries\driverlib\ethernet.c><ethernet.c>
+File 3,1,<Libraries\driverlib\flash.c><flash.c>
+File 3,1,<Libraries\driverlib\gpio.c><gpio.c>
+File 3,1,<Libraries\driverlib\hibernate.c><hibernate.c>
+File 3,1,<Libraries\driverlib\i2c.c><i2c.c>
+File 3,1,<Libraries\driverlib\i2s.c><i2s.c>
+File 3,1,<Libraries\driverlib\interrupt.c><interrupt.c>
+File 3,1,<Libraries\driverlib\mpu.c><mpu.c>
+File 3,1,<Libraries\driverlib\pwm.c><pwm.c>
+File 3,1,<Libraries\driverlib\qei.c><qei.c>
+File 3,1,<Libraries\driverlib\ssi.c><ssi.c>
+File 3,1,<Libraries\driverlib\sysctl.c><sysctl.c>
+File 3,1,<Libraries\driverlib\systick.c><systick.c>
+File 3,1,<Libraries\driverlib\timer.c><timer.c>
+File 3,1,<Libraries\driverlib\uart.c><uart.c>
+File 3,1,<Libraries\driverlib\udma.c><udma.c>
+File 3,1,<Libraries\driverlib\usb.c><usb.c>
+File 3,1,<Libraries\driverlib\watchdog.c><watchdog.c>
+File 3,2,<Libraries\startup\arm\start_rvds.S><start_rvds.S>
+File 4,1,<..\..\src\clock.c><clock.c>
+File 4,1,<..\..\src\device.c><device.c>
+File 4,1,<..\..\src\idle.c><idle.c>
+File 4,1,<..\..\src\ipc.c><ipc.c>
+File 4,1,<..\..\src\irq.c><irq.c>
+File 4,1,<..\..\src\kservice.c><kservice.c>
+File 4,1,<..\..\src\mem.c><mem.c>
+File 4,1,<..\..\src\mempool.c><mempool.c>
+File 4,1,<..\..\src\object.c><object.c>
+File 4,1,<..\..\src\scheduler.c><scheduler.c>
+File 4,1,<..\..\src\thread.c><thread.c>
+File 4,1,<..\..\src\timer.c><src_timer.c>
+File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
+File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
+File 5,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
+File 5,1,<..\..\libcpu\arm\common\div0.c><div0.c>
+File 5,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
+File 6,1,<..\..\components\dfs\src\dfs.c><dfs.c>
+File 6,1,<..\..\components\dfs\src\dfs_fs.c><dfs_fs.c>
+File 6,1,<..\..\components\dfs\src\dfs_file.c><dfs_file.c>
+File 6,1,<..\..\components\dfs\src\dfs_posix.c><dfs_posix.c>
+File 6,1,<..\..\components\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
+File 6,1,<..\..\components\dfs\filesystems\elmfat\ff.c><ff.c>
+File 7,1,<..\..\components\finsh\cmd.c><cmd.c>
+File 7,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
+File 7,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
+File 7,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
+File 7,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
+File 7,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
+File 7,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
+File 7,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
+File 7,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
+File 7,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
+File 7,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
+File 7,1,<..\..\components\finsh\shell.c><shell.c>
+File 7,1,<..\..\components\finsh\symbol.c><symbol.c>
+File 8,1,<..\..\components\net\lwip\src\api\api_lib.c><api_lib.c>
+File 8,1,<..\..\components\net\lwip\src\api\api_msg.c><api_msg.c>
+File 8,1,<..\..\components\net\lwip\src\api\err.c><err.c>
+File 8,1,<..\..\components\net\lwip\src\api\netbuf.c><netbuf.c>
+File 8,1,<..\..\components\net\lwip\src\api\netdb.c><netdb.c>
+File 8,1,<..\..\components\net\lwip\src\api\netifapi.c><netifapi.c>
+File 8,1,<..\..\components\net\lwip\src\api\sockets.c><sockets.c>
+File 8,1,<..\..\components\net\lwip\src\api\tcpip.c><tcpip.c>
+File 8,1,<..\..\components\net\lwip\src\arch\sys_arch.c><sys_arch.c>
+File 8,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
+File 8,1,<..\..\components\net\lwip\src\core\dhcp.c><dhcp.c>
+File 8,1,<..\..\components\net\lwip\src\core\dns.c><dns.c>
+File 8,1,<..\..\components\net\lwip\src\core\init.c><init.c>
+File 8,1,<..\..\components\net\lwip\src\core\memp.c><memp.c>
+File 8,1,<..\..\components\net\lwip\src\core\netif.c><netif.c>
+File 8,1,<..\..\components\net\lwip\src\core\pbuf.c><pbuf.c>
+File 8,1,<..\..\components\net\lwip\src\core\raw.c><raw.c>
+File 8,1,<..\..\components\net\lwip\src\core\stats.c><stats.c>
+File 8,1,<..\..\components\net\lwip\src\core\sys.c><sys.c>
+File 8,1,<..\..\components\net\lwip\src\core\tcp.c><tcp.c>
+File 8,1,<..\..\components\net\lwip\src\core\tcp_in.c><tcp_in.c>
+File 8,1,<..\..\components\net\lwip\src\core\tcp_out.c><tcp_out.c>
+File 8,1,<..\..\components\net\lwip\src\core\udp.c><udp.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c><autoip.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c><icmp.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c><igmp.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\inet.c><inet.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip.c><ip.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
+File 8,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
+File 8,1,<..\..\components\net\lwip\src\netif\etharp.c><etharp.c>
+File 8,1,<..\..\components\net\lwip\src\netif\ethernetif.c><ethernetif.c>
+File 8,1,<..\..\components\net\lwip\src\netif\loopif.c><loopif.c>
+File 8,1,<..\..\components\net\lwip\src\netif\slipif.c><slipif.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c><asn1_dec.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c><asn1_enc.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\mib2.c><mib2.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c><mib_structs.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
+File 8,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
Options 1,0,0 // Target 'RT-Thread-lm3s'
@@ -154,7 +146,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
- OutDir (.\objs\)
+ OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
@@ -176,7 +168,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
- ADSTFLGA { 0,12,0,0,160,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ADSTFLGA { 0,12,0,0,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,0,0,0,4,0 }
@@ -187,7 +179,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
- ADSCINCD (Libraries\inc;..\..\include;..\..\libcpu\arm\lm3s;..\..\components\net\lwip\src\include;Libraries\driverlib;.;..\..\components\net\lwip\src\include\ipv4;..\..\components\dfs;Libraries;..\..\components\net\lwip\src\arch\include;..\..\components\dfs\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
+ ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\components\net\lwip\src\include;drivers;..\..\components\dfs;.;Libraries;applications;..\..\components\net\lwip\src\arch\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif;..\..\components\dfs\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
diff --git a/bsp/lm3s8962/rtconfig.py b/bsp/lm3s8962/rtconfig.py index 1fdb67c4bb..caef9a28a4 100644 --- a/bsp/lm3s8962/rtconfig.py +++ b/bsp/lm3s8962/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options
ARCH='arm'
-CPU='lm3s'
+CPU='cortex-m3'
CROSS_TOOL = 'keil'
if CROSS_TOOL == 'gcc':
diff --git a/bsp/lm3s8962/template.Uv2 b/bsp/lm3s8962/template.Uv2 index a46bbe6f4c..c33acd19fb 100644 --- a/bsp/lm3s8962/template.Uv2 +++ b/bsp/lm3s8962/template.Uv2 @@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
- OutDir (.\objs\)
+ OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
- LstDir (.\objs\)
+ LstDir (.\build\)
HexSel=1
MG32K=0
TGMORE=0
diff --git a/bsp/lm3s9b9x/Libraries/SConscript b/bsp/lm3s9b9x/Libraries/SConscript index ac6ad70115..27ff3b7105 100644 --- a/bsp/lm3s9b9x/Libraries/SConscript +++ b/bsp/lm3s9b9x/Libraries/SConscript @@ -3,34 +3,19 @@ Import('rtconfig') from building import *
# The set of source files associated with this SConscript file.
-src = Split("""
- driverlib/adc.c
- driverlib/can.c
- driverlib/comp.c
- driverlib/cpu.c
- driverlib/epi.c
- driverlib/ethernet.c
- driverlib/flash.c
- driverlib/gpio.c
- driverlib/hibernate.c
- driverlib/i2c.c
- driverlib/i2s.c
- driverlib/interrupt.c
- driverlib/mpu.c
- driverlib/pwm.c
- driverlib/qei.c
- driverlib/ssi.c
- driverlib/sysctl.c
- driverlib/systick.c
- driverlib/timer.c
- driverlib/uart.c
- driverlib/udma.c
- driverlib/usb.c
- driverlib/watchdog.c
-""")
+cwd = GetCurrentDir()
+src = Glob('driverlib/*.c')
-CPPPATH = [RTT_ROOT + '/bsp/lm3s9b9x/Libraries/inc', RTT_ROOT + '/bsp/lm3s9b9x/Libraries', RTT_ROOT + '/bsp/lm3s9b9x/Libraries/driverlib']
+# add for startup script
+if rtconfig.CROSS_TOOL == 'gcc':
+ src += ['startup/gcc/start_gcc.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+ src += ['startup/arm/start_rvds.S']
+elif rtconfig.CROSS_TOOL == 'iar':
+ src += ['startup/iar/start_iar.S']
-group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH)
+CPPPATH = [cwd]
+
+group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
diff --git a/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S b/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S new file mode 100644 index 0000000000..cf564930bc --- /dev/null +++ b/bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S @@ -0,0 +1,253 @@ +; <<< Use Configuration Wizard in Context Menu >>>
+;******************************************************************************
+;
+; Startup.s - Startup code for Stellaris.
+;
+; Copyright (c) 2006-2008 Luminary Micro, Inc. All rights reserved.
+;
+; Software License Agreement
+;
+; Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+; exclusively on LMI's microcontroller products.
+;
+; The software is owned by LMI and/or its suppliers, and is protected under
+; applicable copyright laws. All rights are reserved. You may not combine
+; this software with "viral" open-source software in order to form a larger
+; program. Any use in violation of the foregoing restrictions may subject
+; the user to criminal sanctions under applicable laws, as well as to civil
+; liability for the breach of the terms and conditions of this license.
+;
+; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+;
+; This is part of revision 2523 of the Stellaris Peripheral Driver Library.
+;
+;******************************************************************************
+
+;******************************************************************************
+;
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Stack EQU 0x00000100
+
+;******************************************************************************
+;
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+;******************************************************************************
+Heap EQU 0x00000000
+
+;******************************************************************************
+;
+; Allocate space for the stack.
+;
+;******************************************************************************
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+StackMem
+ SPACE Stack
+__initial_sp
+
+;******************************************************************************
+;
+; Allocate space for the heap.
+;
+;******************************************************************************
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+HeapMem
+ SPACE Heap
+__heap_limit
+
+ IMPORT PendSV_Handler
+ IMPORT rt_hw_timer_handler
+ IMPORT rt_hw_uart_isr_1
+ IMPORT rt_hw_eth_handler
+ IMPORT HardFault_Handler
+
+;******************************************************************************
+;
+; Indicate that the code in this file preserves 8-byte alignment of the stack.
+;
+;******************************************************************************
+ PRESERVE8
+
+;******************************************************************************
+;
+; Place code into the reset code section.
+;
+;******************************************************************************
+ AREA RESET, CODE, READONLY
+ THUMB
+
+;******************************************************************************
+;
+; The vector table.
+;
+;******************************************************************************
+ EXPORT __Vectors
+__Vectors
+ DCD StackMem + Stack ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NmiSR ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD IntDefaultHandler ; MPU Fault Handler
+ DCD IntDefaultHandler ; Bus Fault Handler
+ DCD IntDefaultHandler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD IntDefaultHandler ; SVCall Handler
+ DCD IntDefaultHandler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD rt_hw_timer_handler ; SysTick Handler
+ DCD IntDefaultHandler ; GPIO Port A
+ DCD IntDefaultHandler ; GPIO Port B
+ DCD IntDefaultHandler ; GPIO Port C
+ DCD IntDefaultHandler ; GPIO Port D
+ DCD IntDefaultHandler ; GPIO Port E
+ DCD rt_hw_uart_isr_1 ; UART0
+ DCD IntDefaultHandler ; UART1
+ DCD IntDefaultHandler ; SSI
+ DCD IntDefaultHandler ; I2C
+ DCD IntDefaultHandler ; PWM Fault
+ DCD IntDefaultHandler ; PWM Generator 0
+ DCD IntDefaultHandler ; PWM Generator 1
+ DCD IntDefaultHandler ; PWM Generator 2
+ DCD IntDefaultHandler ; Quadrature Encoder
+ DCD IntDefaultHandler ; ADC Sequence 0
+ DCD IntDefaultHandler ; ADC Sequence 1
+ DCD IntDefaultHandler ; ADC Sequence 2
+ DCD IntDefaultHandler ; ADC Sequence 3
+ DCD IntDefaultHandler ; Watchdog
+ DCD IntDefaultHandler ; Timer 0A
+ DCD IntDefaultHandler ; Timer 0B
+ DCD IntDefaultHandler ; Timer 1A
+ DCD IntDefaultHandler ; Timer 1B
+ DCD IntDefaultHandler ; Timer 2A
+ DCD IntDefaultHandler ; Timer 2B
+ DCD IntDefaultHandler ; Comp 0
+ DCD IntDefaultHandler ; Comp 1
+ DCD IntDefaultHandler ; Comp 2
+ DCD IntDefaultHandler ; System Control
+ DCD 0x881 ; Flash Control
+ DCD IntDefaultHandler ; GPIO Port F
+ DCD IntDefaultHandler ; GPIO Port G
+ DCD IntDefaultHandler ; GPIO Port H
+ DCD IntDefaultHandler ; UART2 Rx and Tx
+ DCD IntDefaultHandler ; SSI1 Rx and Tx
+ DCD IntDefaultHandler ; Timer 3 subtimer A
+ DCD IntDefaultHandler ; Timer 3 subtimer B
+ DCD IntDefaultHandler ; I2C1 Master and Slave
+ DCD IntDefaultHandler ; Quadrature Encoder 1
+ DCD IntDefaultHandler ; CAN0
+ DCD IntDefaultHandler ; CAN1
+ DCD IntDefaultHandler ; CAN2
+ DCD rt_hw_eth_handler ; Ethernet
+ DCD IntDefaultHandler ; Hibernate
+ DCD IntDefaultHandler ; USB0
+ DCD IntDefaultHandler ; PWM Generator 3
+ DCD IntDefaultHandler ; uDMA Software Transfer
+ DCD IntDefaultHandler ; uDMA Error
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor first starts execution
+; following a reset event.
+;
+;******************************************************************************
+ EXPORT Reset_Handler
+Reset_Handler
+ ;
+ ; Call the C library enty point that handles startup. This will copy
+ ; the .data section initializers from flash to SRAM and zero fill the
+ ; .bss section.
+ ;
+ IMPORT __main
+ B __main
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a NMI. This
+; simply enters an infinite loop, preserving the system state for examination
+; by a debugger.
+;
+;******************************************************************************
+NmiSR
+ B NmiSR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives a fault
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+FaultISR
+ B FaultISR
+
+;******************************************************************************
+;
+; This is the code that gets called when the processor receives an unexpected
+; interrupt. This simply enters an infinite loop, preserving the system state
+; for examination by a debugger.
+;
+;******************************************************************************
+IntDefaultHandler
+ B IntDefaultHandler
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Some code in the normal code section for initializing the heap and stack.
+;
+;******************************************************************************
+ AREA |.text|, CODE, READONLY
+
+;******************************************************************************
+;
+; The function expected of the C library startup code for defining the stack
+; and heap memory locations. For the C library version of the startup code,
+; provide this function so that the C library initialization code can find out
+; the location of the stack and heap.
+;
+;******************************************************************************
+ IF :DEF: __MICROLIB
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+ ELSE
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+ LDR R0, =HeapMem
+ LDR R1, =(StackMem + Stack)
+ LDR R2, =(HeapMem + Heap)
+ LDR R3, =StackMem
+ BX LR
+ ENDIF
+
+;******************************************************************************
+;
+; Make sure the end of this section is aligned.
+;
+;******************************************************************************
+ ALIGN
+
+;******************************************************************************
+;
+; Tell the assembler that we're done.
+;
+;******************************************************************************
+ END
diff --git a/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S b/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S new file mode 100644 index 0000000000..1d1b8e558d --- /dev/null +++ b/bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S @@ -0,0 +1,164 @@ +.section .bss.init
+.equ Stack_Size, 0x00000200
+.space Stack_Size
+Initial_spTop:
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+/* restore original stack pointer */
+ LDR r0, =Initial_spTop
+ MSR msp, r0
+/* Copy the data segment initializers from flash to SRAM */
+ movs r1, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r3, =_sidata
+ ldr r3, [r3, r1]
+ str r3, [r0, r1]
+ adds r1, r1, #4
+
+LoopCopyDataInit:
+ ldr r0, =_sdata
+ ldr r3, =_edata
+ adds r2, r0, r1
+ cmp r2, r3
+ bcc CopyDataInit
+ ldr r2, =_sbss
+ b LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+ movs r3, #0
+ str r3, [r2], #4
+
+LoopFillZerobss:
+ ldr r3, = _ebss
+ cmp r2, r3
+ bcc FillZerobss
+/* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word Initial_spTop
+ .word Reset_Handler
+ .word Default_Handler //NMI_Handler
+ .word rt_hw_hard_fault
+ .word Default_Handler //MemManage_Handler
+ .word Default_Handler //BusFault_Handler
+ .word Default_Handler //UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word Default_Handler //SVC_Handler
+ .word Default_Handler //DebugMon_Handler
+ .word 0
+ .word rt_hw_pend_sv
+ .word rt_hw_timer_handler
+ .word Default_Handler // GPIO Port A
+ .word Default_Handler // GPIO Port B
+ .word Default_Handler // GPIO Port C
+ .word Default_Handler // GPIO Port D
+ .word Default_Handler // GPIO Port E
+ .word rt_hw_uart_isr_1 // UART0 Rx and Tx
+ .word Default_Handler // UART1 Rx and Tx
+ .word Default_Handler // SSI Rx and Tx
+ .word Default_Handler // I2C Master and Slave
+ .word Default_Handler // PWM Fault
+ .word Default_Handler // PWM Generator 0
+ .word Default_Handler // PWM Generator 1
+ .word Default_Handler // PWM Generator 2
+ .word Default_Handler // Quadrature Encoder
+ .word Default_Handler // ADC Sequence 0
+ .word Default_Handler // ADC Sequence 1
+ .word Default_Handler // ADC Sequence 2
+ .word Default_Handler // ADC Sequence 3
+ .word Default_Handler // Watchdog timer
+ .word Default_Handler // Timer 0 subtimer A
+ .word Default_Handler // Timer 0 subtimer B
+ .word Default_Handler // Timer 1 subtimer A
+ .word Default_Handler // Timer 1 subtimer B
+ .word Default_Handler // Timer 2 subtimer A
+ .word Default_Handler // Timer 2 subtimer B
+ .word Default_Handler // Analog Comparator 0
+ .word Default_Handler // Analog Comparator 1
+ .word Default_Handler // Analog Comparator 2
+ .word Default_Handler // System Control (PLL, OSC,
+ .word Default_Handler // FLASH Control
+ .word Default_Handler // GPIO Port F
+ .word Default_Handler // GPIO Port G
+ .word Default_Handler // GPIO Port H
+ .word Default_Handler // UART2 Rx and Tx
+ .word Default_Handler // SSI1 Rx and Tx
+ .word Default_Handler // Timer 3 subtimer A
+ .word Default_Handler // Timer 3 subtimer B
+ .word Default_Handler // I2C1 Master and Slave
+ .word Default_Handler // Quadrature Encoder 1
+ .word Default_Handler // CAN0
+ .word Default_Handler // CAN1
+ .word Default_Handler // CAN2
+ .word luminaryif_isr // Ethernet
+ .word Default_Handler // Hibernate
+ .word Default_Handler // USB0
+ .word Default_Handler // PWM Generator 3
+ .word Default_Handler // uDMA Software Transfer
+ .word Default_Handler // uDMA Error
diff --git a/bsp/lm3s9b9x/SConscript b/bsp/lm3s9b9x/SConscript index c5d7d76b02..a425264923 100644 --- a/bsp/lm3s9b9x/SConscript +++ b/bsp/lm3s9b9x/SConscript @@ -1,19 +1,14 @@ -import rtconfig
+# for module compiling
+import os
Import('RTT_ROOT')
-from building import *
-src_bsp = ['application.c', 'startup.c', 'sdram.c', 'board.c']
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
-src_drv = []
-if GetDepend('RT_USING_DFS'):
- src_drv += ['sdcard.c']
+for d in list:
+ path = os.path.join(cwd, d)
+ if os.path.isfile(os.path.join(path, 'SConscript')):
+ objs = objs + SConscript(os.path.join(d, 'SConscript'))
-if GetDepend('RT_USING_LWIP'):
-
- src_drv += ['luminaryif.c']
-
-src = File(src_bsp + src_drv)
-CPPPATH = [GetCurrentDir()]
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+Return('objs')
diff --git a/bsp/lm3s9b9x/SConstruct b/bsp/lm3s9b9x/SConstruct index 19c806f8ec..5439cdbb57 100644 --- a/bsp/lm3s9b9x/SConstruct +++ b/bsp/lm3s9b9x/SConstruct @@ -19,10 +19,9 @@ Export('RTT_ROOT') Export('rtconfig')
# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
-
-objs = objs + SConscript(('bsp/lm3s9b9x/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0)
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+# build program
env.Program(TARGET, objs)
# end building
diff --git a/bsp/lm3s9b9x/applications/SConscript b/bsp/lm3s9b9x/applications/SConscript new file mode 100644 index 0000000000..591734409c --- /dev/null +++ b/bsp/lm3s9b9x/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = os.path.join(str(Dir('#')), 'applications')
+src = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/lm3s9b9x/application.c b/bsp/lm3s9b9x/applications/application.c index fded03279f..fded03279f 100644 --- a/bsp/lm3s9b9x/application.c +++ b/bsp/lm3s9b9x/applications/application.c diff --git a/bsp/lm3s9b9x/startup.c b/bsp/lm3s9b9x/applications/startup.c index 942ac439aa..942ac439aa 100644 --- a/bsp/lm3s9b9x/startup.c +++ b/bsp/lm3s9b9x/applications/startup.c diff --git a/bsp/lm3s9b9x/drivers/SConscript b/bsp/lm3s9b9x/drivers/SConscript new file mode 100644 index 0000000000..36ce397c33 --- /dev/null +++ b/bsp/lm3s9b9x/drivers/SConscript @@ -0,0 +1,21 @@ +Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+import copy
+
+cwd = os.path.join(str(Dir('#')), 'drivers')
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+# remove no need file.
+if GetDepend('RT_USING_LWIP') == False:
+ src_need_remove = ['luminaryif.c'] # need remove file list.
+ SrcRemove(src, src_need_remove)
+
+if GetDepend('RT_USING_DFS') == False:
+ src_need_remove = ['sdcard.c'] # need remove file list.
+ SrcRemove(src, src_need_remove)
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/lm3s9b9x/board.c b/bsp/lm3s9b9x/drivers/board.c index 1b6ee22678..1b6ee22678 100644 --- a/bsp/lm3s9b9x/board.c +++ b/bsp/lm3s9b9x/drivers/board.c diff --git a/bsp/lm3s9b9x/board.h b/bsp/lm3s9b9x/drivers/board.h index 862b889e6c..6d50535c3f 100644 --- a/bsp/lm3s9b9x/board.h +++ b/bsp/lm3s9b9x/drivers/board.h @@ -20,7 +20,7 @@ /* whether use board external SRAM memory */
// <e>Use external SRAM memory on the board
// <i>Enable External SRAM memory
-#define LM3S_EXT_SRAM 0
+#define LM3S_EXT_SRAM 1
// <o>Begin Address of External SRAM
// <i>Default: 0x60000000
#define LM3S_EXT_SRAM_BEGIN 0x60000000 /* the begining address of external SRAM */
@@ -34,8 +34,8 @@ #define LM3S_SRAM_SIZE 96 #define LM3S_SRAM_END (0x20000000 + LM3S_SRAM_SIZE * 1024) -// For lm3s8962, it should be SYSCTL_XTAL_8MHZ -#define LM3S_XTAL_TYPE SYSCTL_XTAL_8MHZ +// For lm3s9b9x, it should be SYSCTL_XTAL_16MHZ +#define LM3S_XTAL_TYPE SYSCTL_XTAL_168MHZ void rt_hw_board_led_on(int n); void rt_hw_board_led_off(int n); diff --git a/bsp/lm3s9b9x/luminaryif.c b/bsp/lm3s9b9x/drivers/luminaryif.c index 0e20c6dd50..0e20c6dd50 100644 --- a/bsp/lm3s9b9x/luminaryif.c +++ b/bsp/lm3s9b9x/drivers/luminaryif.c diff --git a/bsp/lm3s9b9x/luminaryif.h b/bsp/lm3s9b9x/drivers/luminaryif.h index e987daea5e..e987daea5e 100644 --- a/bsp/lm3s9b9x/luminaryif.h +++ b/bsp/lm3s9b9x/drivers/luminaryif.h diff --git a/bsp/lm3s9b9x/sdcard.c b/bsp/lm3s9b9x/drivers/sdcard.c index 785f2eaf3e..785f2eaf3e 100644 --- a/bsp/lm3s9b9x/sdcard.c +++ b/bsp/lm3s9b9x/drivers/sdcard.c diff --git a/bsp/lm3s9b9x/sdram.c b/bsp/lm3s9b9x/drivers/sdram.c index 62798659a9..62798659a9 100644 --- a/bsp/lm3s9b9x/sdram.c +++ b/bsp/lm3s9b9x/drivers/sdram.c diff --git a/bsp/lm3s9b9x/drivers/serial.c b/bsp/lm3s9b9x/drivers/serial.c new file mode 100644 index 0000000000..8572814925 --- /dev/null +++ b/bsp/lm3s9b9x/drivers/serial.c @@ -0,0 +1,362 @@ +/* + * File : serial.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://openlab.rt-thread.com/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-06-11 Bernard first version + */ + +#include <rthw.h> +#include <rtthread.h> + +#include <inc/hw_types.h> +#include <inc/hw_memmap.h> +#include <inc/hw_uart.h> +#include <inc/hw_ints.h> +#include <driverlib/gpio.h> +#include <driverlib/sysctl.h> +#include <driverlib/interrupt.h> + +#include <driverlib/uart.h> +#include "board.h" + +extern void rt_hw_interrupt_thread_switch(void); + +#define RT_UART_RX_BUFFER_SIZE 64 + +/* LM3S serial device */ +struct rt_lm3s_serial +{ + /* inherit from device */ + struct rt_device parent; + + rt_uint32_t hw_base; + rt_uint32_t baudrate; + + /* reception field */ + rt_uint16_t save_index, read_index; + rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; +}; + +#ifdef RT_USING_UART1 +struct rt_lm3s_serial serial1; +#endif +#ifdef RT_USING_UART2 +struct rt_lm3s_serial serial2; +#endif + +void rt_hw_serial_init(void); + +void rt_hw_uart_isr(struct rt_lm3s_serial* serial) +{ + rt_device_t device; + rt_uint32_t status; + + device = (struct rt_device*)serial; + status = UARTIntStatus(serial->hw_base, true); + + /* clear interrupt status */ + UARTIntClear(serial->hw_base, status); + + if (device->flag & RT_DEVICE_FLAG_INT_RX) + { + char ch; + rt_base_t level; + + while (UARTCharsAvail(serial->hw_base)) + { + ch = UARTCharGetNonBlocking(serial->hw_base); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + /* read character */ + serial->rx_buffer[serial->save_index] = ch; + serial->save_index ++; + if (serial->save_index >= RT_UART_RX_BUFFER_SIZE) + serial->save_index = 0; + + /* if the next position is read index, discard this 'read char' */ + if (serial->save_index == serial->read_index) + { + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + } + + /* invoke callback */ + if(device->rx_indicate != RT_NULL) + { + rt_int32_t length; + + length = serial->save_index - serial->read_index; + if (length < 0) length += RT_UART_RX_BUFFER_SIZE; + device->rx_indicate(device, length); + } + } +} + +#ifdef RT_USING_UART1 +void rt_hw_uart_isr_1(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +#ifdef RT_USING_UART2 +void rt_hw_uart_isr_2(int irqno) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* get serial device */ + rt_hw_uart_isr(&serial2); + + /* leave interrupt */ + rt_interrupt_leave(); + rt_hw_interrupt_thread_switch(); +} +#endif + +/** + * @addtogroup LM3S + */ +/*@{*/ + +static rt_err_t rt_serial_init (rt_device_t dev) +{ + return RT_EOK; +} + +static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* enable interrupt */ + if (serial->hw_base == UART0_BASE) + IntEnable(INT_UART0); + else if (serial->hw_base == UART1_BASE) + IntEnable(INT_UART1); + + UARTIntEnable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_close(rt_device_t dev) +{ + struct rt_lm3s_serial* serial; + serial = (struct rt_lm3s_serial*) dev; + + RT_ASSERT(serial != RT_NULL); + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* disable UART rx interrupt */ + UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); + } + + return RT_EOK; +} + +static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t* ptr; + struct rt_lm3s_serial *serial = (struct rt_lm3s_serial*)dev; + RT_ASSERT(serial != RT_NULL); + + /* point to buffer */ + ptr = (rt_uint8_t*) buffer; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + while (size) + { + /* interrupt receive */ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (serial->read_index != serial->save_index) + { + *ptr = serial->rx_buffer[serial->read_index]; + + serial->read_index ++; + if (serial->read_index >= RT_UART_RX_BUFFER_SIZE) + serial->read_index = 0; + } + else + { + /* no data in rx buffer */ + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + ptr ++; size --; + } + + return (rt_uint32_t)ptr - (rt_uint32_t)buffer; + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_RX) + { + /* not support right now */ + RT_ASSERT(0); + } + + /* polling mode */ + while (size) + { + *ptr = UARTCharGetNonBlocking(serial->hw_base); + + ptr ++; size --; + } + + return (rt_size_t)ptr - (rt_size_t)buffer; +} + +static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + struct rt_lm3s_serial* serial; + char *ptr; + + serial = (struct rt_lm3s_serial*) dev; + if (dev->flag & RT_DEVICE_FLAG_INT_TX) + { + /* not support */ + RT_ASSERT(0); + } + else if (dev->flag & RT_DEVICE_FLAG_DMA_TX) + { + /* not support */ + RT_ASSERT(0); + } + + /* polling write */ + ptr = (char *)buffer; + + if (dev->flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + while (UARTCharPutNonBlocking(serial->hw_base, '\r') == false); + + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + else + { + while (size) + { + while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false); + + ptr ++; + size --; + } + } + + return (rt_size_t) ptr - (rt_size_t) buffer; +} + +void rt_hw_serial_init(void) +{ + struct rt_lm3s_serial* serial; + +#ifdef RT_USING_UART1 + serial = &serial1; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = UART0_BASE; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + /* enable UART0 clock */ + SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); + + /* set UART0 pinmux */ + GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); + + /* Configure the UART for 115,200, 8-N-1 operation. */ + UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial->baudrate, + (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE)); + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif + +#ifdef RT_USING_UART2 + serial = &serial2; + + serial->parent.type = RT_Device_Class_Char; + + serial->hw_base = 0xE0010000; + serial->baudrate = 115200; + + rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer)); + serial->read_index = serial->save_index = 0; + + serial->parent.init = rt_serial_init; + serial->parent.open = rt_serial_open; + serial->parent.close = rt_serial_close; + serial->parent.read = rt_serial_read; + serial->parent.write = rt_serial_write; + serial->parent.control = rt_serial_control; + serial->parent.user_data = RT_NULL; + + rt_device_register(&serial->parent, + "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +#endif +} + +/*@}*/ diff --git a/bsp/lm3s9b9x/project.Uv2 b/bsp/lm3s9b9x/project.Uv2 index ff5c69bc01..874832b584 100644 --- a/bsp/lm3s9b9x/project.Uv2 +++ b/bsp/lm3s9b9x/project.Uv2 @@ -3,121 +3,115 @@ Target (RT-Thread-lm3s), 0x0004 // Tools: 'ARM-ADS'
-Group (Startup)
+Group (Applications)
+Group (Drivers)
+Group (Libraries)
Group (Kernel)
-Group (LM3S)
+Group (CORTEX-M3)
Group (finsh)
Group (LwIP)
-Group (library)
-File 1,1,<.\application.c><application.c>
-File 1,1,<.\startup.c><startup.c>
-File 1,1,<.\board.c><board.c>
-File 1,1,<.\sdram.c><sdram.c>
-File 1,1,<.\luminaryif.c><luminaryif.c>
-File 2,1,<..\..\src\clock.c><clock.c>
-File 2,1,<..\..\src\device.c><device.c>
-File 2,1,<..\..\src\idle.c><idle.c>
-File 2,1,<..\..\src\ipc.c><ipc.c>
-File 2,1,<..\..\src\irq.c><irq.c>
-File 2,1,<..\..\src\kservice.c><kservice.c>
-File 2,1,<..\..\src\mem.c><mem.c>
-File 2,1,<..\..\src\mempool.c><mempool.c>
-File 2,1,<..\..\src\module.c><module.c>
-File 2,1,<..\..\src\object.c><object.c>
-File 2,1,<..\..\src\rtm.c><rtm.c>
-File 2,1,<..\..\src\scheduler.c><scheduler.c>
-File 2,1,<..\..\src\slab.c><slab.c>
-File 2,1,<..\..\src\thread.c><thread.c>
-File 2,1,<..\..\src\timer.c><timer.c>
-File 3,1,<..\..\libcpu\arm\lm3s\cpu.c><cpu.c>
-File 3,1,<..\..\libcpu\arm\lm3s\fault.c><fault.c>
-File 3,1,<..\..\libcpu\arm\lm3s\interrupt.c><interrupt.c>
-File 3,1,<..\..\libcpu\arm\lm3s\serial.c><serial.c>
-File 3,1,<..\..\libcpu\arm\lm3s\stack.c><stack.c>
-File 3,2,<..\..\libcpu\arm\lm3s\context_rvds.S><context_rvds.S>
-File 3,2,<..\..\libcpu\arm\lm3s\fault_rvds.S><fault_rvds.S>
-File 3,2,<..\..\libcpu\arm\lm3s\start_rvds.S><start_rvds.S>
-File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
-File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
-File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
-File 4,1,<..\..\components\finsh\cmd.c><cmd.c>
-File 4,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
-File 4,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
-File 4,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
-File 4,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
-File 4,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
-File 4,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
-File 4,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
-File 4,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
-File 4,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
-File 4,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
-File 4,1,<..\..\components\finsh\shell.c><shell.c>
-File 4,1,<..\..\components\finsh\symbol.c><symbol.c>
-File 5,1,<..\..\components\net\lwip\src\api\api_lib.c><api_lib.c>
-File 5,1,<..\..\components\net\lwip\src\api\api_msg.c><api_msg.c>
-File 5,1,<..\..\components\net\lwip\src\api\err.c><err.c>
-File 5,1,<..\..\components\net\lwip\src\api\netbuf.c><netbuf.c>
-File 5,1,<..\..\components\net\lwip\src\api\netdb.c><netdb.c>
-File 5,1,<..\..\components\net\lwip\src\api\netifapi.c><netifapi.c>
-File 5,1,<..\..\components\net\lwip\src\api\sockets.c><sockets.c>
-File 5,1,<..\..\components\net\lwip\src\api\tcpip.c><tcpip.c>
-File 5,1,<..\..\components\net\lwip\src\arch\sys_arch.c><sys_arch.c>
-File 5,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
-File 5,1,<..\..\components\net\lwip\src\core\dhcp.c><dhcp.c>
-File 5,1,<..\..\components\net\lwip\src\core\dns.c><dns.c>
-File 5,1,<..\..\components\net\lwip\src\core\init.c><init.c>
-File 5,1,<..\..\components\net\lwip\src\core\memp.c><memp.c>
-File 5,1,<..\..\components\net\lwip\src\core\netif.c><netif.c>
-File 5,1,<..\..\components\net\lwip\src\core\pbuf.c><pbuf.c>
-File 5,1,<..\..\components\net\lwip\src\core\raw.c><raw.c>
-File 5,1,<..\..\components\net\lwip\src\core\stats.c><stats.c>
-File 5,1,<..\..\components\net\lwip\src\core\sys.c><sys.c>
-File 5,1,<..\..\components\net\lwip\src\core\tcp.c><tcp.c>
-File 5,1,<..\..\components\net\lwip\src\core\tcp_in.c><tcp_in.c>
-File 5,1,<..\..\components\net\lwip\src\core\tcp_out.c><tcp_out.c>
-File 5,1,<..\..\components\net\lwip\src\core\udp.c><udp.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c><autoip.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c><icmp.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c><igmp.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet.c><inet.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip.c><ip.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
-File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
-File 5,1,<..\..\components\net\lwip\src\netif\etharp.c><etharp.c>
-File 5,1,<..\..\components\net\lwip\src\netif\ethernetif.c><ethernetif.c>
-File 5,1,<..\..\components\net\lwip\src\netif\loopif.c><loopif.c>
-File 5,1,<..\..\components\net\lwip\src\netif\slipif.c><slipif.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c><asn1_dec.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c><asn1_enc.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\mib2.c><mib2.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c><mib_structs.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
-File 5,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
-File 6,1,<Libraries\driverlib\adc.c><adc.c>
-File 6,1,<Libraries\driverlib\can.c><can.c>
-File 6,1,<Libraries\driverlib\comp.c><comp.c>
-File 6,1,<Libraries\driverlib\cpu.c><driverlib_cpu.c>
-File 6,1,<Libraries\driverlib\epi.c><epi.c>
-File 6,1,<Libraries\driverlib\ethernet.c><ethernet.c>
-File 6,1,<Libraries\driverlib\flash.c><flash.c>
-File 6,1,<Libraries\driverlib\gpio.c><gpio.c>
-File 6,1,<Libraries\driverlib\hibernate.c><hibernate.c>
-File 6,1,<Libraries\driverlib\i2c.c><i2c.c>
-File 6,1,<Libraries\driverlib\i2s.c><i2s.c>
-File 6,1,<Libraries\driverlib\interrupt.c><driverlib_interrupt.c>
-File 6,1,<Libraries\driverlib\mpu.c><mpu.c>
-File 6,1,<Libraries\driverlib\pwm.c><pwm.c>
-File 6,1,<Libraries\driverlib\qei.c><qei.c>
-File 6,1,<Libraries\driverlib\ssi.c><ssi.c>
-File 6,1,<Libraries\driverlib\sysctl.c><sysctl.c>
-File 6,1,<Libraries\driverlib\systick.c><systick.c>
-File 6,1,<Libraries\driverlib\timer.c><driverlib_timer.c>
-File 6,1,<Libraries\driverlib\uart.c><uart.c>
-File 6,1,<Libraries\driverlib\udma.c><udma.c>
-File 6,1,<Libraries\driverlib\usb.c><usb.c>
-File 6,1,<Libraries\driverlib\watchdog.c><watchdog.c>
+File 1,1,<applications\application.c><application.c>
+File 1,1,<applications\startup.c><startup.c>
+File 2,1,<drivers\board.c><board.c>
+File 2,1,<drivers\luminaryif.c><luminaryif.c>
+File 2,1,<drivers\sdram.c><sdram.c>
+File 2,1,<drivers\serial.c><serial.c>
+File 3,1,<Libraries\driverlib\adc.c><adc.c>
+File 3,1,<Libraries\driverlib\can.c><can.c>
+File 3,1,<Libraries\driverlib\comp.c><comp.c>
+File 3,1,<Libraries\driverlib\cpu.c><cpu.c>
+File 3,1,<Libraries\driverlib\epi.c><epi.c>
+File 3,1,<Libraries\driverlib\ethernet.c><ethernet.c>
+File 3,1,<Libraries\driverlib\flash.c><flash.c>
+File 3,1,<Libraries\driverlib\gpio.c><gpio.c>
+File 3,1,<Libraries\driverlib\hibernate.c><hibernate.c>
+File 3,1,<Libraries\driverlib\i2c.c><i2c.c>
+File 3,1,<Libraries\driverlib\i2s.c><i2s.c>
+File 3,1,<Libraries\driverlib\interrupt.c><interrupt.c>
+File 3,1,<Libraries\driverlib\mpu.c><mpu.c>
+File 3,1,<Libraries\driverlib\pwm.c><pwm.c>
+File 3,1,<Libraries\driverlib\qei.c><qei.c>
+File 3,1,<Libraries\driverlib\ssi.c><ssi.c>
+File 3,1,<Libraries\driverlib\sysctl.c><sysctl.c>
+File 3,1,<Libraries\driverlib\systick.c><systick.c>
+File 3,1,<Libraries\driverlib\timer.c><timer.c>
+File 3,1,<Libraries\driverlib\uart.c><uart.c>
+File 3,1,<Libraries\driverlib\udma.c><udma.c>
+File 3,1,<Libraries\driverlib\usb.c><usb.c>
+File 3,1,<Libraries\driverlib\watchdog.c><watchdog.c>
+File 3,2,<Libraries\startup\arm\start_rvds.S><start_rvds.S>
+File 4,1,<..\..\src\clock.c><clock.c>
+File 4,1,<..\..\src\device.c><device.c>
+File 4,1,<..\..\src\idle.c><idle.c>
+File 4,1,<..\..\src\ipc.c><ipc.c>
+File 4,1,<..\..\src\irq.c><irq.c>
+File 4,1,<..\..\src\kservice.c><kservice.c>
+File 4,1,<..\..\src\mem.c><mem.c>
+File 4,1,<..\..\src\mempool.c><mempool.c>
+File 4,1,<..\..\src\object.c><object.c>
+File 4,1,<..\..\src\scheduler.c><scheduler.c>
+File 4,1,<..\..\src\thread.c><thread.c>
+File 4,1,<..\..\src\timer.c><src_timer.c>
+File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
+File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
+File 5,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
+File 5,1,<..\..\libcpu\arm\common\div0.c><div0.c>
+File 5,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
+File 6,1,<..\..\components\finsh\cmd.c><cmd.c>
+File 6,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
+File 6,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
+File 6,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
+File 6,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
+File 6,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
+File 6,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
+File 6,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
+File 6,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
+File 6,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
+File 6,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
+File 6,1,<..\..\components\finsh\shell.c><shell.c>
+File 6,1,<..\..\components\finsh\symbol.c><symbol.c>
+File 7,1,<..\..\components\net\lwip\src\api\api_lib.c><api_lib.c>
+File 7,1,<..\..\components\net\lwip\src\api\api_msg.c><api_msg.c>
+File 7,1,<..\..\components\net\lwip\src\api\err.c><err.c>
+File 7,1,<..\..\components\net\lwip\src\api\netbuf.c><netbuf.c>
+File 7,1,<..\..\components\net\lwip\src\api\netdb.c><netdb.c>
+File 7,1,<..\..\components\net\lwip\src\api\netifapi.c><netifapi.c>
+File 7,1,<..\..\components\net\lwip\src\api\sockets.c><sockets.c>
+File 7,1,<..\..\components\net\lwip\src\api\tcpip.c><tcpip.c>
+File 7,1,<..\..\components\net\lwip\src\arch\sys_arch.c><sys_arch.c>
+File 7,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
+File 7,1,<..\..\components\net\lwip\src\core\dhcp.c><dhcp.c>
+File 7,1,<..\..\components\net\lwip\src\core\dns.c><dns.c>
+File 7,1,<..\..\components\net\lwip\src\core\init.c><init.c>
+File 7,1,<..\..\components\net\lwip\src\core\memp.c><memp.c>
+File 7,1,<..\..\components\net\lwip\src\core\netif.c><netif.c>
+File 7,1,<..\..\components\net\lwip\src\core\pbuf.c><pbuf.c>
+File 7,1,<..\..\components\net\lwip\src\core\raw.c><raw.c>
+File 7,1,<..\..\components\net\lwip\src\core\stats.c><stats.c>
+File 7,1,<..\..\components\net\lwip\src\core\sys.c><sys.c>
+File 7,1,<..\..\components\net\lwip\src\core\tcp.c><tcp.c>
+File 7,1,<..\..\components\net\lwip\src\core\tcp_in.c><tcp_in.c>
+File 7,1,<..\..\components\net\lwip\src\core\tcp_out.c><tcp_out.c>
+File 7,1,<..\..\components\net\lwip\src\core\udp.c><udp.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c><autoip.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c><icmp.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c><igmp.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\inet.c><inet.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip.c><ip.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
+File 7,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
+File 7,1,<..\..\components\net\lwip\src\netif\etharp.c><etharp.c>
+File 7,1,<..\..\components\net\lwip\src\netif\ethernetif.c><ethernetif.c>
+File 7,1,<..\..\components\net\lwip\src\netif\loopif.c><loopif.c>
+File 7,1,<..\..\components\net\lwip\src\netif\slipif.c><slipif.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\asn1_dec.c><asn1_dec.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\asn1_enc.c><asn1_enc.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\mib2.c><mib2.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\mib_structs.c><mib_structs.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
+File 7,1,<..\..\components\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
Options 1,0,0 // Target 'RT-Thread-lm3s'
@@ -145,7 +139,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
- OutDir (.\objs\)
+ OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
@@ -167,7 +161,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
- ADSTFLGA { 0,12,0,2,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ADSTFLGA { 0,12,0,0,163,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,128,1,0 }
OCMADSIROM { 1,0,0,0,0,0,0,4,0 }
@@ -178,7 +172,7 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
- ADSCINCD (Libraries\inc;..\..\libcpu\arm\lm3s;..\..\components\net\lwip\src\include;Libraries\driverlib;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;Libraries;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
+ ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\include;drivers;..\..\components\net\lwip\src\include;.;Libraries;applications;..\..\components\net\lwip\src\arch\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
@@ -210,20 +204,3 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' FLASH4 ()
EndOpt
-Options 1,1,1 // File 'application.c'
- PropFld { 2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
- IncBld=2
- AlwaysBuild=2
- GenAsm=2
- AsmAsm=2
- PublicsOnly=2
- StopCode=11
- CustArgs ()
- LibMods ()
- ADSCCFLG { 6,84,85,33,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
- ADSCMISC ()
- ADSCDEFN ()
- ADSCUDEF ()
- ADSCINCD ()
-EndOpt
-
diff --git a/bsp/lm3s9b9x/rtconfig.py b/bsp/lm3s9b9x/rtconfig.py index 1fdb67c4bb..caef9a28a4 100644 --- a/bsp/lm3s9b9x/rtconfig.py +++ b/bsp/lm3s9b9x/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options
ARCH='arm'
-CPU='lm3s'
+CPU='cortex-m3'
CROSS_TOOL = 'keil'
if CROSS_TOOL == 'gcc':
diff --git a/bsp/lm3s9b9x/template.Uv2 b/bsp/lm3s9b9x/template.Uv2 index 8b67ec8a52..d557f53836 100644 --- a/bsp/lm3s9b9x/template.Uv2 +++ b/bsp/lm3s9b9x/template.Uv2 @@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s' EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
- OutDir (.\objs\)
+ OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
- LstDir (.\objs\)
+ LstDir (.\build\)
HexSel=1
MG32K=0
TGMORE=0
diff --git a/bsp/lpc176x/project.Uv2 b/bsp/lpc176x/project.Uv2 index 576f998fa6..01510dfaff 100644 --- a/bsp/lpc176x/project.Uv2 +++ b/bsp/lpc176x/project.Uv2 @@ -5,7 +5,7 @@ Target (RT-Thread LPC17xx), 0x0004 // Tools: 'ARM-ADS' Group (Startup)
Group (Kernel)
-Group (LPC17XX)
+Group (CORTEX-M3)
Group (finsh)
Group (LwIP)
Group (CMSIS)
@@ -16,20 +16,20 @@ File 1,1,<.\board.c><board.c> File 1,1,<.\uart.c><uart.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\emac.c><emac.c>
+File 2,1,<..\..\src\clock.c><clock.c>
File 2,1,<..\..\src\device.c><device.c>
-File 2,1,<..\..\src\thread.c><thread.c>
-File 2,1,<..\..\src\scheduler.c><scheduler.c>
-File 2,1,<..\..\src\timer.c><timer.c>
+File 2,1,<..\..\src\idle.c><idle.c>
+File 2,1,<..\..\src\ipc.c><ipc.c>
File 2,1,<..\..\src\irq.c><irq.c>
File 2,1,<..\..\src\kservice.c><kservice.c>
-File 2,1,<..\..\src\clock.c><clock.c>
-File 2,1,<..\..\src\object.c><object.c>
-File 2,1,<..\..\src\mempool.c><mempool.c>
-File 2,1,<..\..\src\ipc.c><ipc.c>
-File 2,1,<..\..\src\idle.c><idle.c>
File 2,1,<..\..\src\mem.c><mem.c>
-File 3,1,<..\..\libcpu\arm\lpc17xx\cpuport.c><cpuport.c>
-File 3,2,<..\..\libcpu\arm\lpc17xx\context_rvds.S><context_rvds.S>
+File 2,1,<..\..\src\mempool.c><mempool.c>
+File 2,1,<..\..\src\object.c><object.c>
+File 2,1,<..\..\src\scheduler.c><scheduler.c>
+File 2,1,<..\..\src\thread.c><thread.c>
+File 2,1,<..\..\src\timer.c><timer.c>
+File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
+File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
@@ -144,7 +144,7 @@ Options 1,0,0 // Target 'RT-Thread LPC17xx' ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
- ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\libcpu\arm\lpc17xx;..\..\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
+ ADSCINCD (..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
diff --git a/bsp/lpc176x/project.ewp b/bsp/lpc176x/project.ewp index 588b9355c0..dcdc5f164f 100644 --- a/bsp/lpc176x/project.ewp +++ b/bsp/lpc176x/project.ewp @@ -10,7 +10,7 @@ <name>General</name> <archiveVersion>3</archiveVersion> <data> - <version>18</version> + <version>17</version> <wantNonLocal>1</wantNonLocal> <debug>1</debug> <option> @@ -27,8 +27,8 @@ </option> <option> <name>Variant</name> - <version>17</version> - <state>37</state> + <version>13</version> + <state>36</state> </option> <option> <name>GEndianMode</name> @@ -58,7 +58,7 @@ </option> <option> <name>FPU</name> - <version>1</version> + <version>0</version> <state>0</state> </option> <option> @@ -80,12 +80,16 @@ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state> </option> <option> + <name>RTConfigPath</name> + <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state> + </option> + <option> <name>OGProductVersion</name> - <state>6.10.1.52170</state> + <state>5.41.0.51757</state> </option> <option> <name>OGLastSavedByProductVersion</name> - <state>6.10.1.52170</state> + <state>5.41.0.51757</state> </option> <option> <name>GeneralEnableMisra</name> @@ -129,17 +133,13 @@ <version>0</version> <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state> </option> - <option> - <name>RTConfigPath2</name> - <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state> - </option> </data> </settings> <settings> <name>ICCARM</name> <archiveVersion>2</archiveVersion> <data> - <version>26</version> + <version>21</version> <wantNonLocal>1</wantNonLocal> <debug>1</debug> <option> @@ -184,7 +184,7 @@ </option> <option> <name>CCDiagSuppress</name> - <state>Pa050</state> + <state /> </option> <option> <name>CCDiagRemark</name> @@ -257,7 +257,11 @@ </option> <option> <name>OutputFile</name> - <state>$FILE_BNAME$.o</state> + <state /> + </option> + <option> + <name>CCLangSelect</name> + <state>0</state> </option> <option> <name>CCLibConfigHeader</name> @@ -274,15 +278,13 @@ <option> <name>CCIncludePath2</name> <state /> - <state>$PROJ_DIR$\..\..\components\net\lwip\src\include\ipv4</state> - <state>$PROJ_DIR$\..\..\components\dfs</state> + <state>$PROJ_DIR$\..\..\components\net\lwip\src\arch\include</state> <state>$PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx</state> <state>$PROJ_DIR$\..\..\components\net\lwip\src\include</state> <state>$PROJ_DIR$\.</state> - <state>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx</state> + <state>$PROJ_DIR$\..\..\components\net\lwip\src\include\ipv4</state> <state>$PROJ_DIR$\..\..\include</state> - <state>$PROJ_DIR$\..\..\components\net\lwip\src\arch\include</state> - <state>$PROJ_DIR$\..\..\components\dfs\include</state> + <state>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3</state> <state>$PROJ_DIR$\..\..\components\net\lwip\src</state> <state>$PROJ_DIR$\..\..\libcpu\arm\common</state> <state>$PROJ_DIR$\CMSIS\CM3\CoreSupport</state> @@ -294,6 +296,10 @@ <state>0</state> </option> <option> + <name>CCStdIncludePath</name> + <state>###Uninitialized###</state> + </option> + <option> <name>CCCodeSection</name> <state>.text</state> </option> @@ -328,61 +334,13 @@ <version>0</version> <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state> </option> - <option> - <name>CCPosIndRopi</name> - <state>0</state> - </option> - <option> - <name>CCPosIndRwpi</name> - <state>0</state> - </option> - <option> - <name>CCPosIndNoDynInit</name> - <state>0</state> - </option> - <option> - <name>IccLang</name> - <state>0</state> - </option> - <option> - <name>IccCDialect</name> - <state>1</state> - </option> - <option> - <name>IccAllowVLA</name> - <state>0</state> - </option> - <option> - <name>IccCppDialect</name> - <state>1</state> - </option> - <option> - <name>IccExceptions</name> - <state>1</state> - </option> - <option> - <name>IccRTTI</name> - <state>1</state> - </option> - <option> - <name>IccStaticDestr</name> - <state>1</state> - </option> - <option> - <name>IccRelaxedFpPrecision</name> - <state>0</state> - </option> - <option> - <name>IccCppInlineSemantics</name> - <state>1</state> - </option> </data> </settings> <settings> <name>AARM</name> <archiveVersion>2</archiveVersion> <data> - <version>8</version> + <version>7</version> <wantNonLocal>1</wantNonLocal> <debug>1</debug> <option> @@ -508,7 +466,7 @@ </option> <option> <name>AOutputFile</name> - <state>$FILE_BNAME$.o</state> + <state /> </option> <option> <name>AMultibyteSupport</name> @@ -527,8 +485,12 @@ <state>0</state> </option> <option> + <name>AStdIncludes</name> + <state>$TOOLKIT_DIR$\INC\</state> + </option> + <option> <name>AUserIncludes</name> - <state>$PROJ_DIR$\</state> + <state /> </option> <option> <name>AExtraOptionsCheckV2</name> @@ -595,7 +557,7 @@ <name>ILINK</name> <archiveVersion>0</archiveVersion> <data> - <version>11</version> + <version>8</version> <wantNonLocal>1</wantNonLocal> <debug>1</debug> <option> @@ -612,7 +574,7 @@ </option> <option> <name>IlinkOutputFile</name> - <state>rtthread.out</state> + <state>template.out</state> </option> <option> <name>IlinkDebugInfoEnable</name> @@ -648,7 +610,7 @@ </option> <option> <name>IlinkMapFile</name> - <state>1</state> + <state>0</state> </option> <option> <name>IlinkLogFile</name> @@ -672,11 +634,11 @@ </option> <option> <name>IlinkIcfOverride</name> - <state>1</state> + <state>0</state> </option> <option> <name>IlinkIcfFile</name> - <state>$PROJ_DIR$\lpc17xx_flash.icf</state> + <state>$TOOLKIT_DIR$\CONFIG\generic_cortex.icf</state> </option> <option> <name>IlinkIcfFileSlave</name> @@ -809,38 +771,6 @@ <name>IlinkIElfToolPostProcess</name> <state>0</state> </option> - <option> - <name>IlinkLogAutoLibSelect</name> - <state>0</state> - </option> - <option> - <name>IlinkLogRedirSymbols</name> - <state>0</state> - </option> - <option> - <name>IlinkLogUnusedFragments</name> - <state>0</state> - </option> - <option> - <name>IlinkCrcReverseByteOrder</name> - <state>0</state> - </option> - <option> - <name>IlinkCrcUseAsInput</name> - <state>1</state> - </option> - <option> - <name>IlinkOptInline</name> - <state>0</state> - </option> - <option> - <name>IlinkOptExceptionsAllow</name> - <state>1</state> - </option> - <option> - <name>IlinkOptExceptionsForce</name> - <state>0</state> - </option> </data> </settings> <settings> @@ -880,7 +810,7 @@ <name>General</name> <archiveVersion>3</archiveVersion> <data> - <version>18</version> + <version>17</version> <wantNonLocal>1</wantNonLocal> <debug>0</debug> <option> @@ -897,8 +827,8 @@ </option> <option> <name>Variant</name> - <version>17</version> - <state>37</state> + <version>13</version> + <state>0</state> </option> <option> <name>GEndianMode</name> @@ -911,7 +841,7 @@ </option> <option> <name>Input description</name> - <state>Full formatting.</state> + <state /> </option> <option> <name>Output variant</name> @@ -920,7 +850,7 @@ </option> <option> <name>Output description</name> - <state>Full formatting.</state> + <state /> </option> <option> <name>GOutputBinary</name> @@ -928,12 +858,12 @@ </option> <option> <name>FPU</name> - <version>1</version> + <version>0</version> <state>0</state> </option> <option> <name>OGCoreOrChip</name> - <state>1</state> + <state>0</state> </option> <option> <name>GRuntimeLibSelect</name> @@ -947,15 +877,19 @@ </option> <option> <name>RTDescription</name> - <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state> + <state /> + </option> + <option> + <name>RTConfigPath</name> + <state>dl-stnl0.a</state> </option> <option> <name>OGProductVersion</name> - <state>6.10.1.52170</state> + <state>5.41.0.51757</state> </option> <option> <name>OGLastSavedByProductVersion</name> - <state>6.10.1.52170</state> + <state /> </option> <option> <name>GeneralEnableMisra</name> @@ -967,7 +901,7 @@ </option> <option> <name>OGChipSelectEditMenu</name> - <state>LPC1768 NXP LPC1768</state> + <state /> </option> <option> <name>GenLowLevelInterface</name> @@ -975,7 +909,7 @@ </option> <option> <name>GEndianModeBE</name> - <state>1</state> + <state>0</state> </option> <option> <name>OGBufferedTerminalOutput</name> @@ -999,17 +933,13 @@ <version>0</version> <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state> </option> - <option> - <name>RTConfigPath2</name> - <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state> - </option> </data> </settings> <settings> <name>ICCARM</name> <archiveVersion>2</archiveVersion> <data> - <version>26</version> + <version>21</version> <wantNonLocal>1</wantNonLocal> <debug>0</debug> <option> @@ -1054,7 +984,7 @@ </option> <option> <name>CCDiagSuppress</name> - <state>Pa050</state> + <state /> </option> <option> <name>CCDiagRemark</name> @@ -1127,7 +1057,11 @@ </option> <option> <name>OutputFile</name> - <state>$FILE_BNAME$.o</state> + <state /> + </option> + <option> + <name>CCLangSelect</name> + <state>0</state> </option> <option> <name>CCLibConfigHeader</name> @@ -1144,15 +1078,13 @@ <option> <name>CCIncludePath2</name> <state /> - <state>$PROJ_DIR$\..\..\components\net\lwip\src\include\ipv4</state> - <state>$PROJ_DIR$\..\..\components\dfs</state> + <state>$PROJ_DIR$\..\..\components\net\lwip\src\arch\include</state> <state>$PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx</state> <state>$PROJ_DIR$\..\..\components\net\lwip\src\include</state> <state>$PROJ_DIR$\.</state> - <state>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx</state> + <state>$PROJ_DIR$\..\..\components\net\lwip\src\include\ipv4</state> <state>$PROJ_DIR$\..\..\include</state> - <state>$PROJ_DIR$\..\..\components\net\lwip\src\arch\include</state> - <state>$PROJ_DIR$\..\..\components\dfs\include</state> + <state>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3</state> <state>$PROJ_DIR$\..\..\components\net\lwip\src</state> <state>$PROJ_DIR$\..\..\libcpu\arm\common</state> <state>$PROJ_DIR$\CMSIS\CM3\CoreSupport</state> @@ -1164,6 +1096,10 @@ <state>0</state> </option> <option> + <name>CCStdIncludePath</name> + <state>###Uninitialized###</state> + </option> + <option> <name>CCCodeSection</name> <state>.text</state> </option> @@ -1186,7 +1122,7 @@ </option> <option> <name>CCOptLevelSlave</name> - <state>3</state> + <state>1</state> </option> <option> <name>CompilerMisraRules98</name> @@ -1198,61 +1134,13 @@ <version>0</version> <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state> </option> - <option> - <name>CCPosIndRopi</name> - <state>0</state> - </option> - <option> - <name>CCPosIndRwpi</name> - <state>0</state> - </option> - <option> - <name>CCPosIndNoDynInit</name> - <state>0</state> - </option> - <option> - <name>IccLang</name> - <state>0</state> - </option> - <option> - <name>IccCDialect</name> - <state>1</state> - </option> - <option> - <name>IccAllowVLA</name> - <state>0</state> - </option> - <option> - <name>IccCppDialect</name> - <state>1</state> - </option> - <option> - <name>IccExceptions</name> - <state>1</state> - </option> - <option> - <name>IccRTTI</name> - <state>1</state> - </option> - <option> - <name>IccStaticDestr</name> - <state>1</state> - </option> - <option> - <name>IccRelaxedFpPrecision</name> - <state>0</state> - </option> - <option> - <name>IccCppInlineSemantics</name> - <state>0</state> - </option> </data> </settings> <settings> <name>AARM</name> <archiveVersion>2</archiveVersion> <data> - <version>8</version> + <version>7</version> <wantNonLocal>1</wantNonLocal> <debug>0</debug> <option> @@ -1378,7 +1266,7 @@ </option> <option> <name>AOutputFile</name> - <state>$FILE_BNAME$.o</state> + <state /> </option> <option> <name>AMultibyteSupport</name> @@ -1397,6 +1285,10 @@ <state>0</state> </option> <option> + <name>AStdIncludes</name> + <state>$TOOLKIT_DIR$\INC\</state> + </option> + <option> <name>AUserIncludes</name> <state /> </option> @@ -1465,7 +1357,7 @@ <name>ILINK</name> <archiveVersion>0</archiveVersion> <data> - <version>11</version> + <version>8</version> <wantNonLocal>1</wantNonLocal> <debug>0</debug> <option> @@ -1482,7 +1374,7 @@ </option> <option> <name>IlinkOutputFile</name> - <state>rtthread.out</state> + <state>###Unitialized###</state> </option> <option> <name>IlinkDebugInfoEnable</name> @@ -1542,11 +1434,11 @@ </option> <option> <name>IlinkIcfOverride</name> - <state>1</state> + <state>0</state> </option> <option> <name>IlinkIcfFile</name> - <state>$PROJ_DIR$\lpc17xx_flash.icf</state> + <state>lnk0t.icf</state> </option> <option> <name>IlinkIcfFileSlave</name> @@ -1606,7 +1498,7 @@ </option> <option> <name>IlinkProgramEntryLabel</name> - <state>__iar_program_start</state> + <state /> </option> <option> <name>DoFill</name> @@ -1679,38 +1571,6 @@ <name>IlinkIElfToolPostProcess</name> <state>0</state> </option> - <option> - <name>IlinkLogAutoLibSelect</name> - <state>0</state> - </option> - <option> - <name>IlinkLogRedirSymbols</name> - <state>0</state> - </option> - <option> - <name>IlinkLogUnusedFragments</name> - <state>0</state> - </option> - <option> - <name>IlinkCrcReverseByteOrder</name> - <state>0</state> - </option> - <option> - <name>IlinkCrcUseAsInput</name> - <state>1</state> - </option> - <option> - <name>IlinkOptInline</name> - <state>1</state> - </option> - <option> - <name>IlinkOptExceptionsAllow</name> - <state>1</state> - </option> - <option> - <name>IlinkOptExceptionsForce</name> - <state>0</state> - </option> </data> </settings> <settings> @@ -1758,20 +1618,8 @@ <name>$PROJ_DIR$\.\led.c</name> </file> <file> - <name>$PROJ_DIR$\.\sd.c</name> - </file> - <file> - <name>$PROJ_DIR$\.\spi.c</name> - </file> - <file> <name>$PROJ_DIR$\.\emac.c</name> </file> - <file> - <name>$PROJ_DIR$\CMSIS\CM3\CoreSupport\core_cm3.c</name> - </file> - <file> - <name>$PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c</name> - </file> </group> <group> <name>Kernel</name> @@ -1800,21 +1648,12 @@ <name>$PROJ_DIR$\..\..\src\mempool.c</name> </file> <file> - <name>$PROJ_DIR$\..\..\src\module.c</name> - </file> - <file> <name>$PROJ_DIR$\..\..\src\object.c</name> </file> <file> - <name>$PROJ_DIR$\..\..\src\rtm.c</name> - </file> - <file> <name>$PROJ_DIR$\..\..\src\scheduler.c</name> </file> <file> - <name>$PROJ_DIR$\..\..\src\slab.c</name> - </file> - <file> <name>$PROJ_DIR$\..\..\src\thread.c</name> </file> <file> @@ -1822,27 +1661,12 @@ </file> </group> <group> - <name>LPC17XX</name> - <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\cpu.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\fault.c</name> - </file> + <name>CORTEX-M3</name> <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\interrupt.c</name> + <name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\cpuport.c</name> </file> <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\stack.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\context_iar.S</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\fault_iar.S</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\libcpu\arm\lpc17xx\start_iar.S</name> + <name>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3\context_iar.S</name> </file> <file> <name>$PROJ_DIR$\..\..\libcpu\arm\common\backtrace.c</name> @@ -1855,27 +1679,6 @@ </file> </group> <group> - <name>Filesystem</name> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\src\dfs.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\src\dfs_fs.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\src\dfs_file.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\src\dfs_posix.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\dfs_elm.c</name> - </file> - <file> - <name>$PROJ_DIR$\..\..\components\dfs\filesystems\elmfat\ff.c</name> - </file> - </group> - <group> <name>finsh</name> <file> <name>$PROJ_DIR$\..\..\components\finsh\cmd.c</name> @@ -2025,4 +1828,16 @@ <name>$PROJ_DIR$\..\..\components\net\lwip\src\netif\slipif.c</name> </file> </group> + <group> + <name>CMSIS</name> + <file> + <name>$PROJ_DIR$\CMSIS\CM3\CoreSupport\core_cm3.c</name> + </file> + <file> + <name>$PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c</name> + </file> + <file> + <name>$PROJ_DIR$\CMSIS\CM3\DeviceSupport\NXP\LPC17xx\startup\iar\startup_LPC17xx.s</name> + </file> + </group> </project> diff --git a/bsp/lpc176x/rtconfig.py b/bsp/lpc176x/rtconfig.py index 678522f928..11c425ff93 100644 --- a/bsp/lpc176x/rtconfig.py +++ b/bsp/lpc176x/rtconfig.py @@ -1,6 +1,6 @@ # toolchains options
ARCH='arm'
-CPU='lpc17xx'
+CPU='cortex-m3'
CROSS_TOOL='keil'
if CROSS_TOOL == 'gcc':
diff --git a/bsp/lpc176x/template.ewp b/bsp/lpc176x/template.ewp index 6c0a5e60e8..3f66c77438 100644 --- a/bsp/lpc176x/template.ewp +++ b/bsp/lpc176x/template.ewp @@ -12,7 +12,7 @@ <name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>18</version>
+ <version>17</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -29,8 +29,8 @@ </option>
<option>
<name>Variant</name>
- <version>17</version>
- <state>37</state>
+ <version>13</version>
+ <state>36</state>
</option>
<option>
<name>GEndianMode</name>
@@ -60,7 +60,7 @@ </option>
<option>
<name>FPU</name>
- <version>1</version>
+ <version>0</version>
<state>0</state>
</option>
<option>
@@ -82,12 +82,16 @@ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
</option>
<option>
+ <name>RTConfigPath</name>
+ <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
+ </option>
+ <option>
<name>OGProductVersion</name>
- <state>6.10.1.52170</state>
+ <state>5.41.0.51757</state>
</option>
<option>
<name>OGLastSavedByProductVersion</name>
- <state>6.10.1.52170</state>
+ <state>5.41.0.51757</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@@ -131,17 +135,13 @@ <version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
- <option>
- <name>RTConfigPath2</name>
- <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
- </option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
- <version>26</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -186,7 +186,7 @@ </option>
<option>
<name>CCDiagSuppress</name>
- <state>Pa050</state>
+ <state></state>
</option>
<option>
<name>CCDiagRemark</name>
@@ -259,7 +259,11 @@ </option>
<option>
<name>OutputFile</name>
- <state>$FILE_BNAME$.o</state>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
</option>
<option>
<name>CCLibConfigHeader</name>
@@ -282,6 +286,10 @@ <state>0</state>
</option>
<option>
+ <name>CCStdIncludePath</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
<name>CCCodeSection</name>
<state>.text</state>
</option>
@@ -316,61 +324,13 @@ <version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
- <option>
- <name>CCPosIndRopi</name>
- <state>0</state>
- </option>
- <option>
- <name>CCPosIndRwpi</name>
- <state>0</state>
- </option>
- <option>
- <name>CCPosIndNoDynInit</name>
- <state>0</state>
- </option>
- <option>
- <name>IccLang</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCDialect</name>
- <state>1</state>
- </option>
- <option>
- <name>IccAllowVLA</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCppDialect</name>
- <state>1</state>
- </option>
- <option>
- <name>IccExceptions</name>
- <state>1</state>
- </option>
- <option>
- <name>IccRTTI</name>
- <state>1</state>
- </option>
- <option>
- <name>IccStaticDestr</name>
- <state>1</state>
- </option>
- <option>
- <name>IccRelaxedFpPrecision</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCppInlineSemantics</name>
- <state>1</state>
- </option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
- <version>8</version>
+ <version>7</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -496,7 +456,7 @@ </option>
<option>
<name>AOutputFile</name>
- <state>$FILE_BNAME$.o</state>
+ <state></state>
</option>
<option>
<name>AMultibyteSupport</name>
@@ -515,8 +475,12 @@ <state>0</state>
</option>
<option>
+ <name>AStdIncludes</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
<name>AUserIncludes</name>
- <state>$PROJ_DIR$\</state>
+ <state></state>
</option>
<option>
<name>AExtraOptionsCheckV2</name>
@@ -583,7 +547,7 @@ <name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>11</version>
+ <version>8</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -600,7 +564,7 @@ </option>
<option>
<name>IlinkOutputFile</name>
- <state>rtthread.out</state>
+ <state>template.out</state>
</option>
<option>
<name>IlinkDebugInfoEnable</name>
@@ -636,7 +600,7 @@ </option>
<option>
<name>IlinkMapFile</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>IlinkLogFile</name>
@@ -660,11 +624,11 @@ </option>
<option>
<name>IlinkIcfOverride</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>IlinkIcfFile</name>
- <state>$PROJ_DIR$\lpc17xx_flash.icf</state>
+ <state>$TOOLKIT_DIR$\CONFIG\generic_cortex.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
@@ -797,38 +761,6 @@ <name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
- <option>
- <name>IlinkLogAutoLibSelect</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkLogRedirSymbols</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkLogUnusedFragments</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkCrcReverseByteOrder</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkCrcUseAsInput</name>
- <state>1</state>
- </option>
- <option>
- <name>IlinkOptInline</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkOptExceptionsAllow</name>
- <state>1</state>
- </option>
- <option>
- <name>IlinkOptExceptionsForce</name>
- <state>0</state>
- </option>
</data>
</settings>
<settings>
@@ -868,7 +800,7 @@ <name>General</name>
<archiveVersion>3</archiveVersion>
<data>
- <version>18</version>
+ <version>17</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@@ -885,8 +817,8 @@ </option>
<option>
<name>Variant</name>
- <version>17</version>
- <state>37</state>
+ <version>13</version>
+ <state>0</state>
</option>
<option>
<name>GEndianMode</name>
@@ -899,7 +831,7 @@ </option>
<option>
<name>Input description</name>
- <state>Full formatting.</state>
+ <state></state>
</option>
<option>
<name>Output variant</name>
@@ -908,7 +840,7 @@ </option>
<option>
<name>Output description</name>
- <state>Full formatting.</state>
+ <state></state>
</option>
<option>
<name>GOutputBinary</name>
@@ -916,12 +848,12 @@ </option>
<option>
<name>FPU</name>
- <version>1</version>
+ <version>0</version>
<state>0</state>
</option>
<option>
<name>OGCoreOrChip</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>GRuntimeLibSelect</name>
@@ -935,15 +867,19 @@ </option>
<option>
<name>RTDescription</name>
- <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ <state></state>
+ </option>
+ <option>
+ <name>RTConfigPath</name>
+ <state>dl-stnl0.a</state>
</option>
<option>
<name>OGProductVersion</name>
- <state>6.10.1.52170</state>
+ <state>5.41.0.51757</state>
</option>
<option>
<name>OGLastSavedByProductVersion</name>
- <state>6.10.1.52170</state>
+ <state></state>
</option>
<option>
<name>GeneralEnableMisra</name>
@@ -955,7 +891,7 @@ </option>
<option>
<name>OGChipSelectEditMenu</name>
- <state>LPC1768 NXP LPC1768</state>
+ <state></state>
</option>
<option>
<name>GenLowLevelInterface</name>
@@ -963,7 +899,7 @@ </option>
<option>
<name>GEndianModeBE</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>OGBufferedTerminalOutput</name>
@@ -987,17 +923,13 @@ <version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
- <option>
- <name>RTConfigPath2</name>
- <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
- </option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
- <version>26</version>
+ <version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@@ -1042,7 +974,7 @@ </option>
<option>
<name>CCDiagSuppress</name>
- <state>Pa050</state>
+ <state></state>
</option>
<option>
<name>CCDiagRemark</name>
@@ -1115,7 +1047,11 @@ </option>
<option>
<name>OutputFile</name>
- <state>$FILE_BNAME$.o</state>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
</option>
<option>
<name>CCLibConfigHeader</name>
@@ -1138,6 +1074,10 @@ <state>0</state>
</option>
<option>
+ <name>CCStdIncludePath</name>
+ <state>###Uninitialized###</state>
+ </option>
+ <option>
<name>CCCodeSection</name>
<state>.text</state>
</option>
@@ -1160,7 +1100,7 @@ </option>
<option>
<name>CCOptLevelSlave</name>
- <state>3</state>
+ <state>1</state>
</option>
<option>
<name>CompilerMisraRules98</name>
@@ -1172,61 +1112,13 @@ <version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
- <option>
- <name>CCPosIndRopi</name>
- <state>0</state>
- </option>
- <option>
- <name>CCPosIndRwpi</name>
- <state>0</state>
- </option>
- <option>
- <name>CCPosIndNoDynInit</name>
- <state>0</state>
- </option>
- <option>
- <name>IccLang</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCDialect</name>
- <state>1</state>
- </option>
- <option>
- <name>IccAllowVLA</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCppDialect</name>
- <state>1</state>
- </option>
- <option>
- <name>IccExceptions</name>
- <state>1</state>
- </option>
- <option>
- <name>IccRTTI</name>
- <state>1</state>
- </option>
- <option>
- <name>IccStaticDestr</name>
- <state>1</state>
- </option>
- <option>
- <name>IccRelaxedFpPrecision</name>
- <state>0</state>
- </option>
- <option>
- <name>IccCppInlineSemantics</name>
- <state>0</state>
- </option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
- <version>8</version>
+ <version>7</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@@ -1352,7 +1244,7 @@ </option>
<option>
<name>AOutputFile</name>
- <state>$FILE_BNAME$.o</state>
+ <state></state>
</option>
<option>
<name>AMultibyteSupport</name>
@@ -1371,6 +1263,10 @@ <state>0</state>
</option>
<option>
+ <name>AStdIncludes</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ </option>
+ <option>
<name>AUserIncludes</name>
<state></state>
</option>
@@ -1439,7 +1335,7 @@ <name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
- <version>11</version>
+ <version>8</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@@ -1456,7 +1352,7 @@ </option>
<option>
<name>IlinkOutputFile</name>
- <state>rtthread.out</state>
+ <state>###Unitialized###</state>
</option>
<option>
<name>IlinkDebugInfoEnable</name>
@@ -1516,11 +1412,11 @@ </option>
<option>
<name>IlinkIcfOverride</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>IlinkIcfFile</name>
- <state>$PROJ_DIR$\lpc17xx_flash.icf</state>
+ <state>lnk0t.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
@@ -1580,7 +1476,7 @@ </option>
<option>
<name>IlinkProgramEntryLabel</name>
- <state>__iar_program_start</state>
+ <state></state>
</option>
<option>
<name>DoFill</name>
@@ -1653,38 +1549,6 @@ <name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
- <option>
- <name>IlinkLogAutoLibSelect</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkLogRedirSymbols</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkLogUnusedFragments</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkCrcReverseByteOrder</name>
- <state>0</state>
- </option>
- <option>
- <name>IlinkCrcUseAsInput</name>
- <state>1</state>
- </option>
- <option>
- <name>IlinkOptInline</name>
- <state>1</state>
- </option>
- <option>
- <name>IlinkOptExceptionsAllow</name>
- <state>1</state>
- </option>
- <option>
- <name>IlinkOptExceptionsForce</name>
- <state>0</state>
- </option>
</data>
</settings>
<settings>
|