diff options
Diffstat (limited to 'libcpu/aarch64/common/interrupt.c')
| -rw-r--r-- | libcpu/aarch64/common/interrupt.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/libcpu/aarch64/common/interrupt.c b/libcpu/aarch64/common/interrupt.c index 570859aee6..55f6a82f31 100644 --- a/libcpu/aarch64/common/interrupt.c +++ b/libcpu/aarch64/common/interrupt.c @@ -16,10 +16,6 @@ #include "gicv3.h" #include "ioremap.h" - -/* exception and interrupt handler table */ -struct rt_irq_desc isr_table[MAX_HANDLERS]; - #ifndef RT_USING_SMP /* Those variables will be accessed in ISR, so we need to share them. */ rt_ubase_t rt_interrupt_from_thread = 0; @@ -27,6 +23,11 @@ rt_ubase_t rt_interrupt_to_thread = 0; rt_ubase_t rt_thread_switch_interrupt_flag = 0; #endif +#ifndef RT_USING_PIC + +/* exception and interrupt handler table */ +struct rt_irq_desc isr_table[MAX_HANDLERS]; + #ifndef RT_CPUS_NR #define RT_CPUS_NR 1 #endif @@ -138,17 +139,17 @@ void rt_hw_interrupt_mask(int vector) #ifdef SOC_BCM283x if (vector < 32) { - IRQ_DISABLE1 = (1 << vector); + IRQ_DISABLE1 = (1UL << vector); } else if (vector < 64) { vector = vector % 32; - IRQ_DISABLE2 = (1 << vector); + IRQ_DISABLE2 = (1UL << vector); } else { vector = vector - 64; - IRQ_DISABLE_BASIC = (1 << vector); + IRQ_DISABLE_BASIC = (1UL << vector); } #else arm_gic_mask(0, vector); @@ -164,17 +165,17 @@ void rt_hw_interrupt_umask(int vector) #ifdef SOC_BCM283x if (vector < 32) { - IRQ_ENABLE1 = (1 << vector); + IRQ_ENABLE1 = (1UL << vector); } else if (vector < 64) { vector = vector % 32; - IRQ_ENABLE2 = (1 << vector); + IRQ_ENABLE2 = (1UL << vector); } else { vector = vector - 64; - IRQ_ENABLE_BASIC = (1 << vector); + IRQ_ENABLE_BASIC = (1UL << vector); } #else arm_gic_umask(0, vector); @@ -416,6 +417,8 @@ void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler) } #endif +#endif /* RT_USING_PIC */ + #if defined(FINSH_USING_MSH) && defined(RT_USING_INTERRUPT_INFO) int list_isr() { |