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-rw-r--r--libcpu/aarch64/common/context_gcc.S39
-rw-r--r--libcpu/aarch64/common/stack.c7
-rw-r--r--libcpu/aarch64/common/vector_gcc.S2
3 files changed, 19 insertions, 29 deletions
diff --git a/libcpu/aarch64/common/context_gcc.S b/libcpu/aarch64/common/context_gcc.S
index 934db7ed84..b1a8313916 100644
--- a/libcpu/aarch64/common/context_gcc.S
+++ b/libcpu/aarch64/common/context_gcc.S
@@ -5,10 +5,11 @@
*
* Change Logs:
* Date Author Notes
- * 2018-10-06 ZhaoXiaowei the first version
+ * 2018-10-06 ZhaoXiaowei the first version
+ * 2021-11-04 GuEe-GUI set sp with SP_ELx
*/
- /*
+/*
*enable gtimer
*/
.globl rt_hw_gtimer_enable
@@ -18,6 +19,14 @@ rt_hw_gtimer_enable:
RET
/*
+ *disable gtimer
+ */
+.globl rt_hw_gtimer_disable
+rt_hw_gtimer_disable:
+ MSR CNTP_CTL_EL0,XZR
+ RET
+
+/*
*set gtimer CNTP_TVAL_EL0 value
*/
.globl rt_hw_set_gtimer_val
@@ -48,10 +57,6 @@ rt_hw_get_gtimer_frq:
RET
.macro SAVE_CONTEXT
-
- /* Switch to use the EL0 stack pointer. */
- MSR SPSEL, #0
-
/* Save the entire context. */
STP X0, X1, [SP, #-0x10]!
STP X2, X3, [SP, #-0x10]!
@@ -98,16 +103,9 @@ rt_hw_get_gtimer_frq:
MOV X0, SP /* Move SP into X0 for saving. */
- /* Switch to use the ELx stack pointer. */
- MSR SPSEL, #1
-
.endm
.macro SAVE_CONTEXT_T
-
- /* Switch to use the EL0 stack pointer. */
- MSR SPSEL, #0
-
/* Save the entire context. */
STP X0, X1, [SP, #-0x10]!
STP X2, X3, [SP, #-0x10]!
@@ -135,15 +133,15 @@ rt_hw_get_gtimer_frq:
B.EQ 1f
B .
3:
- MRS X3, SPSR_EL3
+ MOV X3, 0x0d
MOV X2, X30
B 0f
2:
- MRS X3, SPSR_EL2
+ MOV X3, 0x09
MOV X2, X30
B 0f
1:
- MRS X3, SPSR_EL1
+ MOV X3, 0x05
MOV X2, X30
B 0f
0:
@@ -152,16 +150,10 @@ rt_hw_get_gtimer_frq:
MOV X0, SP /* Move SP into X0 for saving. */
- /* Switch to use the ELx stack pointer. */
- MSR SPSEL, #1
-
.endm
.macro RESTORE_CONTEXT
- /* Switch to use the EL0 stack pointer. */
- MSR SPSEL, #0
-
/* Set the SP to point to the stack of the task being restored. */
MOV SP, X0
@@ -206,9 +198,6 @@ rt_hw_get_gtimer_frq:
LDP X2, X3, [SP], #0x10
LDP X0, X1, [SP], #0x10
- /* Switch to use the ELx stack pointer. _RB_ Might not be required. */
- MSR SPSEL, #1
-
ERET
.endm
diff --git a/libcpu/aarch64/common/stack.c b/libcpu/aarch64/common/stack.c
index 0fe00d8674..d93706fcb9 100644
--- a/libcpu/aarch64/common/stack.c
+++ b/libcpu/aarch64/common/stack.c
@@ -7,15 +7,16 @@
* Date Author Notes
* 2011-09-23 Bernard the first version
* 2011-10-05 Bernard add thumb mode
+ * 2021-11-04 GuEe-GUI set sp with SP_ELx
*/
#include <rtthread.h>
#include <board.h>
#include <armv8.h>
-#define INITIAL_SPSR_EL3 (PSTATE_EL3 | SP_EL0)
-#define INITIAL_SPSR_EL2 (PSTATE_EL2 | SP_EL0)
-#define INITIAL_SPSR_EL1 (PSTATE_EL1 | SP_EL0)
+#define INITIAL_SPSR_EL3 (PSTATE_EL3 | SP_ELx)
+#define INITIAL_SPSR_EL2 (PSTATE_EL2 | SP_ELx)
+#define INITIAL_SPSR_EL1 (PSTATE_EL1 | SP_ELx)
/**
* This function will initialize thread stack
diff --git a/libcpu/aarch64/common/vector_gcc.S b/libcpu/aarch64/common/vector_gcc.S
index fc88cce7f8..50ff41a8e3 100644
--- a/libcpu/aarch64/common/vector_gcc.S
+++ b/libcpu/aarch64/common/vector_gcc.S
@@ -18,7 +18,7 @@ system_vectors:
.align 11
.set VBAR, system_vectors
.org VBAR
- // Exception from CurrentEL (EL1) with SP_EL0 (SPSEL=1)
+ // Exception from CurrentEL (EL1) with SP_EL0 (SPSEL=0)
.org (VBAR + 0x00 + 0)
B vector_error // Synchronous
.org (VBAR + 0x80 + 0)