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-rw-r--r--libcpu/arm/lm3s/context_gcc.S166
-rw-r--r--libcpu/arm/lm3s/context_rvds.S175
-rw-r--r--libcpu/arm/lm3s/cpu.c42
-rw-r--r--libcpu/arm/lm3s/fault.c34
-rw-r--r--libcpu/arm/lm3s/fault_gcc.S31
-rw-r--r--libcpu/arm/lm3s/fault_rvds.S35
-rw-r--r--libcpu/arm/lm3s/interrupt.c21
-rw-r--r--libcpu/arm/lm3s/serial.c362
-rw-r--r--libcpu/arm/lm3s/stack.c59
-rw-r--r--libcpu/arm/lm3s/start_gcc.S164
-rw-r--r--libcpu/arm/lm3s/start_rvds.S253
-rw-r--r--libcpu/arm/lpc17xx/context_iar.S170
-rw-r--r--libcpu/arm/lpc17xx/context_rvds.S189
-rw-r--r--libcpu/arm/lpc17xx/cpuport.c98
14 files changed, 0 insertions, 1799 deletions
diff --git a/libcpu/arm/lm3s/context_gcc.S b/libcpu/arm/lm3s/context_gcc.S
deleted file mode 100644
index 0afc1cd87c..0000000000
--- a/libcpu/arm/lm3s/context_gcc.S
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * File : context_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-10-11 Bernard first version
- */
-
-/**
- * @addtogroup STM32
- */
-/*@{*/
-
-.cpu cortex-m3
-.fpu softvfp
-.syntax unified
-.thumb
-.text
-
-.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
-.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
-.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
-.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
-
-/*
- * rt_base_t rt_hw_interrupt_disable();
- */
-.global rt_hw_interrupt_disable
-.type rt_hw_interrupt_disable, %function
-rt_hw_interrupt_disable:
- MRS r0, PRIMASK
- CPSID I
- BX LR
-
-/*
- * void rt_hw_interrupt_enable(rt_base_t level);
- */
-.global rt_hw_interrupt_enable
-.type rt_hw_interrupt_enable, %function
-rt_hw_interrupt_enable:
- MSR PRIMASK, r0
- BX LR
-
-/*
- * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
- * r0 --> from
- * r1 --> to
- */
-.global rt_hw_context_switch_interrupt
-.type rt_hw_context_switch_interrupt, %function
-.global rt_hw_context_switch
-.type rt_hw_context_switch, %function
-
-rt_hw_context_switch_interrupt:
-rt_hw_context_switch:
- /* set rt_thread_switch_interrupt_flag to 1 */
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
- STR r0, [r2]
-
-_reswitch:
- LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
-
-/* r0 --> swith from thread stack
- * r1 --> swith to thread stack
- * psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
- */
-.global rt_hw_pend_sv
-.type rt_hw_pend_sv, %function
-rt_hw_pend_sv:
- /* disable interrupt to protect context switch */
- MRS r2, PRIMASK
- CPSID I
-
- /* get rt_thread_switch_interrupt_flag */
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit /* pendsv already handled */
-
- /* clear rt_thread_switch_interrupt_flag to 0 */
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread /* skip register save at the first time */
-
- MRS r1, psp /* get from thread stack pointer */
- STMFD r1!, {r4 - r11} /* push r4 - r11 register */
- LDR r0, [r0]
- STR r1, [r0] /* update from thread stack pointer */
-
-swtich_to_thread:
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] /* load thread stack pointer */
-
- LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
- MSR psp, r1 /* update stack pointer */
-
-pendsv_exit:
- /* restore interrupt */
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
-
-/*
- * void rt_hw_context_switch_to(rt_uint32 to);
- * r0 --> to
- */
-.global rt_hw_context_switch_to
-.type rt_hw_context_switch_to, %function
-rt_hw_context_switch_to:
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- /* set from thread to 0 */
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- /* set interrupt flag to 1 */
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- /* set the PendSV exception priority */
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W R2, [r0,#0x00] /* read */
- ORR r1,r1,r2 /* modify */
- STR r1, [r0] /* write-back */
-
- LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- CPSIE I /* enable interrupts at processor level */
-
- /* never reach here! */
-
-/* compatible with old version */
-.global rt_hw_interrupt_thread_switch
-.type rt_hw_interrupt_thread_switch, %function
-rt_hw_interrupt_thread_switch:
- BX lr
- NOP
diff --git a/libcpu/arm/lm3s/context_rvds.S b/libcpu/arm/lm3s/context_rvds.S
deleted file mode 100644
index b4c795e9ac..0000000000
--- a/libcpu/arm/lm3s/context_rvds.S
+++ /dev/null
@@ -1,175 +0,0 @@
-;/*
-; * File : context.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; */
-
-;/**
-; * @addtogroup STM32
-; */
-;/*@{*/
-
-NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
-NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
-NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
-NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
-
- AREA |.text|, CODE, READONLY, ALIGN=2
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_thread_switch_interrupt_flag
- IMPORT rt_interrupt_from_thread
- IMPORT rt_interrupt_to_thread
-
-;/*
-; * rt_base_t rt_hw_interrupt_disable();
-; */
-rt_hw_interrupt_disable PROC
- EXPORT rt_hw_interrupt_disable
- MRS r0, PRIMASK
- CPSID I
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_interrupt_enable(rt_base_t level);
-; */
-rt_hw_interrupt_enable PROC
- EXPORT rt_hw_interrupt_enable
- MSR PRIMASK, r0
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
-; * r0 --> from
-; * r1 --> to
-; */
-rt_hw_context_switch_interrupt
- EXPORT rt_hw_context_switch_interrupt
-rt_hw_context_switch PROC
- EXPORT rt_hw_context_switch
-
- ; set rt_thread_switch_interrupt_flag to 1
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
- STR r0, [r2]
-
-_reswitch
- LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
- ENDP
-
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
-; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
-rt_hw_pend_sv PROC
- EXPORT rt_hw_pend_sv
-
- ; disable interrupt to protect context switch
- MRS r2, PRIMASK
- CPSID I
-
- ; get rt_thread_switch_interrupt_flag
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit ; pendsv already handled
-
- ; clear rt_thread_switch_interrupt_flag to 0
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread ; skip register save at the first time
-
- MRS r1, psp ; get from thread stack pointer
- STMFD r1!, {r4 - r11} ; push r4 - r11 register
- LDR r0, [r0]
-
- STR r1, [r0] ; update from thread stack pointer
-
-swtich_to_thread
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] ; load thread stack pointer
-
- LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
- MSR psp, r1 ; update stack pointer
-
-pendsv_exit
- ; restore interrupt
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
-;/*
-; * void rt_hw_context_switch_to(rt_uint32 to);
-; * r0 --> to
-; * this fucntion is used to perform the first thread switch
-; */
-rt_hw_context_switch_to PROC
- EXPORT rt_hw_context_switch_to
- ; set to thread
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- ; set from thread to 0
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- ; set interrupt flag to 1
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- ; set the PendSV exception priority
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- STR r1, [r0]
-
- ; trigger the PendSV exception (causes context switch)
- LDR r0, =NVIC_INT_CTRL
- LDR r1, =NVIC_PENDSVSET
- LDR.W R2, [r0,#0x00] ; read
- ORR r1,r1,r2 ; modify
- STR r1, [r0] ; write-bak
-
- ; enable interrupts at processor level
- CPSIE I
-
- ; never reach here!
- ENDP
-
-; compatible with old version
-rt_hw_interrupt_thread_switch PROC
- EXPORT rt_hw_interrupt_thread_switch
- BX lr
- NOP
- ENDP
-
- END \ No newline at end of file
diff --git a/libcpu/arm/lm3s/cpu.c b/libcpu/arm/lm3s/cpu.c
deleted file mode 100644
index 080634c2b9..0000000000
--- a/libcpu/arm/lm3s/cpu.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * File : cpu.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2006-03-13 Bernard first version
- */
-
-#include <rtthread.h>
-
-/**
- * @addtogroup S3C2410
- */
-/*@{*/
-
-/**
- * reset cpu by dog's time-out
- *
- */
-void rt_hw_cpu_reset()
-{
- /*NOTREACHED*/
-}
-
-/**
- * shutdown CPU
- *
- */
-void rt_hw_cpu_shutdown()
-{
- rt_kprintf("shutdown...\n");
-
- RT_ASSERT(0);
-}
-
-/*@}*/
diff --git a/libcpu/arm/lm3s/fault.c b/libcpu/arm/lm3s/fault.c
deleted file mode 100644
index 7e45d2569d..0000000000
--- a/libcpu/arm/lm3s/fault.c
+++ /dev/null
@@ -1,34 +0,0 @@
-#include <rtthread.h>
-
-struct stack_contex
-{
- rt_uint32_t r0;
- rt_uint32_t r1;
- rt_uint32_t r2;
- rt_uint32_t r3;
- rt_uint32_t r12;
- rt_uint32_t lr;
- rt_uint32_t pc;
- rt_uint32_t psr;
-};
-
-extern void rt_hw_interrupt_thread_switch(void);
-extern void list_thread(void);
-extern rt_thread_t rt_current_thread;
-void rt_hw_hard_fault_exception(struct stack_contex* contex)
-{
- rt_kprintf("psr: 0x%08x\n", contex->psr);
- rt_kprintf(" pc: 0x%08x\n", contex->pc);
- rt_kprintf(" lr: 0x%08x\n", contex->lr);
- rt_kprintf("r12: 0x%08x\n", contex->r12);
- rt_kprintf("r03: 0x%08x\n", contex->r3);
- rt_kprintf("r02: 0x%08x\n", contex->r2);
- rt_kprintf("r01: 0x%08x\n", contex->r1);
- rt_kprintf("r00: 0x%08x\n", contex->r0);
-
- rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
-#ifdef RT_USING_FINSH
- list_thread();
-#endif
- while (1);
-}
diff --git a/libcpu/arm/lm3s/fault_gcc.S b/libcpu/arm/lm3s/fault_gcc.S
deleted file mode 100644
index fc8f1d79e4..0000000000
--- a/libcpu/arm/lm3s/fault_gcc.S
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * File : fault_gcc.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-10-11 Bernard first version
- */
-
-.cpu cortex-m3
-.fpu softvfp
-.syntax unified
-.thumb
-.text
-
-.global rt_hw_hard_fault
-.type rt_hw_hard_fault, %function
-rt_hw_hard_fault:
- /* get current context */
- MRS r0, psp /* get fault thread stack pointer */
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
diff --git a/libcpu/arm/lm3s/fault_rvds.S b/libcpu/arm/lm3s/fault_rvds.S
deleted file mode 100644
index 44ce428f75..0000000000
--- a/libcpu/arm/lm3s/fault_rvds.S
+++ /dev/null
@@ -1,35 +0,0 @@
-;/*
-; * File : context.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; */
-
- AREA |.text|, CODE, READONLY, ALIGN=2
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_hw_hard_fault_exception
-
-rt_hw_hard_fault PROC
- EXPORT rt_hw_hard_fault
-
- ; get current context
- MRS r0, psp ; get fault thread stack pointer
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
- END \ No newline at end of file
diff --git a/libcpu/arm/lm3s/interrupt.c b/libcpu/arm/lm3s/interrupt.c
deleted file mode 100644
index f4cc2b1312..0000000000
--- a/libcpu/arm/lm3s/interrupt.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * File : trap.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2006-03-13 Bernard first version
- */
-
-#include <rtthread.h>
-
-/* exception and interrupt handler table */
-rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
-rt_uint32_t rt_thread_switch_interrupt_flag;
-
-/*@}*/
diff --git a/libcpu/arm/lm3s/serial.c b/libcpu/arm/lm3s/serial.c
deleted file mode 100644
index b52f806581..0000000000
--- a/libcpu/arm/lm3s/serial.c
+++ /dev/null
@@ -1,362 +0,0 @@
-/*
- * File : serial.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-06-11 Bernard first version
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <inc/hw_types.h>
-#include <inc/hw_memmap.h>
-#include <inc/hw_uart.h>
-#include <inc/hw_ints.h>
-#include <driverlib/gpio.h>
-#include <driverlib/sysctl.h>
-#include <driverlib/interrupt.h>
-
-#include <uart.h>
-#include "board.h"
-
-extern void rt_hw_interrupt_thread_switch(void);
-
-#define RT_UART_RX_BUFFER_SIZE 64
-
-/* LM3S serial device */
-struct rt_lm3s_serial
-{
- /* inherit from device */
- struct rt_device parent;
-
- rt_uint32_t hw_base;
- rt_uint32_t baudrate;
-
- /* reception field */
- rt_uint16_t save_index, read_index;
- rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
-};
-
-#ifdef RT_USING_UART1
-struct rt_lm3s_serial serial1;
-#endif
-#ifdef RT_USING_UART2
-struct rt_lm3s_serial serial2;
-#endif
-
-void rt_hw_serial_init(void);
-
-void rt_hw_uart_isr(struct rt_lm3s_serial* serial)
-{
- rt_device_t device;
- rt_uint32_t status;
-
- device = (struct rt_device*)serial;
- status = UARTIntStatus(serial->hw_base, true);
-
- /* clear interrupt status */
- UARTIntClear(serial->hw_base, status);
-
- if (device->flag & RT_DEVICE_FLAG_INT_RX)
- {
- char ch;
- rt_base_t level;
-
- while (UARTCharsAvail(serial->hw_base))
- {
- ch = UARTCharGetNonBlocking(serial->hw_base);
-
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
-
- /* read character */
- serial->rx_buffer[serial->save_index] = ch;
- serial->save_index ++;
- if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
- serial->save_index = 0;
-
- /* if the next position is read index, discard this 'read char' */
- if (serial->save_index == serial->read_index)
- {
- serial->read_index ++;
- if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- serial->read_index = 0;
- }
-
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- }
-
- /* invoke callback */
- if(device->rx_indicate != RT_NULL)
- {
- rt_int32_t length;
-
- length = serial->save_index - serial->read_index;
- if (length < 0) length += RT_UART_RX_BUFFER_SIZE;
- device->rx_indicate(device, length);
- }
- }
-}
-
-#ifdef RT_USING_UART1
-void rt_hw_uart_isr_1(int irqno)
-{
- /* enter interrupt */
- rt_interrupt_enter();
-
- /* get serial device */
- rt_hw_uart_isr(&serial1);
-
- /* leave interrupt */
- rt_interrupt_leave();
- rt_hw_interrupt_thread_switch();
-}
-#endif
-
-#ifdef RT_USING_UART2
-void rt_hw_uart_isr_2(int irqno)
-{
- /* enter interrupt */
- rt_interrupt_enter();
-
- /* get serial device */
- rt_hw_uart_isr(&serial2);
-
- /* leave interrupt */
- rt_interrupt_leave();
- rt_hw_interrupt_thread_switch();
-}
-#endif
-
-/**
- * @addtogroup LM3S
- */
-/*@{*/
-
-static rt_err_t rt_serial_init (rt_device_t dev)
-{
- return RT_EOK;
-}
-
-static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
-{
- struct rt_lm3s_serial* serial;
- serial = (struct rt_lm3s_serial*) dev;
-
- RT_ASSERT(serial != RT_NULL);
-
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* enable interrupt */
- if (serial->hw_base == UART0_BASE)
- IntEnable(INT_UART0);
- else if (serial->hw_base == UART1_BASE)
- IntEnable(INT_UART1);
-
- UARTIntEnable(serial->hw_base, UART_INT_RX | UART_INT_RT);
- }
-
- return RT_EOK;
-}
-
-static rt_err_t rt_serial_close(rt_device_t dev)
-{
- struct rt_lm3s_serial* serial;
- serial = (struct rt_lm3s_serial*) dev;
-
- RT_ASSERT(serial != RT_NULL);
-
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* disable UART rx interrupt */
- UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT);
- }
-
- return RT_EOK;
-}
-
-static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
-{
- return RT_EOK;
-}
-
-static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
- rt_uint8_t* ptr;
- struct rt_lm3s_serial *serial = (struct rt_lm3s_serial*)dev;
- RT_ASSERT(serial != RT_NULL);
-
- /* point to buffer */
- ptr = (rt_uint8_t*) buffer;
-
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- while (size)
- {
- /* interrupt receive */
- rt_base_t level;
-
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
- if (serial->read_index != serial->save_index)
- {
- *ptr = serial->rx_buffer[serial->read_index];
-
- serial->read_index ++;
- if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- serial->read_index = 0;
- }
- else
- {
- /* no data in rx buffer */
-
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- break;
- }
-
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
-
- ptr ++; size --;
- }
-
- return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
- {
- /* not support right now */
- RT_ASSERT(0);
- }
-
- /* polling mode */
- while (size)
- {
- *ptr = UARTCharGetNonBlocking(serial->hw_base);
-
- ptr ++; size --;
- }
-
- return (rt_size_t)ptr - (rt_size_t)buffer;
-}
-
-static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
- struct rt_lm3s_serial* serial;
- char *ptr;
-
- serial = (struct rt_lm3s_serial*) dev;
- if (dev->flag & RT_DEVICE_FLAG_INT_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
-
- /* polling write */
- ptr = (char *)buffer;
-
- if (dev->flag & RT_DEVICE_FLAG_STREAM)
- {
- /* stream mode */
- while (size)
- {
- if (*ptr == '\n')
- while (UARTCharPutNonBlocking(serial->hw_base, '\r') == false);
-
- while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false);
-
- ptr ++;
- size --;
- }
- }
- else
- {
- while (size)
- {
- while (UARTCharPutNonBlocking(serial->hw_base, *ptr) == false);
-
- ptr ++;
- size --;
- }
- }
-
- return (rt_size_t) ptr - (rt_size_t) buffer;
-}
-
-void rt_hw_serial_init(void)
-{
- struct rt_lm3s_serial* serial;
-
-#ifdef RT_USING_UART1
- serial = &serial1;
-
- serial->parent.type = RT_Device_Class_Char;
-
- serial->hw_base = UART0_BASE;
- serial->baudrate = 115200;
-
- rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer));
- serial->read_index = serial->save_index = 0;
-
- /* enable UART0 clock */
- SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
-
- /* set UART0 pinmux */
- GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
-
- /* Configure the UART for 115,200, 8-N-1 operation. */
- UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial->baudrate,
- (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
- UART_CONFIG_PAR_NONE));
-
- serial->parent.init = rt_serial_init;
- serial->parent.open = rt_serial_open;
- serial->parent.close = rt_serial_close;
- serial->parent.read = rt_serial_read;
- serial->parent.write = rt_serial_write;
- serial->parent.control = rt_serial_control;
- serial->parent.user_data = RT_NULL;
-
- rt_device_register(&serial->parent,
- "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
-#endif
-
-#ifdef RT_USING_UART2
- serial = &serial2;
-
- serial->parent.type = RT_Device_Class_Char;
-
- serial->hw_base = 0xE0010000;
- serial->baudrate = 115200;
-
- rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer));
- serial->read_index = serial->save_index = 0;
-
- serial->parent.init = rt_serial_init;
- serial->parent.open = rt_serial_open;
- serial->parent.close = rt_serial_close;
- serial->parent.read = rt_serial_read;
- serial->parent.write = rt_serial_write;
- serial->parent.control = rt_serial_control;
- serial->parent.user_data = RT_NULL;
-
- rt_device_register(&serial->parent,
- "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
-#endif
-}
-
-/*@}*/
diff --git a/libcpu/arm/lm3s/stack.c b/libcpu/arm/lm3s/stack.c
deleted file mode 100644
index c7f8c71ab4..0000000000
--- a/libcpu/arm/lm3s/stack.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * File : stack.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2006-08-23 Bernard the first version
- */
-#include <rtthread.h>
-
-/**
- * @addtogroup STM32
- */
-/*@{*/
-
-/**
- * This function will initialize thread stack
- *
- * @param tentry the entry of thread
- * @param parameter the parameter of entry
- * @param stack_addr the beginning stack address
- * @param texit the function will be called when thread exit
- *
- * @return stack address
- */
-rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
- rt_uint8_t *stack_addr, void *texit)
-{
- unsigned long *stk;
-
- stk = (unsigned long *)stack_addr;
- *(stk) = 0x01000000L; /* PSR */
- *(--stk) = (unsigned long)tentry; /* entry point, pc */
- *(--stk) = (unsigned long)texit; /* lr */
- *(--stk) = 0; /* r12 */
- *(--stk) = 0; /* r3 */
- *(--stk) = 0; /* r2 */
- *(--stk) = 0; /* r1 */
- *(--stk) = (unsigned long)parameter; /* r0 : argument */
-
- *(--stk) = 0; /* r11 */
- *(--stk) = 0; /* r10 */
- *(--stk) = 0; /* r9 */
- *(--stk) = 0; /* r8 */
- *(--stk) = 0; /* r7 */
- *(--stk) = 0; /* r6 */
- *(--stk) = 0; /* r5 */
- *(--stk) = 0; /* r4 */
-
- /* return task's current stack address */
- return (rt_uint8_t *)stk;
-}
-
-/*@}*/
diff --git a/libcpu/arm/lm3s/start_gcc.S b/libcpu/arm/lm3s/start_gcc.S
deleted file mode 100644
index 1d1b8e558d..0000000000
--- a/libcpu/arm/lm3s/start_gcc.S
+++ /dev/null
@@ -1,164 +0,0 @@
-.section .bss.init
-.equ Stack_Size, 0x00000200
-.space Stack_Size
-Initial_spTop:
-
- .syntax unified
- .cpu cortex-m3
- .fpu softvfp
- .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-/**
- * @brief This is the code that gets called when the processor first
- * starts execution following a reset event. Only the absolutely
- * necessary set is performed, after which the application
- * supplied main() routine is called.
- * @param None
- * @retval : None
-*/
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
-/* restore original stack pointer */
- LDR r0, =Initial_spTop
- MSR msp, r0
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
-
-CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
-LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
-/* Call the application's entry point.*/
- bl main
- bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- *
- * @param None
- * @retval : None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
-
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3. Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
- .word Initial_spTop
- .word Reset_Handler
- .word Default_Handler //NMI_Handler
- .word rt_hw_hard_fault
- .word Default_Handler //MemManage_Handler
- .word Default_Handler //BusFault_Handler
- .word Default_Handler //UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word Default_Handler //SVC_Handler
- .word Default_Handler //DebugMon_Handler
- .word 0
- .word rt_hw_pend_sv
- .word rt_hw_timer_handler
- .word Default_Handler // GPIO Port A
- .word Default_Handler // GPIO Port B
- .word Default_Handler // GPIO Port C
- .word Default_Handler // GPIO Port D
- .word Default_Handler // GPIO Port E
- .word rt_hw_uart_isr_1 // UART0 Rx and Tx
- .word Default_Handler // UART1 Rx and Tx
- .word Default_Handler // SSI Rx and Tx
- .word Default_Handler // I2C Master and Slave
- .word Default_Handler // PWM Fault
- .word Default_Handler // PWM Generator 0
- .word Default_Handler // PWM Generator 1
- .word Default_Handler // PWM Generator 2
- .word Default_Handler // Quadrature Encoder
- .word Default_Handler // ADC Sequence 0
- .word Default_Handler // ADC Sequence 1
- .word Default_Handler // ADC Sequence 2
- .word Default_Handler // ADC Sequence 3
- .word Default_Handler // Watchdog timer
- .word Default_Handler // Timer 0 subtimer A
- .word Default_Handler // Timer 0 subtimer B
- .word Default_Handler // Timer 1 subtimer A
- .word Default_Handler // Timer 1 subtimer B
- .word Default_Handler // Timer 2 subtimer A
- .word Default_Handler // Timer 2 subtimer B
- .word Default_Handler // Analog Comparator 0
- .word Default_Handler // Analog Comparator 1
- .word Default_Handler // Analog Comparator 2
- .word Default_Handler // System Control (PLL, OSC,
- .word Default_Handler // FLASH Control
- .word Default_Handler // GPIO Port F
- .word Default_Handler // GPIO Port G
- .word Default_Handler // GPIO Port H
- .word Default_Handler // UART2 Rx and Tx
- .word Default_Handler // SSI1 Rx and Tx
- .word Default_Handler // Timer 3 subtimer A
- .word Default_Handler // Timer 3 subtimer B
- .word Default_Handler // I2C1 Master and Slave
- .word Default_Handler // Quadrature Encoder 1
- .word Default_Handler // CAN0
- .word Default_Handler // CAN1
- .word Default_Handler // CAN2
- .word luminaryif_isr // Ethernet
- .word Default_Handler // Hibernate
- .word Default_Handler // USB0
- .word Default_Handler // PWM Generator 3
- .word Default_Handler // uDMA Software Transfer
- .word Default_Handler // uDMA Error
diff --git a/libcpu/arm/lm3s/start_rvds.S b/libcpu/arm/lm3s/start_rvds.S
deleted file mode 100644
index 1fd8adb807..0000000000
--- a/libcpu/arm/lm3s/start_rvds.S
+++ /dev/null
@@ -1,253 +0,0 @@
-; <<< Use Configuration Wizard in Context Menu >>>
-;******************************************************************************
-;
-; Startup.s - Startup code for Stellaris.
-;
-; Copyright (c) 2006-2008 Luminary Micro, Inc. All rights reserved.
-;
-; Software License Agreement
-;
-; Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-; exclusively on LMI's microcontroller products.
-;
-; The software is owned by LMI and/or its suppliers, and is protected under
-; applicable copyright laws. All rights are reserved. You may not combine
-; this software with "viral" open-source software in order to form a larger
-; program. Any use in violation of the foregoing restrictions may subject
-; the user to criminal sanctions under applicable laws, as well as to civil
-; liability for the breach of the terms and conditions of this license.
-;
-; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-;
-; This is part of revision 2523 of the Stellaris Peripheral Driver Library.
-;
-;******************************************************************************
-
-;******************************************************************************
-;
-; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-;******************************************************************************
-Stack EQU 0x00000100
-
-;******************************************************************************
-;
-; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-;******************************************************************************
-Heap EQU 0x00000000
-
-;******************************************************************************
-;
-; Allocate space for the stack.
-;
-;******************************************************************************
- AREA STACK, NOINIT, READWRITE, ALIGN=3
-StackMem
- SPACE Stack
-__initial_sp
-
-;******************************************************************************
-;
-; Allocate space for the heap.
-;
-;******************************************************************************
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-HeapMem
- SPACE Heap
-__heap_limit
-
- IMPORT rt_hw_pend_sv
- IMPORT rt_hw_timer_handler
- IMPORT rt_hw_uart_isr_1
- IMPORT rt_hw_eth_handler
- IMPORT rt_hw_hard_fault
-
-;******************************************************************************
-;
-; Indicate that the code in this file preserves 8-byte alignment of the stack.
-;
-;******************************************************************************
- PRESERVE8
-
-;******************************************************************************
-;
-; Place code into the reset code section.
-;
-;******************************************************************************
- AREA RESET, CODE, READONLY
- THUMB
-
-;******************************************************************************
-;
-; The vector table.
-;
-;******************************************************************************
- EXPORT __Vectors
-__Vectors
- DCD StackMem + Stack ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NmiSR ; NMI Handler
- DCD rt_hw_hard_fault ; Hard Fault Handler
- DCD IntDefaultHandler ; MPU Fault Handler
- DCD IntDefaultHandler ; Bus Fault Handler
- DCD IntDefaultHandler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD IntDefaultHandler ; SVCall Handler
- DCD IntDefaultHandler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD rt_hw_pend_sv ; PendSV Handler
- DCD rt_hw_timer_handler ; SysTick Handler
- DCD IntDefaultHandler ; GPIO Port A
- DCD IntDefaultHandler ; GPIO Port B
- DCD IntDefaultHandler ; GPIO Port C
- DCD IntDefaultHandler ; GPIO Port D
- DCD IntDefaultHandler ; GPIO Port E
- DCD rt_hw_uart_isr_1 ; UART0
- DCD IntDefaultHandler ; UART1
- DCD IntDefaultHandler ; SSI
- DCD IntDefaultHandler ; I2C
- DCD IntDefaultHandler ; PWM Fault
- DCD IntDefaultHandler ; PWM Generator 0
- DCD IntDefaultHandler ; PWM Generator 1
- DCD IntDefaultHandler ; PWM Generator 2
- DCD IntDefaultHandler ; Quadrature Encoder
- DCD IntDefaultHandler ; ADC Sequence 0
- DCD IntDefaultHandler ; ADC Sequence 1
- DCD IntDefaultHandler ; ADC Sequence 2
- DCD IntDefaultHandler ; ADC Sequence 3
- DCD IntDefaultHandler ; Watchdog
- DCD IntDefaultHandler ; Timer 0A
- DCD IntDefaultHandler ; Timer 0B
- DCD IntDefaultHandler ; Timer 1A
- DCD IntDefaultHandler ; Timer 1B
- DCD IntDefaultHandler ; Timer 2A
- DCD IntDefaultHandler ; Timer 2B
- DCD IntDefaultHandler ; Comp 0
- DCD IntDefaultHandler ; Comp 1
- DCD IntDefaultHandler ; Comp 2
- DCD IntDefaultHandler ; System Control
- DCD 0x881 ; Flash Control
- DCD IntDefaultHandler ; GPIO Port F
- DCD IntDefaultHandler ; GPIO Port G
- DCD IntDefaultHandler ; GPIO Port H
- DCD IntDefaultHandler ; UART2 Rx and Tx
- DCD IntDefaultHandler ; SSI1 Rx and Tx
- DCD IntDefaultHandler ; Timer 3 subtimer A
- DCD IntDefaultHandler ; Timer 3 subtimer B
- DCD IntDefaultHandler ; I2C1 Master and Slave
- DCD IntDefaultHandler ; Quadrature Encoder 1
- DCD IntDefaultHandler ; CAN0
- DCD IntDefaultHandler ; CAN1
- DCD IntDefaultHandler ; CAN2
- DCD rt_hw_eth_handler ; Ethernet
- DCD IntDefaultHandler ; Hibernate
- DCD IntDefaultHandler ; USB0
- DCD IntDefaultHandler ; PWM Generator 3
- DCD IntDefaultHandler ; uDMA Software Transfer
- DCD IntDefaultHandler ; uDMA Error
-
-;******************************************************************************
-;
-; This is the code that gets called when the processor first starts execution
-; following a reset event.
-;
-;******************************************************************************
- EXPORT Reset_Handler
-Reset_Handler
- ;
- ; Call the C library enty point that handles startup. This will copy
- ; the .data section initializers from flash to SRAM and zero fill the
- ; .bss section.
- ;
- IMPORT __main
- B __main
-
-;******************************************************************************
-;
-; This is the code that gets called when the processor receives a NMI. This
-; simply enters an infinite loop, preserving the system state for examination
-; by a debugger.
-;
-;******************************************************************************
-NmiSR
- B NmiSR
-
-;******************************************************************************
-;
-; This is the code that gets called when the processor receives a fault
-; interrupt. This simply enters an infinite loop, preserving the system state
-; for examination by a debugger.
-;
-;******************************************************************************
-FaultISR
- B FaultISR
-
-;******************************************************************************
-;
-; This is the code that gets called when the processor receives an unexpected
-; interrupt. This simply enters an infinite loop, preserving the system state
-; for examination by a debugger.
-;
-;******************************************************************************
-IntDefaultHandler
- B IntDefaultHandler
-
-;******************************************************************************
-;
-; Make sure the end of this section is aligned.
-;
-;******************************************************************************
- ALIGN
-
-;******************************************************************************
-;
-; Some code in the normal code section for initializing the heap and stack.
-;
-;******************************************************************************
- AREA |.text|, CODE, READONLY
-
-;******************************************************************************
-;
-; The function expected of the C library startup code for defining the stack
-; and heap memory locations. For the C library version of the startup code,
-; provide this function so that the C library initialization code can find out
-; the location of the stack and heap.
-;
-;******************************************************************************
- IF :DEF: __MICROLIB
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
- ELSE
- IMPORT __use_two_region_memory
- EXPORT __user_initial_stackheap
-__user_initial_stackheap
- LDR R0, =HeapMem
- LDR R1, =(StackMem + Stack)
- LDR R2, =(HeapMem + Heap)
- LDR R3, =StackMem
- BX LR
- ENDIF
-
-;******************************************************************************
-;
-; Make sure the end of this section is aligned.
-;
-;******************************************************************************
- ALIGN
-
-;******************************************************************************
-;
-; Tell the assembler that we're done.
-;
-;******************************************************************************
- END
diff --git a/libcpu/arm/lpc17xx/context_iar.S b/libcpu/arm/lpc17xx/context_iar.S
deleted file mode 100644
index 5333a3452f..0000000000
--- a/libcpu/arm/lpc17xx/context_iar.S
+++ /dev/null
@@ -1,170 +0,0 @@
-;/*
-; * File : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; * 2010-02-04 Magicoe Edit for LPC17xx Series
-; * 2010-12-20 aozima edit for IAR
-; */
-
-;/**
-; * @addtogroup LPC17
-; */
-;/*@{*/
-
-NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
-NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
-NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
-NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
-
- SECTION .text:CODE(2)
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_thread_switch_interrupt_flag
- IMPORT rt_interrupt_from_thread
- IMPORT rt_interrupt_to_thread
-
-;/*
-; * rt_base_t rt_hw_interrupt_disable();
-; */
- EXPORT rt_hw_interrupt_disable
-rt_hw_interrupt_disable:
- MRS r0, PRIMASK
- CPSID I
- BX LR
-
-;/*
-; * void rt_hw_interrupt_enable(rt_base_t level);
-; */
- EXPORT rt_hw_interrupt_enable
-rt_hw_interrupt_enable:
- MSR PRIMASK, r0
- BX LR
-
-;/*
-; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
-; * r0 --> from
-; * r1 --> to
-; */
- EXPORT rt_hw_context_switch_interrupt
- EXPORT rt_hw_context_switch
-
-rt_hw_context_switch_interrupt:
-rt_hw_context_switch:
-
- ; set rt_thread_switch_interrupt_flag to 1
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
- STR r0, [r2]
-
-_reswitch
- LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
-
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
-; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
- EXPORT rt_hw_pend_sv
-rt_hw_pend_sv:
-
- ; disable interrupt to protect context switch
- MRS r2, PRIMASK
- CPSID I
-
- ; get rt_thread_switch_interrupt_flag
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit ; pendsv already handled
-
- ; clear rt_thread_switch_interrupt_flag to 0
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread ; skip register save at the first time
-
- MRS r1, psp ; get from thread stack pointer
- STMFD r1!, {r4 - r11} ; push r4 - r11 register
- LDR r0, [r0]
- STR r1, [r0] ; update from thread stack pointer
-
-swtich_to_thread
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] ; load thread stack pointer
-
- LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
- MSR psp, r1 ; update stack pointer
-
-pendsv_exit
- ; restore interrupt
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
-
-;/*
-; * void rt_hw_context_switch_to(rt_uint32 to);
-; * r0 --> to
-; * this fucntion is used to perform the first thread switch
-; */
- EXPORT rt_hw_context_switch_to
-rt_hw_context_switch_to:
- ; set to thread
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- ; set from thread to 0
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- ; set interrupt flag to 1
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- ; set the PendSV exception priority
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W R2, [r0,#0x00] ; read
- ORR r1,r1,r2 ; modify
- STR r1, [r0] ; write-bak
-
- ; trigger the PendSV exception (causes context switch)
- LDR r0, =NVIC_INT_CTRL
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- ; enable interrupts at processor level
- CPSIE I
-
- ; never reach here!
-
-; compatible with old version
- EXPORT rt_hw_interrupt_thread_switch
-rt_hw_interrupt_thread_switch:
- BX lr
-
- END
diff --git a/libcpu/arm/lpc17xx/context_rvds.S b/libcpu/arm/lpc17xx/context_rvds.S
deleted file mode 100644
index 1f2e7b827a..0000000000
--- a/libcpu/arm/lpc17xx/context_rvds.S
+++ /dev/null
@@ -1,189 +0,0 @@
-;/*
-; * File : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date Author Notes
-; * 2009-01-17 Bernard first version
-; * 2010-02-04 Magicoe Edit for LPC17xx Series
-; */
-
-;/**
-; * @addtogroup LPC17
-; */
-;/*@{*/
-
-NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
-NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
-NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
-NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
-
- AREA |.text|, CODE, READONLY, ALIGN=2
- THUMB
- REQUIRE8
- PRESERVE8
-
- IMPORT rt_thread_switch_interrupt_flag
- IMPORT rt_interrupt_from_thread
- IMPORT rt_interrupt_to_thread
- IMPORT rt_hw_hard_fault_exception
-
-;/*
-; * rt_base_t rt_hw_interrupt_disable();
-; */
-rt_hw_interrupt_disable PROC
- EXPORT rt_hw_interrupt_disable
- MRS r0, PRIMASK
- CPSID I
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_interrupt_enable(rt_base_t level);
-; */
-rt_hw_interrupt_enable PROC
- EXPORT rt_hw_interrupt_enable
- MSR PRIMASK, r0
- BX LR
- ENDP
-
-;/*
-; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
-; * r0 --> from
-; * r1 --> to
-; */
-rt_hw_context_switch_interrupt
- EXPORT rt_hw_context_switch_interrupt
-rt_hw_context_switch PROC
- EXPORT rt_hw_context_switch
-
- ; set rt_thread_switch_interrupt_flag to 1
- LDR r2, =rt_thread_switch_interrupt_flag
- LDR r3, [r2]
- CMP r3, #1
- BEQ _reswitch
- MOV r3, #1
- STR r3, [r2]
-
- LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
- STR r0, [r2]
-
-_reswitch
- LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
- STR r1, [r2]
-
- LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
- BX LR
- ENDP
-
-; r0 --> swith from thread stack
-; r1 --> swith to thread stack
-; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
-PendSV_Handler PROC
- EXPORT PendSV_Handler
-
- ; disable interrupt to protect context switch
- MRS r2, PRIMASK
- CPSID I
-
- ; get rt_thread_switch_interrupt_flag
- LDR r0, =rt_thread_switch_interrupt_flag
- LDR r1, [r0]
- CBZ r1, pendsv_exit ; pendsv already handled
-
- ; clear rt_thread_switch_interrupt_flag to 0
- MOV r1, #0x00
- STR r1, [r0]
-
- LDR r0, =rt_interrupt_from_thread
- LDR r1, [r0]
- CBZ r1, swtich_to_thread ; skip register save at the first time
-
- MRS r1, psp ; get from thread stack pointer
- STMFD r1!, {r4 - r11} ; push r4 - r11 register
- LDR r0, [r0]
- STR r1, [r0] ; update from thread stack pointer
-
-swtich_to_thread
- LDR r1, =rt_interrupt_to_thread
- LDR r1, [r1]
- LDR r1, [r1] ; load thread stack pointer
-
- LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
- MSR psp, r1 ; update stack pointer
-
-pendsv_exit
- ; restore interrupt
- MSR PRIMASK, r2
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
-;/*
-; * void rt_hw_context_switch_to(rt_uint32 to);
-; * r0 --> to
-; * this fucntion is used to perform the first thread switch
-; */
-rt_hw_context_switch_to PROC
- EXPORT rt_hw_context_switch_to
- ; set to thread
- LDR r1, =rt_interrupt_to_thread
- STR r0, [r1]
-
- ; set from thread to 0
- LDR r1, =rt_interrupt_from_thread
- MOV r0, #0x0
- STR r0, [r1]
-
- ; set interrupt flag to 1
- LDR r1, =rt_thread_switch_interrupt_flag
- MOV r0, #1
- STR r0, [r1]
-
- ; set the PendSV exception priority
- LDR r0, =NVIC_SYSPRI2
- LDR r1, =NVIC_PENDSV_PRI
- LDR.W R2, [r0,#0x00] ; read
- ORR r1,r1,r2 ; modify
- STR r1, [r0] ; write-bak
-
- ; trigger the PendSV exception (causes context switch)
- LDR r0, =NVIC_INT_CTRL
- LDR r1, =NVIC_PENDSVSET
- STR r1, [r0]
-
- ; enable interrupts at processor level
- CPSIE I
-
- ; never reach here!
- ENDP
-
-; compatible with old version
-rt_hw_interrupt_thread_switch PROC
- EXPORT rt_hw_interrupt_thread_switch
- BX lr
- NOP
- ENDP
-
-HardFault_Handler PROC
- EXPORT HardFault_Handler
-
- ; get current context
- MRS r0, psp ; get fault thread stack pointer
- PUSH {lr}
- BL rt_hw_hard_fault_exception
- POP {lr}
-
- ORR lr, lr, #0x04
- BX lr
- ENDP
-
- END
diff --git a/libcpu/arm/lpc17xx/cpuport.c b/libcpu/arm/lpc17xx/cpuport.c
deleted file mode 100644
index 9978bfbc8d..0000000000
--- a/libcpu/arm/lpc17xx/cpuport.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * File : cpu.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-01-05 Bernard first version
- * 2010-02-04 Magicoe Edit for LPC17xx Series
- * 2011-10-14 aozima merge all of C source code into cpuport.c
- */
-
-#include <rtthread.h>
-
-/**
- * @addtogroup LPC17xx
- */
-/*@{*/
-
-struct stack_contex
-{
- rt_uint32_t r0;
- rt_uint32_t r1;
- rt_uint32_t r2;
- rt_uint32_t r3;
- rt_uint32_t r12;
- rt_uint32_t lr;
- rt_uint32_t pc;
- rt_uint32_t psr;
-};
-
-/* exception and interrupt handler table */
-rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
-rt_uint32_t rt_thread_switch_interrupt_flag;
-
-/**
- * This function will initialize thread stack
- *
- * @param tentry the entry of thread
- * @param parameter the parameter of entry
- * @param stack_addr the beginning stack address
- * @param texit the function will be called when thread exit
- *
- * @return stack address
- */
-rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
- rt_uint8_t *stack_addr, void *texit)
-{
- unsigned long *stk;
-
- stk = (unsigned long *)stack_addr;
- *(stk) = 0x01000000L; /* PSR */
- *(--stk) = (unsigned long)tentry; /* entry point, pc */
- *(--stk) = (unsigned long)texit; /* lr */
- *(--stk) = 0; /* r12 */
- *(--stk) = 0; /* r3 */
- *(--stk) = 0; /* r2 */
- *(--stk) = 0; /* r1 */
- *(--stk) = (unsigned long)parameter; /* r0 : argument */
-
- *(--stk) = 0; /* r11 */
- *(--stk) = 0; /* r10 */
- *(--stk) = 0; /* r9 */
- *(--stk) = 0; /* r8 */
- *(--stk) = 0; /* r7 */
- *(--stk) = 0; /* r6 */
- *(--stk) = 0; /* r5 */
- *(--stk) = 0; /* r4 */
-
- /* return task's current stack address */
- return (rt_uint8_t *)stk;
-}
-
-extern void list_thread(void);
-extern rt_thread_t rt_current_thread;
-void rt_hw_hard_fault_exception(struct stack_contex* contex)
-{
- rt_kprintf("psr: 0x%08x\n", contex->psr);
- rt_kprintf(" pc: 0x%08x\n", contex->pc);
- rt_kprintf(" lr: 0x%08x\n", contex->lr);
- rt_kprintf("r12: 0x%08x\n", contex->r12);
- rt_kprintf("r03: 0x%08x\n", contex->r3);
- rt_kprintf("r02: 0x%08x\n", contex->r2);
- rt_kprintf("r01: 0x%08x\n", contex->r1);
- rt_kprintf("r00: 0x%08x\n", contex->r0);
-
- rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
-#ifdef RT_USING_FINSH
- list_thread();
-#endif
- while (1);
-}
-
-/*@}*/
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