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-rw-r--r--libcpu/arm/rm48x50/context_ccs.asm12
-rw-r--r--libcpu/arm/rm48x50/stack.c9
2 files changed, 13 insertions, 8 deletions
diff --git a/libcpu/arm/rm48x50/context_ccs.asm b/libcpu/arm/rm48x50/context_ccs.asm
index 695844e300..dc4113f5e4 100644
--- a/libcpu/arm/rm48x50/context_ccs.asm
+++ b/libcpu/arm/rm48x50/context_ccs.asm
@@ -75,13 +75,13 @@ __no_vfp_frame1
.if (__TI_VFP_SUPPORT__)
LDMIA sp!, {r0} ; get fpexc
+ VMSR fpexc, r0 ; restore fpexc
TST r0, #0x40000000
BEQ __no_vfp_frame2
LDMIA sp!, {r1} ; get fpscr
VMSR fpscr, r1
VLDMIA sp!, {d0-d15}
__no_vfp_frame2
- VMSR fpexc, r0
.endif
LDMIA sp!, {r4} ; pop new task cpsr to spsr
@@ -99,13 +99,13 @@ rt_hw_context_switch_to
.if (__TI_VFP_SUPPORT__)
LDMIA sp!, {r0} ; get fpexc
+ VMSR fpexc, r0
TST r0, #0x40000000
BEQ __no_vfp_frame_to
LDMIA sp!, {r1} ; get fpscr
VMSR fpscr, r1
VLDMIA sp!, {d0-d15}
__no_vfp_frame_to
- VMSR fpexc, r0
.endif
LDMIA sp!, {r4} ; pop new task cpsr to spsr
@@ -162,13 +162,13 @@ __no_vfp_frame_str_irq
.if (__TI_VFP_SUPPORT__)
LDMIA sp!, {r0} ; get fpexc
+ VMSR fpexc, r0
TST r0, #0x40000000
BEQ __no_vfp_frame_ldr_irq
LDMIA sp!, {r1} ; get fpscr
VMSR fpscr, r1
VLDMIA sp!, {d0-d15}
__no_vfp_frame_ldr_irq
- VMSR fpexc, r0
.endif
LDMIA sp!, {r0-r12,lr}
@@ -184,13 +184,13 @@ rt_hw_context_switch_interrupt_do
.if (__TI_VFP_SUPPORT__)
LDMIA sp!, {r0} ; get fpexc
+ VMSR fpexc, r0
TST r0, #0x40000000
BEQ __no_vfp_frame_do1
LDMIA sp!, {r1} ; get fpscr
VMSR fpscr, r1
VLDMIA sp!, {d0-d15}
__no_vfp_frame_do1
- VMSR fpexc, r0
.endif
LDMIA sp!, {r0-r12,lr} ; reload saved registers
@@ -216,7 +216,7 @@ __no_vfp_frame_do1
VMRS r0, fpexc
TST r0, #0x40000000
BEQ __no_vfp_frame_do2
- VSTMDB sp!, {d0-d15}
+ VSTMDB sp!, {d0-d15}
VMRS r1, fpscr
; TODO: add support for Common VFPv3.
; Save registers like FPINST, FPINST2
@@ -235,13 +235,13 @@ __no_vfp_frame_do2
.if (__TI_VFP_SUPPORT__)
LDMIA sp!, {r0} ; get fpexc
+ VMSR fpexc, r0
TST r0, #0x40000000
BEQ __no_vfp_frame_do3
LDMIA sp!, {r1} ; get fpscr
VMSR fpscr, r1
VLDMIA sp!, {d0-d15}
__no_vfp_frame_do3
- VMSR fpexc, r0
.endif
LDMIA sp!, {r4} ; pop new task's cpsr to spsr
diff --git a/libcpu/arm/rm48x50/stack.c b/libcpu/arm/rm48x50/stack.c
index a11d8896f9..02dc84e6f1 100644
--- a/libcpu/arm/rm48x50/stack.c
+++ b/libcpu/arm/rm48x50/stack.c
@@ -58,8 +58,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
*(--stk) = SVCMODE; /* arm mode */
#ifdef __TI_VFP_SUPPORT__
- #define VFP_DATA_NR 32
+#ifndef RT_VFP_LAZY_STACKING
{
+ #define VFP_DATA_NR 32
int i;
for (i = 0; i < VFP_DATA_NR; i++)
@@ -68,9 +69,13 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
}
/* FPSCR TODO: do we need to set the values other than 0? */
*(--stk) = 0;
- /* FPEXC. Enable the FVP by default. */
+ /* FPEXC. Enable the FVP if no lazy stacking. */
*(--stk) = 0x40000000;
}
+#else
+ /* FPEXC. Disable the FVP by default. */
+ *(--stk) = 0x00000000;
+#endif
#endif
/* return task's current stack address */