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-rw-r--r--libcpu/Kconfig9
-rw-r--r--libcpu/risc-v/t-head/c906/tick.c42
-rw-r--r--libcpu/risc-v/t-head/c906/tick.h6
-rw-r--r--libcpu/risc-v/virt64/tick.c49
-rw-r--r--libcpu/risc-v/virt64/tick.h2
5 files changed, 66 insertions, 42 deletions
diff --git a/libcpu/Kconfig b/libcpu/Kconfig
index 2c07f463c5..ca5fdd9e34 100644
--- a/libcpu/Kconfig
+++ b/libcpu/Kconfig
@@ -262,6 +262,15 @@ config ARCH_RISCV64
select ARCH_CPU_64BIT
bool
+if ARCH_RISCV64
+ config ARCH_USING_RISCV_COMMON64
+ bool
+ depends on ARCH_RISCV64
+ select RT_USING_CPUTIME
+ help
+ Using the common64 implementation under ./libcpu/risc-v
+endif
+
config ARCH_REMAP_KERNEL
bool
depends on RT_USING_SMART
diff --git a/libcpu/risc-v/t-head/c906/tick.c b/libcpu/risc-v/t-head/c906/tick.c
index 79891adb0e..8e8ff86a74 100644
--- a/libcpu/risc-v/t-head/c906/tick.c
+++ b/libcpu/risc-v/t-head/c906/tick.c
@@ -6,44 +6,50 @@
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting code.
+ * 2024/07/08 Shell Using CPUTIME as tick
*/
#include <rthw.h>
#include <rtthread.h>
+#include <drivers/cputime.h>
#include <encoding.h>
#include "sbi.h"
-#include "tick.h"
-static volatile uint64_t time_elapsed = 0;
-static volatile unsigned long tick_cycles = 0;
-
-static unsigned long tick_delta = TIMER_CLK_FREQ / RT_TICK_PER_SECOND;
+#ifdef RT_USING_KTIME
+#include <ktime.h>
+#endif
-static uint64_t get_ticks()
-{
- __asm__ __volatile__(
- "rdtime %0"
- : "=r"(time_elapsed));
- return time_elapsed;
-}
+static volatile unsigned long tick_cycles = 0;
int tick_isr(void)
{
rt_tick_increase();
- sbi_set_timer(get_ticks() + tick_delta);
+ sbi_set_timer(clock_cpu_gettime() + tick_cycles);
return 0;
}
+/* BSP should config clockbase frequency */
+RT_STATIC_ASSERT(defined_clockbase_freq, CPUTIME_TIMER_FREQ != 0);
+
/* Sets and enable the timer interrupt */
int rt_hw_tick_init(void)
{
+ /* calculate the tick cycles */
+ tick_cycles = CPUTIME_TIMER_FREQ / RT_TICK_PER_SECOND;
+
/* Clear the Supervisor-Timer bit in SIE */
clear_csr(sie, SIP_STIP);
+ /* Init riscv timer */
+ riscv_cputime_init();
+
/* Set timer */
- sbi_set_timer(get_ticks() + tick_delta);
+ sbi_set_timer(clock_cpu_gettime() + tick_cycles);
+#ifdef RT_USING_KTIME
+ rt_ktime_cputimer_init();
+#endif
/* Enable the Supervisor-Timer bit in SIE */
set_csr(sie, SIP_STIP);
@@ -61,10 +67,10 @@ void rt_hw_us_delay(rt_uint32_t us)
unsigned long end_time;
unsigned long run_time;
- start_time = get_ticks();
- end_time = start_time + us * (TIMER_CLK_FREQ / 1000000);
+ start_time = clock_cpu_gettime();
+ end_time = start_time + us * (CPUTIME_TIMER_FREQ / 1000000);
do
{
- run_time = get_ticks();
+ run_time = clock_cpu_gettime();
} while(run_time < end_time);
-} \ No newline at end of file
+}
diff --git a/libcpu/risc-v/t-head/c906/tick.h b/libcpu/risc-v/t-head/c906/tick.h
index 00e4c120b7..6d0e8a90b6 100644
--- a/libcpu/risc-v/t-head/c906/tick.h
+++ b/libcpu/risc-v/t-head/c906/tick.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2023, RT-Thread Development Team
+ * Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -11,10 +11,6 @@
#ifndef TICK_H__
#define TICK_H__
-/* timer clock is 24 MHZ */
-#ifndef TIMER_CLK_FREQ
-#define TIMER_CLK_FREQ (24000000)
-#endif
int tick_isr(void);
int rt_hw_tick_init(void);
diff --git a/libcpu/risc-v/virt64/tick.c b/libcpu/risc-v/virt64/tick.c
index 3dd9af48a3..8e8ff86a74 100644
--- a/libcpu/risc-v/virt64/tick.c
+++ b/libcpu/risc-v/virt64/tick.c
@@ -6,11 +6,13 @@
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting code.
+ * 2024/07/08 Shell Using CPUTIME as tick
*/
#include <rthw.h>
#include <rtthread.h>
+#include <drivers/cputime.h>
#include <encoding.h>
#include "sbi.h"
@@ -18,40 +20,32 @@
#include <ktime.h>
#endif
-static volatile uint64_t time_elapsed = 0;
static volatile unsigned long tick_cycles = 0;
-static uint64_t get_ticks()
-{
- __asm__ __volatile__(
- "rdtime %0"
- : "=r"(time_elapsed));
- return time_elapsed;
-}
-
int tick_isr(void)
{
- // uint64_t core_id = current_coreid();
- // clint->mtimecmp[core_id] += tick_cycles;
rt_tick_increase();
- sbi_set_timer(get_ticks() + tick_cycles);
-
+ sbi_set_timer(clock_cpu_gettime() + tick_cycles);
return 0;
}
+/* BSP should config clockbase frequency */
+RT_STATIC_ASSERT(defined_clockbase_freq, CPUTIME_TIMER_FREQ != 0);
+
/* Sets and enable the timer interrupt */
int rt_hw_tick_init(void)
{
- /* Read core id */
- // unsigned long core_id = current_coreid();
+ /* calculate the tick cycles */
+ tick_cycles = CPUTIME_TIMER_FREQ / RT_TICK_PER_SECOND;
/* Clear the Supervisor-Timer bit in SIE */
clear_csr(sie, SIP_STIP);
- /* calculate the tick cycles */
- tick_cycles = CPUTIME_TIMER_FREQ / RT_TICK_PER_SECOND;
+ /* Init riscv timer */
+ riscv_cputime_init();
+
/* Set timer */
- sbi_set_timer(get_ticks() + tick_cycles);
+ sbi_set_timer(clock_cpu_gettime() + tick_cycles);
#ifdef RT_USING_KTIME
rt_ktime_cputimer_init();
@@ -61,3 +55,22 @@ int rt_hw_tick_init(void)
return 0;
}
+
+/**
+ * This function will delay for some us.
+ *
+ * @param us the delay time of us
+ */
+void rt_hw_us_delay(rt_uint32_t us)
+{
+ unsigned long start_time;
+ unsigned long end_time;
+ unsigned long run_time;
+
+ start_time = clock_cpu_gettime();
+ end_time = start_time + us * (CPUTIME_TIMER_FREQ / 1000000);
+ do
+ {
+ run_time = clock_cpu_gettime();
+ } while(run_time < end_time);
+}
diff --git a/libcpu/risc-v/virt64/tick.h b/libcpu/risc-v/virt64/tick.h
index 0bfd6f62e8..6d0e8a90b6 100644
--- a/libcpu/risc-v/virt64/tick.h
+++ b/libcpu/risc-v/virt64/tick.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-30 20:15:52 +0000