diff options
Diffstat (limited to 'libcpu')
| -rw-r--r-- | libcpu/arm/s3c24x0/clock.c | 37 |
1 files changed, 34 insertions, 3 deletions
diff --git a/libcpu/arm/s3c24x0/clock.c b/libcpu/arm/s3c24x0/clock.c index c701829449..38ffa5d233 100644 --- a/libcpu/arm/s3c24x0/clock.c +++ b/libcpu/arm/s3c24x0/clock.c @@ -17,6 +17,21 @@ #define CONFIG_SYS_CLK_FREQ 12000000 // Fin = 12.00MHz
+#if CONFIG_SYS_CLK_FREQ == 12000000
+ /* MPLL=2*12*100/6=400MHz */
+ #define MPL_MIDV 92 /* m=MPL_MDIV+8=100 */
+ #define MPL_PDIV 4 /* p=MPL_PDIV+2=6 */
+ #define MPL_SDIV 0 /* s=MPL_SDIV=0 */
+ /* UPLL=12*64/8=96MHz */
+ #define UPL_MDIV 56 /* m=UPL_MDIV+8=64 */
+ #define UPL_PDIV 2 /* p=UPL_PDIV+2=4 */
+ #define UPL_SDIV 1 /* s=UPL_SDIV=1 */
+ /* System clock divider FCLK:HCLK:PCLK=1:4:8 */
+ #define DIVN_UPLL 0x1 /* UCLK = UPLL clock / 2 */
+ #define HDIVN 0x2 /* HCLK = FCLK / 4 */
+ #define PDIVN 0x1 /* PCLK = HCLK / 2 */
+#endif
+
rt_uint32_t PCLK;
rt_uint32_t FCLK;
rt_uint32_t HCLK;
@@ -65,13 +80,29 @@ void rt_hw_get_clock(void) PCLK = HCLK;
}
-void rt_hw_set_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv)
+void rt_hw_set_mpll_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv)
+{
+ MPLLCON = sdiv | (pdiv<<4) | (mdiv<<12);
+}
+
+void rt_hw_set_upll_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv)
{
- MPLLCON = sdiv | pdiv<<4 | mdiv<<12;
+ UPLLCON = (mdiv<<12) | (pdiv<<4) | sdiv;
}
-void rt_hw_set_dividor(rt_uint8_t hdivn, rt_uint8_t pdivn)
+void rt_hw_set_divider(rt_uint8_t hdivn, rt_uint8_t pdivn)
{
CLKDIVN = (hdivn<<1) | pdivn;
}
+/**
+ * @brief System Clock Configuration
+ */
+void rt_hw_clock_init(void)
+{
+ LOCKTIME = 0xFFFFFFFF;
+ rt_hw_set_divider(HDIVN, PDIVN);
+ rt_hw_set_upll_clock(UPL_SDIV, UPL_PDIV, UPL_MDIV);
+ rt_hw_set_mpll_clock(MPL_SDIV, MPL_PDIV, MPL_MIDV);
+}
+
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