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-rw-r--r--libcpu/m16c/m16c62p/context_iar.S88
-rw-r--r--libcpu/m16c/m16c62p/context_iar.asm86
2 files changed, 81 insertions, 93 deletions
diff --git a/libcpu/m16c/m16c62p/context_iar.S b/libcpu/m16c/m16c62p/context_iar.S
index 29c8656ba7..f326817ffb 100644
--- a/libcpu/m16c/m16c62p/context_iar.S
+++ b/libcpu/m16c/m16c62p/context_iar.S
@@ -15,76 +15,70 @@
*
* For : Renesas M16C
* Toolchain : IAR's EW for M16C v3.401
-*/
+ */
- RSEG CSTACK
+ RSEG CSTACK
- RSEG ISTACK
+ RSEG ISTACK
- RSEG CODE(1)
+ RSEG CODE(1)
- EXTERN rt_thread_switch_interrput_flag
- EXTERN rt_interrupt_from_thread
- EXTERN rt_interrupt_to_thread
+ EXTERN rt_thread_switch_interrput_flag
+ EXTERN rt_interrupt_from_thread
+ EXTERN rt_interrupt_to_thread
- PUBLIC rt_hw_interrupt_disable
- PUBLIC rt_hw_interrupt_enable
- PUBLIC rt_hw_context_switch_to
- PUBLIC rt_hw_context_switch
- PUBLIC rt_hw_context_switch_interrupt
- PUBLIC os_context_switch
+ PUBLIC rt_hw_interrupt_disable
+ PUBLIC rt_hw_interrupt_enable
+ PUBLIC rt_hw_context_switch_to
+ PUBLIC rt_hw_context_switch
+ PUBLIC rt_hw_context_switch_interrupt
+ PUBLIC os_context_switch
-rt_hw_interrupt_disable
- STC FLG, R0 ;fify 20100419
- FCLR I
+rt_hw_interrupt_disable:
+ STC FLG, R0 ;fify 20100419
+ FCLR I
RTS
-rt_hw_interrupt_enable
- LDC R0, FLG ;fify 20100419
+rt_hw_interrupt_enable:
+ LDC R0, FLG ;fify 20100419
RTS
.EVEN
os_context_switch:
- PUSHM R0,R1,R2,R3,A0,A1,SB,FB
- CMP.W #0,rt_thread_switch_interrput_flag
- JEQ exit
- MOV.W #0, rt_thread_switch_interrput_flag
- MOV.W rt_interrupt_from_thread, A0
- STC ISP, [A0]
- MOV.W rt_interrupt_to_thread, A0
- LDC [A0], ISP
-exit
- POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
- REIT ; Return from interrup
+ PUSHM R0,R1,R2,R3,A0,A1,SB,FB
+
+ MOV.W rt_interrupt_from_thread, A0
+ STC ISP, [A0]
+ MOV.W rt_interrupt_to_thread, A0
+ LDC [A0], ISP
+
+ POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
+ REIT ; Return from interrup
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
* this fucntion is used to perform the first thread switch
*/
-rt_hw_context_switch_to
- MOV.W R0, A0
- LDC [A0], ISP
- POPM R0,R1,R2,R3,A0,A1,SB,FB
+rt_hw_context_switch_to:
+ MOV.W R0, A0
+ LDC [A0], ISP
+ POPM R0,R1,R2,R3,A0,A1,SB,FB
REIT
-rt_hw_context_switch
- CMP.W #1,rt_thread_switch_interrput_flag
- JEQ jump1
- MOV.W #1,rt_thread_switch_interrput_flag
- MOV.W R0, rt_interrupt_from_thread
-jump1
- MOV.W R1, rt_interrupt_to_thread
- INT #0
+rt_hw_context_switch:
+ MOV.W R0, rt_interrupt_from_thread
+ MOV.W R1, rt_interrupt_to_thread
+ INT #0 ;software interrupt 0
RTS
-rt_hw_context_switch_interrupt
- CMP.W #1,rt_thread_switch_interrput_flag
- JEQ jump
- MOV.W #1,rt_thread_switch_interrput_flag
- MOV.W R0, rt_interrupt_from_thread
+rt_hw_context_switch_interrupt:
+ CMP.W #1, rt_thread_switch_interrput_flag
+ JEQ jump
+ MOV.W #1, rt_thread_switch_interrput_flag
+ MOV.W R0, rt_interrupt_from_thread
jump
- MOV.W R1, rt_interrupt_to_thread
+ MOV.W R1, rt_interrupt_to_thread
RTS
END
diff --git a/libcpu/m16c/m16c62p/context_iar.asm b/libcpu/m16c/m16c62p/context_iar.asm
index 52dea18cae..f326817ffb 100644
--- a/libcpu/m16c/m16c62p/context_iar.asm
+++ b/libcpu/m16c/m16c62p/context_iar.asm
@@ -17,74 +17,68 @@
* Toolchain : IAR's EW for M16C v3.401
*/
- RSEG CSTACK
+ RSEG CSTACK
- RSEG ISTACK
+ RSEG ISTACK
- RSEG CODE(1)
+ RSEG CODE(1)
- EXTERN rt_thread_switch_interrput_flag
- EXTERN rt_interrupt_from_thread
- EXTERN rt_interrupt_to_thread
+ EXTERN rt_thread_switch_interrput_flag
+ EXTERN rt_interrupt_from_thread
+ EXTERN rt_interrupt_to_thread
- PUBLIC rt_hw_interrupt_disable
- PUBLIC rt_hw_interrupt_enable
- PUBLIC rt_hw_context_switch_to
- PUBLIC rt_hw_context_switch
- PUBLIC rt_hw_context_switch_interrupt
- PUBLIC os_context_switch
+ PUBLIC rt_hw_interrupt_disable
+ PUBLIC rt_hw_interrupt_enable
+ PUBLIC rt_hw_context_switch_to
+ PUBLIC rt_hw_context_switch
+ PUBLIC rt_hw_context_switch_interrupt
+ PUBLIC os_context_switch
-rt_hw_interrupt_disable
- STC FLG, R0 ;fify 20100419
- FCLR I
+rt_hw_interrupt_disable:
+ STC FLG, R0 ;fify 20100419
+ FCLR I
RTS
-rt_hw_interrupt_enable
- LDC R0, FLG ;fify 20100419
+rt_hw_interrupt_enable:
+ LDC R0, FLG ;fify 20100419
RTS
.EVEN
os_context_switch:
- PUSHM R0,R1,R2,R3,A0,A1,SB,FB
- CMP.W #0,rt_thread_switch_interrput_flag
- JEQ exit
- MOV.W #0, rt_thread_switch_interrput_flag
- MOV.W rt_interrupt_from_thread, A0
- STC ISP, [A0]
- MOV.W rt_interrupt_to_thread, A0
- LDC [A0], ISP
-exit
- POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
- REIT ; Return from interrup
+ PUSHM R0,R1,R2,R3,A0,A1,SB,FB
+
+ MOV.W rt_interrupt_from_thread, A0
+ STC ISP, [A0]
+ MOV.W rt_interrupt_to_thread, A0
+ LDC [A0], ISP
+
+ POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
+ REIT ; Return from interrup
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
* this fucntion is used to perform the first thread switch
*/
-rt_hw_context_switch_to
- MOV.W R0, A0
- LDC [A0], ISP
- POPM R0,R1,R2,R3,A0,A1,SB,FB
+rt_hw_context_switch_to:
+ MOV.W R0, A0
+ LDC [A0], ISP
+ POPM R0,R1,R2,R3,A0,A1,SB,FB
REIT
-rt_hw_context_switch
- CMP.W #1,rt_thread_switch_interrput_flag
- JEQ jump1
- MOV.W #1,rt_thread_switch_interrput_flag
- MOV.W R0, rt_interrupt_from_thread
-jump1
- MOV.W R1, rt_interrupt_to_thread
- INT #0
+rt_hw_context_switch:
+ MOV.W R0, rt_interrupt_from_thread
+ MOV.W R1, rt_interrupt_to_thread
+ INT #0 ;software interrupt 0
RTS
-rt_hw_context_switch_interrupt
- CMP.W #1,rt_thread_switch_interrput_flag
- JEQ jump
- MOV.W #1,rt_thread_switch_interrput_flag
- MOV.W R0, rt_interrupt_from_thread
+rt_hw_context_switch_interrupt:
+ CMP.W #1, rt_thread_switch_interrput_flag
+ JEQ jump
+ MOV.W #1, rt_thread_switch_interrput_flag
+ MOV.W R0, rt_interrupt_from_thread
jump
- MOV.W R1, rt_interrupt_to_thread
+ MOV.W R1, rt_interrupt_to_thread
RTS
END
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-30 17:54:51 +0000