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These changes are designed to standardize the memory management across
'virt64' and 'c906', ensuring efficient handling of address spaces and
page tables.
Changes:
- Creation of ASID management files (`asid.c`) for both 'c906' and
'virt64' architectures, which is essential for maintaining stability.
- Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files.
- Addition of functions to manage ASID allocation and switching of page tables.
- For c906, accommodated the early memory setup to the one from virt64.
Signed-off-by: Shell <[email protected]>
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Changes:
- added config for NEW_CTX_SWITCH
- used new context on c906 sched switch routine
- update _rt_hw_stack_init to fit into NEW_CTX_SWITCH
- separated vector ctx from the generic
Signed-off-by: Shell <[email protected]>
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check log
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When the driver request a API gets RT_NULL which return value is ptr,
they could not know why get a RT_NULL.
some API return RT_NULL, is not error internal maybe, it just not
supported for this platform, but the driver still could work ok,
the API can return (RT_NULL + -RT_EEMPTY) to driver.
on the other hand, the driver can do more behaviors by error no.
When the API return the -RT_EBUSY, driver can wait for a moment and retry.
When the API return the -RT_ENOSYS, driver can try the next mode or request's name.
Signed-off-by: GuEe-GUI <[email protected]>
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udp一个socket跟多个地址通讯bug修复、DNS加锁防止多线程错乱、实现at_gethostbyname_r、稳定性优化
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PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.
Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.
Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.
Signed-off-by: GuEe-GUI <[email protected]>
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1. RT_FIELD_PREP: prepare a bitfield element.
2. RT_FIELD_GET: extract a bitfield element.
3. rt_offsetof: member offset of a struct
4. rt_upper_32_bits: high 32 bits of value.
5. rt_lower_32_bits: lower 32 bits of value.
6. rt_upper_16_bits: high 16 bits of value.
7. rt_lower_16_bits: lower 16 bits of value.
8. rt_max_t: fix type of max(...).
9. rt_ilog2: integer logarithm base 2.
Signed-off-by: GuEe-GUI <[email protected]>
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* add mutex_pi
* fix assertion error when thread wakeup while waiting mutex
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CV18xx RISC-V C906L.
Configuration value for CPU and ARCH are already defined in rtconfig.py.
Remove these duplication from SConstruct.
Signed-off-by: Chen Wang <[email protected]>
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为什么提交这份PR (why to submit this PR)
Issue: using iperf server with sshd together and the kernel will get stuck occasionally.
taken_list is accessed from other mutex when updating priority.
你的解决方案是什么 (what is your solution)
protect taken_list on shared lock, but not on mutex local spinlock.
Signed-off-by: Shell <[email protected]>
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After first called from uart open, the dw8250_uart_configure
API cannot be called again. Otherwise, this will mess up the
device, and uart will not act properly to interrupt again.
Analysis: Configure uart device will close recive interrupte,
causing uart device to malfunction.
Solution: After configure uart device, enable the device's
recive interrupte.
Signed-off-by: Shicheng Chu <[email protected]>
Reviewed-by: Chen Wang <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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The bus should call driver's `remove` callback not
instead of `shutdown` in rt_bus_remove_device.
Signed-off-by: GuEe-GUI <[email protected]>
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修正使用rt_device_create创建设备，使用rt_device_destroy删除失败的问题
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Signed-off-by: flyingcys <[email protected]>
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This patch fixes GCC build support for FRDM-MCXC444.
* Updated compiler flags to Cortex-M0 without FPU.
* Updated linker script to add RT-Thread const tables.
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canfd)
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elmfat when use msc
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