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When msh tries to execute a non-ELF path, lwp_execve() may allocate a PID
before lwp_load() fails. The old error path only dropped the LWP reference,
leaving the PID tree entry pointing to a freed LWP.
In an init-less boot flow, this can poison pid 1 after a failed command from
msh. A later LWP launch may then treat the stale pid 1 entry as a valid parent
LWP, resulting in invalid pgrp/session state and a job-control assertion during
process exit.
Add lwp_pid_rollback() for exec/spawn failures before the process becomes
runnable. Unlike lwp_pid_put(), it always releases the PID lock and does not
enter the "no more pid allocation" state when the PID tree becomes empty.
Use the rollback helper in lwp_execve() failure paths after PID allocation.
Signed-off-by: zhangyang <[email protected]>
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Automated security fix generated by Orbis Security AI
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- add i686-atxhua-picolib-elf-gcc toolchain
- add picolib option to bsp/x86
- add necessary picolib require library
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新增Zig版本检测逻辑，根据当前Zig版本切换兼容的构建配置：
0.14及以上版本使用新的模块构建API，
低于0.14版本保留原有构建逻辑
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* 添加 rdk_s100 bsp
* 添加 CI 看护
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preload the actual HAL receive buffer with 0xFF for receive-only transfers
rename spi_dma_flag to spi_xfer_flags to match DMA and interrupt flags
clarify SPI async completion and transfer-mode comments
add Doxygen comments for STM32 SPI runtime structures and handlers
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introduce interrupt transfer route selection and SPI IRQ visibility macros
unify DMA and INT completion handling with timeout-triggered abort recovery
keep short transfers on polling and use DMA or INT only when eligible
refine STM32 SPI init and IRQ registration paths for mixed transfer backends
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refine the stm32 hard spi dma configuration hierarchy with shared feature macros
align dma flag usage with rt-device dma flags and gate dma-only fields and paths
make the dma transfer threshold configurable through BSP_SPI_DMA_TRANS_MIN_LEN
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serial device
- The serial_fops_open function closes and reopens the serial device,but the RT_DEVICE_FLAG_STREAM flag was not preserved across the close/open cycle. This change saves the STREAM flag before close and restores it during reopen to ensure consistent behavior.
Signed-off-by: Runcheng Lu <[email protected]>
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support independent interrupts management
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When rx_bufsz or tx_bufsz is 0, the driver returns -RT_EPERM but falls
through to RT_ASSERT(rx_fifo/tx_fifo != RT_NULL). Since serial_rx/serial_tx
is NULL in non-buffered mode, this triggers an assertion failure.
Add break after setting ret = -RT_EPERM in the four affected cases:
- RT_SERIAL_CTRL_SET_RX_TIMEOUT
- RT_SERIAL_CTRL_SET_TX_TIMEOUT
- RT_SERIAL_CTRL_GET_RX_TIMEOUT
- RT_SERIAL_CTRL_GET_TX_TIMEOUT
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* add i686 x86 newlib toolchain
* add missing x86 gcc option to manual_dist.yml
* fix typo
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enable I2C error irq when async transfer paths are used fall back to polling when scheduler or interrupt context cannot wait for completion complete the wait path on HAL error callback and abort the transfer on async timeout or error allow INT and DMA mode flags to coexist and keep recovery behavior aligned across STM32 I2C IPs
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Signed-off-by: GuEe-GUI <[email protected]>
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Co-authored-by: CUGLIJIE
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I no longer have the energy to participate in RTT community work,
so I am removing my maintainer information.
Signed-off-by: Chen Wang <[email protected]>
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- migrate STM32 HAL driver DMA config macros to shared descriptor init helpers
- add overridable DMA priority and NVIC priority fields for board-level configs
- align SPI, UART, I2C, SDIO, and QSPI DMA descriptors across visible STM32 series configs
- simplify per-series DMA config definitions and reduce duplicated field assignments
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- add drv_dma common helpers and stm32_dma_config descriptors for STM32 series
- refactor i2c, spi, usart, qspi, and sdio DMA setup and deinit paths to reuse the common layer
- unify DMA IRQ enable, rollback handling, and const board-level DMA configuration usage
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Support UFS over PCI, too.
Signed-off-by: GuEe-GUI <[email protected]>
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