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2025-12-11fix:[components][drivers][sdio] fix the sequence of switching to emmc ↵Fan Yang
high-speed ddr mode #11037
2025-12-11update: [libcpu][risc-v][common] allow overriding isr numbers for MCUFan YANG
- allow overriding the isr numbers via RT_HW_ISR_NUM macro Signed-off-by: Fan YANG <[email protected]>
2025-12-11fix: [kernel] [thread] Resolve delayed thread wakeup bug when calling ↵Kurngsy
suspend repeatedly (#10970) * Enhance thread suspend function with stricter checks Refactor thread suspension logic to improve clarity and correctness. * Clean up formatting in thread.c Removed unnecessary blank line in thread.c. * Refactor thread suspend state handling Refactor thread suspension logic to improve clarity and maintainability. * Update thread.c * Fix indentation for RT_THREAD_SUSPEND_KILLABLE case
2025-12-11 [utest][smp]Add descriptions for the SMP test cases (interrupt_pri and ↵Teng mengchen
spinlock) #11011
2025-12-11[dm][hwspinlock] support hwspinlockGuEe-GUI
Hardware spinlock modules provide hardware assistance for synchronization and mutual exclusion between heterogeneous processors and those not operating under a single, shared operating system. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-11[utest][smp_call]:Add standardized documentation for SMP Call Smoke Test ↵Chuan
(#11014)
2025-12-11[drivers][ofw] Update OFW #11004GUI
Fixup fdt address reg and cells parse. Support only option name way for earlycon. Find the console device when using "stdout-path".
2025-12-10[docs][utest]:Add comments for smp_thread_preemptionTm-C-mT
Add comments for smp_thread_preemption. Signed-off-by: Mengchen Teng <[email protected]>
2025-12-10[utest]:Modify the execution logic of smp_thread_preemptionsTm-C-mT
Currently, the print information of this test case fails to demonstrate that the high-priority thread has preempted the low-priority thread. This is because when the high-priority thread prints the thread list, there is no information about the low-priority thread (tlow), as tlow has already completed execution and been destroyed. Therefore, the current execution logic cannot confirm the successful completion of the preemption operation. Solution: After the low-priority thread (tlow) releases the lock, add a busy-wait loop while(!finish_flag);. At this point, when the high-priority thread (thigh) prints the thread list information, tlow can be observed in the ready state, indicating that it has been preempted by thigh. Signed-off-by: Mengchen Teng <[email protected]>
2025-12-10[utest][smp_call]:fix initialize current_mask in _wait_for_updateChuan
2025-12-10[dm][nvmem] support nvmemGuEe-GUI
Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES... Signed-off-by: GuEe-GUI <[email protected]>
2025-12-10[dm][rtc] update rtc and new drivers (#11033)GUI
* [dd][rtc] set the RTC alarm thread stack size default. Signed-off-by: GuEe-GUI <[email protected]> * [dm][rtc] make Kconfig import for DM Signed-off-by: GuEe-GUI <[email protected]> * [dm][rtc] support DM API for RTC 1. rtc_dev_set_name for RTC device init the name auto. 2. rtc_wkalarm_to_timestamp and rtc_timestamp_to_wkalarm for rt_rtc_wkalarm/time_t convert. Signed-off-by: GuEe-GUI <[email protected]> * [dm][rtc] add new drivers 1. Dallas/Maxim DS1302 2. Dallas/Maxim DS1307/37/38/39/40, ST M41T11 3. Goldfish Real Time Clock 4. Haoyu Microelectronics HYM8563 5. NXP PCF8523 6. Philips PCF8563/Epson RTC8564 7. ARM PL031 8. Epson RX8010SJ Signed-off-by: GuEe-GUI <[email protected]> --------- Signed-off-by: GuEe-GUI <[email protected]>
2025-12-10[dm][input] support input #11031GUI
2025-12-10[dm][pin][pinctrl] add new driverGuEe-GUI
1. ARM PL061 GPIO 2. Single Pinctrl Signed-off-by: GuEe-GUI <[email protected]>
2025-12-10[dm][pin] fixup the DM Kconfig import in DM mode onlyGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-10[dm][pinctrl] new interface for 'pin_gpio_request'GuEe-GUI
Some GPIO should apply GPIO mode by pinctrl, add `pin_ctrl_gpio_request` for GPIO driver to apply it auto. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[DM][HWTIMER] Enable arm arch timer more API for cpuidle in the futureGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[DM][HWTIMER] Make Kconfig import for DMGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[dm][core] add new API for DMGuEe-GUI
1. rt_dm_dev_is_big_endian 2. rt_dm_dev_get_prop_fuzzy_name Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[dm][core] fixup the `rt_dm_dev_prop_read_u8_array_index` OFW checkGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[dm][core] cleanup formatGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[dm][core] add common stack size for DMGuEe-GUI
DM driver is public, they don't know the size of the thread stack default. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[DM][PIC] Fix #10998 (#11024)GUI
* [DM/PIC] Fixup SMP CPU mask list when CPU < 4 * [DM][PIC] Fix #10998 The size of cpumask is `RT_CPUS_NR`, memset force to space will overflow in stack. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[DM][LED] Update LED#11007GUI
* [DM][LED] Fixup LED check status string match * [DM][LED] Update LED blink cycle to heartbeat * [DM][LED] Fixup gpio-led memory alloc to zero * [DM][LED] Update LED common drivers
2025-12-09[DM][HWCRYPTO] Make Kconfig import for DMGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-09[Driver][MISC] Update ADC/PWM (#11003)GUI
* [DM][MISC] Make Kconfig(ADC/PWM) import for DM * [Driver][MISC][ADC] Fixup ADC 1. Fixup error no. 2. Fixup type of control for args. 3. Fixup value no init. * [Driver][MISC][PWM] Enable `rt_pwm_get` API Signed-off-by: GuEe-GUI <[email protected]>
2025-12-08Adding Rust Language Support for RT-Thread #10910zhang san
2025-12-08[DM][MTD] Add common MTD driversGuEe-GUI
1. CFI-Nor flash DM driver. 2. SPI-Nor flash DM driver. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-08[DM][MTD] Set MTD config to menuconfigGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-08[DM/PHYE] Support USB generic PHYE.GuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-08[rt-link] fix the compiling issue under 64bit arch #11018Bernard Xiong
2025-12-07[DM/PIC] Fixup SMP CPU mask list when CPU < 4GuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-07[DM/MFD] Add QEMU EDU for PCI studyGuEe-GUI
EDU Support DMA (lower 32 bits) and factorial, MSI-X, user can change device or driver to study PCI. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-07[DM/MFDD] Make Kconfig import for DMGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[PHY/OFW] Fixup the phy link up waiting foreverGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[PHY/OFW] Change the log levelGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[DM/PHY] Make Kconfig import for DMGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[Drivers/phy] Fixup header include for v2GuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[DM/I2C] Update I2C for DMGuEe-GUI
1. Add get id match data API. 2. Set I2C device name default before adding to bus. 3. Add Kconfig import for DM. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[DM/MISC] Update MISC APIGuEe-GUI
1. Fixup RT_DIV_ROUND_DOWN_ULL and RT_DIV_ROUND_UP_ULL, rt_do_div. 2. Support RT_DIV_ROUND_CLOSEST_ULL. 3. Make new DIV API. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[DM/CAN] Update CAN for DMGuEe-GUI
1. Kconfig import wtih DM 2. Add DM API for Drivers Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[DM/PCI] Fixup the C99, 6.8.1 Labeled statements p4GuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[action]Add automatic testing for SMP.Rbb666
2025-12-04[DFS] Support 9PFSGuEe-GUI
What is 9PFS (https://en.wikipedia.org/wiki/9P_(protocol)): 9P (or the Plan 9 Filesystem Protocol or Styx) is a network protocol developed for the Plan 9 from Bell Labs distributed operating system as the means of connecting the components of a Plan 9 system. Files are key objects in Plan 9. They represent windows, network connections, processes, and almost anything else available in the operating system. rt-thread could share filesystem in VM mode with 9pfs such as QEMU... Signed-off-by: GuEe-GUI <[email protected]>
2025-12-04[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscvTm-C-mT
1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng <[email protected]>
2025-12-04[utest]: Solve the address misalignment issue of atomic operationsTm-C-mT
In smp_assigned_idle_cores_tc, the finish_flag involves atomic operations and thus requires address alignment. Signed-off-by: Mengchen Teng <[email protected]>
2025-12-03[MM] Update MM System (#10989)GUI
* [MM] Fixup MM 1. Fixup some LOG_D args. 2. Stop installing page when `rt_aspace_map_phy` fail. * [MM] Support page MPR dynamic size For RISC-V or dynamic address space arch in the future. Signed-off-by: GuEe-GUI <[email protected]>
2025-12-03[DM/DMA] Update DMA #10987GUI
* Append WT attribute. * Change the API with pool size only. * Add address mask for DMA * Change DMA lock to mutex * Add pause callback for DMA engine driver * Add DMA Engine test * Add ARM PL330 DMA Engine driver
2025-12-03[bsp][renesas] Add ra8p1-titan-board BSP.yans
2025-12-03[bsp/renesas][drivers] Added adaptation for ra8p1.yans