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加超时时间、flush、获取缓冲区数据长度命令、数据溢出逻辑修复、稳定性细节优化、添加更多serial_v2测试用例
[components][serial_v2] 优化txflush逻辑、对tx的activated做中断保护
[components][at] at_client适配新版serial_v2
[components][at] at_server适配新版serial_v2
[components][serial_v2] 测试用例增加循环调用,format测试用例
[components][serial_v2] poll模式判断逻辑错误
[components][serial_v2] 测试用例去掉一些非必要延时
[components][serial_v2] 测试例程使用menuconfig进行配置,更新readme
[components][at_client] at_client_getchar返回值错误、at_client解析线程优先级错误设置
[components][at] 错误码应该返回负值
[components][serial_v2] TCFLSH和FIONREAD完善、control函数增加错误返回值
[components][serial_v2] RT_SERIAL_CTRL_GET_RX_DATA_LEN更改为RT_SERIAL_CTRL_GET_UNREAD_BYTES_COUNT
[utest][serial_v2] TC_UART_SEND_TIMES替换为RT_SERIAL_TC_SEND_ITERATIONS
[components][serial_v2] FIONREAD参数应该是无符号类型
[utest][serial_v2] 完善测试用例
[components][serial_v2] 避免使用三目运算符
[components][serial_v2] 使用clang-format格式化代码
[components][serial_v2] 添加get超时时间命令
[components][serial_v2] 完善posix接口
[components][serial_v2] 阻塞接口添加阻塞时间为0时的处理逻辑、优化RX阻塞接收逻辑
[components][serial_v2] 设置超时时间命令的参数改为指针形式
[components][serial_v2] nbuf发送添加超时时间为0时的逻辑
[components][serial_v2] 完善添加测试用例
[utest][serial_v2] 修复依赖关系
[components][serial_v2] 非阻塞模式下tx_flush错误修复
[components][serial_v2] activated使用原子API
[components][serial_v2] 优化DMA逻辑、没使能DMA时屏蔽DMA逻辑节约资源
[components][serial_v2] 提供写满时丢弃新数据和覆盖旧数据策略,写满丢弃策略效率更高
[components][serial_v2] 部分平台适配写满时两种策略功能
[components][serial_v2] DMA模式暂不支持丢弃新数据策略
[utest][serial_v2] 优化测试代码
[components][serial_v2] DMA模式下使用乒乓缓冲、DMA模式支持丢弃新数据策略
[utest][serial_v2] 适配DMA乒乓缓冲
[bsp][serial_v2] 部分bsp适配DMA下乒乓缓冲
[components][serial_v2] 使用spinlock替换中断,对部分结构体变量使用原子操作
[utest][serial_v2] 更新测试用例
[components][at] 适配new serialv2不再判断RTT版本号
[components][at] 删除多余的中文注释
[utest][serial_v2] 添加交叉echo示例,qemu环境下专用
[bsp][qemu] 适配串口v2并开启fifo
[components][at] 修复合并导致的错误
[bsp][n32] 适配serial_v2,没有经过测试
[components][serial_v2] 格式化代码
[utest][serial_v2] 删除无意义的打印
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([#10176](https://github.com/hydevcode/rt-thread/issues/10176))
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https://github.com/RT-Thread/rt-thread/pull/9420
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Update drv_smc911x.c
代码中用到udelay和mdelay函数,但是没有包含头文件
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[libcpu/arm/cortex-a]修改arm/cortex-a启动方式,解决cortex-a开启SMP工作异常问题 (#8517)
Co-authored-by: wangzongqiang <[email protected]>
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Signed-off-by: Shell <[email protected]>
Co-authored-by: xqyjlj <[email protected]>
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Signed-off-by: Shell <[email protected]>
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* [utest/mm] add testcase for create/init
format codes of create/init in components/mm
* [libcpu/aarch64] fix user stack check routine
* [kservice] export API for utest
* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map
* [lwp/user_mm] add user_map_varea for mmap feature
* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix
* [utest/mm] testcase for synchronization
* [mm] modify unmap api to improve throughput
* [utest/mm] testcases for cache and varea map
* [format] remove extra space
* [utest/mm] fix testcase problem in header
* [lwp] extend map_user_varea with a flag
* [utest/mm] testcase for lwp_map_user_varea
* [libcpu/arm/cortex-a] fix kernel space layout
* [utest/mm] adjust for armv7 arch
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* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces
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rt_ssize_t can give negative error code, which follows the unix style correctly
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synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
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* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
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* [lvgl] PKG_USING_LV_MUSIC_DEMO defaults by yes
* [lvgl] remove specific suppport for imxrt1060
https://github.com/lvgl/lvgl/pull/3566
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* [posix] POSIX standard implementation for PSE51
- add some posix's interfaces that we haven't before.
- these PR have passed the interface definition test across gcc platfrom;
- have tested base on qemu-a9 and stm32h750-art-pi.
* [newlib] only enable POSIX.1-1990
* update projects
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* [kernel][mem] Multiple instances of small memory allocation algorithm
* [kernel][mem] Change small memory management algorithm memory header flag
* [kernel][mem] Fix assertion problem
* [kernel][slab] Multiple instances of slab memory management algorithm
* [kernel][memheap] Remove rt_malloc/rt_free/rt_realloc and other related memory interfaces
* [kernel][mem] Clean up memory space of small memory management objects
* [kernel][kservice] Add memory application interface and thread protection interface
* [kernel][kservice] Fix function return value problem
* [kernel][memheap] Optimize memheaptrace print
* [kernel][memheap] Support best mode
* [kernel][memory] Remove semaphore lock
* [kernel][memheap] Add locked flag
* [kernel][memory] Support malloc memory in interrupt
* [kernel][memheap] Add 'memheapcheck' cmd
* [kernel][mem] Fix failure to request full memory
* [kernel][memheap] Fix compilation warning
* [kernel][mem] Fix mem realloc ASSERT
* [examples][testcases] Add small mem testcase
* [examples][mem_tc] Modify test memory size
* [examples][testcases] Add slab memory management algorithm test case
* [examples][testcases] fix small memory management algorithm test case
* [kernel][memory] Adjusting memory allocation algorithm object definition and interface
* [kernel][memory] Fix compilation warning
* [examples][utest] Fix mem test case
* [examples][utest] fix slab test case
* [utest][testcases] Shorten test time
* [kernel][memory] Formatting code
* [examples][utest] Adjust test run time
* [examples][utest] Formatting code
* [bsp] update all rtconfig.h
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[POSIX] move PSE branch to master
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(-Wimplicit-function-declaration)
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1. 去除start_gcc.s中set_secondary_cpu_boot_address代码,这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s,使用汇编实现,采用wake属性,方便bsp根据cpu特性获取CPU ID(多cpu集群中,不同厂家使用组合不一样).
3. 整理start_gcc.s 适应多核启动,原来的代码只考虑到双核的情况。
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