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2023-01-12modify RT_ALIGN_SIZE as 8 by defaultMeco Man
2023-01-08format Kconfig and sconscriptMeco Man
2022-10-25[compiler] 增加SConscript依赖标志 AddDepend (#6534)Man, Jianting (Meco)
* [compiler] 增加SConscript依赖标志 AddDepend * RT_USING_NEWLIB->RT_USING_NEWLIBC RT_USING_ARM_LIBC->RT_USING_ARMLIBC * 删除过时的板载测试例程 * [gd32] 移除无用的反汇编文件 * [bsp]移除老旧bsp中对RT_USING_NEWLIBC的手动宏定义
2022-06-09[scons][iar] 将IAR的PLATFORM字段由iar调整为iccarmMeco Man
将路径更新为IAR最新版本的路径
2022-04-20[update] Updated the Cortex-A of linker scripts for the new version of ↵zhouji
GCC(4.7)。
2022-01-05add RT_USING_POSIX_STDIOMeco Man
2021-12-17[update] CFLAGSliukangcc
2021-11-24对finsh_set_device调用增加宏定义限制Meco Man
2021-10-14Revert "Fix compiler flags issue"guo
2021-08-19Fix compiler flags issueJCZou
CCFLAGS is used by gcc and g++ compiler. So CFLAGS should be used for gcc to avoid passing gcc flags to g++.
2021-04-09[bsp]update GPL license to Apache-2.0, and format filesyangjie
2020-11-23【优化】在代码中移除 rt_system_object_init/rt_system_tick_init ↵guozhanxin
的调用。
2019-10-22[add] default environmentErnest
2018-12-17【串口】宏定义对应增加[email protected]
2018-12-03[bsp][rm48x50] update scons config: disable MDK support.aozima
2018-02-06update SConscript: support scons 3.aozima
2017-04-09[BSP] fix RT_DFS_ELM_MAX_LFN to 255.Bernard Xiong
2014-07-18[Drivers] re-write serial framework.bernard
2013-10-20rm48x50: cleanup sys_startup.cGrissiom
2013-10-20rm48: move some asm file to libcpuGrissiom
2013-10-20rm48x50: add GCC supportGrissiom
2013-10-20rm48x50: cleanup HALCoGen codeGrissiom
2013-10-19rm48x50: fix the prototype of finsh_system_initGrissiom
2013-06-12RM48 does not have cache implementedGrissiom
2013-06-05cortex-r4: add __rt_ffsGrissiom
2013-06-03rm48x50: remove useless reg_test codeGrissiom
2013-05-31rm48x50: VFP lazy stackingGrissiom
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT will turn on VFP for all threads and stack all the VFP registers. When doing lazy stacking, VFP will only be turned on for the thread who issued VFP instructions. Currently, if a thread turned on VFP, it cannot be turned off. RTT will never know what time the thread doesn't need VFP any more. The thread might could turn off the VFP for it self in proper time.
2013-05-31rm48x50: turn on VFP supportGrissiom
This support Common VFPv2 sub-architecture.
2013-05-30rm48x50: remove unused vPortTaskUsesFPUGrissiom
2013-05-30rm48x50: move uart.c to drv_uart.cGrissiom
2013-05-29rm48x50: add finsh supportGrissiom
2013-05-29rm48x50/uart.c: fix bugsGrissiom
2013-05-29rm48x50: now it has consoleGrissiom
2013-05-29rm48x50: update HALCoGen fileGrissiom
2013-05-26rm48x50: temperately disable the VFP register testGrissiom
2013-05-26rm48x50: add vRegTestTask2Grissiom
2013-05-26rm48x50: fix bug in reg_test from FreeRTOSGrissiom
It does not satisfy AAPCS.
2013-05-26rm48x50: add reg_test from FreeRTOSGrissiom
The code is GPLv2 so I think we could use it for free(both free beer and free speech).
2013-05-24add rm48x50 bsp and libcpuGrissiom
We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.